[XCOFF] support the ref directive for object generation.

[Esme]

Summary

A R_REF relocation as a non-relocating reference is required to prevent garbage collection (by the binder) of the ref symbol in object generation.

[shchenz]

llvm/lib/MC/MCXCOFFStreamer.cpp

88

This would be very strange directly calling to XCOFFObjectWriter and skipping the abstract MC layer. For example, with this implementation I think you can not get the MCFixups for the refs in the MCAssembler dumping?

Is it possible to just create a MCFixup here and use existing logic to handle the relocations? With this method I think you don't need the std::vector<std::pair<const MCSymbol *, const MCFragment *>> RefSymbolInfo in the XCOFFObjectWriter.cpp, the MCFixups should all be attached to the MCFragment of the MCSection.

llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll

122

We also need a case that has R_REF relocation for .text section.

[Esme]

Add a Fixup of kind FK_NONE to later record a relocation of type R_REF.

[shchenz]

llvm/lib/MC/MCXCOFFStreamer.cpp

89

Do you think reusing PPC fixup kind fixup_ppc_nofixup for AIX R_REF type relocation makes more sense?

llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll

11

Can we add RUN lines for another two cases?

[Esme]

llvm/lib/MC/MCXCOFFStreamer.cpp

89

The fixup_ppc_nofixup is defined in llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h, and it looks inappropriate to include that in llvm/lib/MC?

[shchenz]

llvm/lib/MC/MCXCOFFStreamer.cpp

89

yes, I think you would need an interface in class MCAsmBackend and override this interface in class XCOFFPPCAsmBackend. FK_NONE is not a good choice, it is for relocation types that are defined in targets and bigger FirstLiteralRelocationKind(Although now PPC does not have any fixup kind bigger than FirstLiteralRelocationKind, but we really should not break this common design.). See PPCAsmBackend::getFixupKindInfo().

[Esme]

Address comment -- use fixup_ppc_nofixup instead of FK_NONE to tie the ref symbol.

[shchenz]

Looks good to me except one nit.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

280

nit: although we don't have user for other fixup kinds, for functionality complete, could we add other cases as well? This is what other targets do.

[Esme]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

280

I don't really agree with adding other cases that are not used in this patch, because we will neither assurance its features for these cases nor test them.
I found that BFD_RELOC_* relocations are supported in other target, for example D118136, and if necessary, we can also support it for AIX, but it should not be in this patch. What do you think?

[shchenz]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

280

OK

llvm/include/llvm/MC/MCStreamer.h

virtual void emitXCOFFExceptDirective(const MCSymbol *Symbol,
                                         const MCSymbol *Trap,
                                         unsigned Lang, unsigned Reason,
                                         unsigned FunctionSize, bool hasDebug);
 
   /// Emit a XCOFF .ref directive which creates R_REF type entry in the
   /// relocation table for one or more symbols.
   ///
   /// \param Sym - The symbol on the .ref directive.
-  virtual void emitXCOFFRefDirective(StringRef Sym);
+  virtual void emitXCOFFRefDirective(const MCSymbol *Symbol);
 
   /// Emit an ELF .size directive.
   ///
   /// This corresponds to an assembler statement such as:
   ///  .size symbol, expression
   virtual void emitELFSize(MCSymbol *Symbol, const MCExpr *Value);
 
   /// Emit an ELF .symver directive.

llvm/include/llvm/MC/MCXCOFFStreamer.h

void emitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
                     uint64_t Size = 0, Align ByteAlignment = Align(1),
                     SMLoc Loc = SMLoc()) override;
   void emitInstToData(const MCInst &Inst, const MCSubtargetInfo &) override;
   void emitXCOFFLocalCommonSymbol(MCSymbol *LabelSym, uint64_t Size,
                                   MCSymbol *CsectSym, Align Alignment) override;
   void emitXCOFFSymbolLinkageWithVisibility(MCSymbol *Symbol,
                                             MCSymbolAttr Linkage,
                                             MCSymbolAttr Visibility) override;
-  void emitXCOFFRefDirective(StringRef Name) override {
-    report_fatal_error("emitXCOFFRefDirective is not implemented yet on object"
-                       "generation path");
-  }
+  void emitXCOFFRefDirective(const MCSymbol *Symbol) override;
   void emitXCOFFRenameDirective(const MCSymbol *Name,
                                 StringRef Rename) override {
     report_fatal_error("emitXCOFFRenameDirective is not implemented yet on "
                        "object generation path");
   }
   void emitXCOFFExceptDirective(const MCSymbol *Symbol, const MCSymbol *Trap,
                                 unsigned Lang, unsigned Reason,
                                 unsigned FunctionSize, bool hasDebug) override;
 };
 
 } // end namespace llvm
 
 #endif // LLVM_MC_MCXCOFFSTREAMER_H

llvm/lib/MC/MCAsmStreamer.cpp

public:
   void emitXCOFFLocalCommonSymbol(MCSymbol *LabelSym, uint64_t Size,
                                   MCSymbol *CsectSym, Align Alignment) override;
   void emitXCOFFSymbolLinkageWithVisibility(MCSymbol *Symbol,
                                             MCSymbolAttr Linakge,
                                             MCSymbolAttr Visibility) override;
   void emitXCOFFRenameDirective(const MCSymbol *Name,
                                 StringRef Rename) override;
 
-  void emitXCOFFRefDirective(StringRef Name) override;
+  void emitXCOFFRefDirective(const MCSymbol *Symbol) override;
 
   void emitXCOFFExceptDirective(const MCSymbol *Symbol, 
                                 const MCSymbol *Trap,
                                 unsigned Lang, unsigned Reason,
                                 unsigned FunctionSize, bool hasDebug) override;
 
   void emitELFSize(MCSymbol *Symbol, const MCExpr *Value) override;
   void emitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
for (char C : Rename) {
     if (C == DQ)
       OS << DQ;
     OS << C;
   }
   OS << DQ;
   EmitEOL();
 }
 
-void MCAsmStreamer::emitXCOFFRefDirective(StringRef Name) {
-  OS << "\t.ref " << Name;
+void MCAsmStreamer::emitXCOFFRefDirective(const MCSymbol *Symbol) {
+  OS << "\t.ref ";
+  Symbol->print(OS, MAI);
   EmitEOL();
 }
 
 void MCAsmStreamer::emitXCOFFExceptDirective(const MCSymbol *Symbol,
                                              const MCSymbol *Trap, 
                                              unsigned Lang,
                                              unsigned Reason,
                                              unsigned FunctionSize,

llvm/lib/MC/MCStreamer.cpp

 }
 
 void MCStreamer::emitXCOFFRenameDirective(const MCSymbol *Name,
                                           StringRef Rename) {
   llvm_unreachable("emitXCOFFRenameDirective is only supported on "
                    "XCOFF targets");
 }
 
-void MCStreamer::emitXCOFFRefDirective(StringRef Name) {
+void MCStreamer::emitXCOFFRefDirective(const MCSymbol *Symbol) {
   llvm_unreachable("emitXCOFFRefDirective is only supported on XCOFF targets");
 }
 
 void MCStreamer::emitXCOFFExceptDirective(const MCSymbol *Symbol,
                                           const MCSymbol *Trap, 
                                           unsigned Lang, unsigned Reason,
                                           unsigned FunctionSize,
                                           bool hasDebug) {

llvm/lib/MC/MCXCOFFStreamer.cpp

void MCXCOFFStreamer::emitXCOFFSymbolLinkageWithVisibility(
 
   // When the caller passes `MCSA_Invalid` for the visibility, do not emit one.
   if (Visibility == MCSA_Invalid)
     return;
 
   emitSymbolAttribute(Symbol, Visibility);
 }
 
+void MCXCOFFStreamer::emitXCOFFRefDirective(const MCSymbol *Symbol) {
+  // Add a Fixup here to later record a relocation of type R_REF to prevent the
+  // ref symbol from being garbage collected (by the binder).
+  MCDataFragment *DF = getOrCreateDataFragment();
+  const MCSymbolRefExpr *SRE = MCSymbolRefExpr::create(Symbol, getContext());
+  std::optional<MCFixupKind> MaybeKind =
+      getAssembler().getBackend().getFixupKind("R_REF");
+  if (!MaybeKind)
+    report_fatal_error("failed to get fixup kind for R_REF relocation");
+
+  MCFixupKind Kind = *MaybeKind;
+  MCFixup Fixup = MCFixup::create(DF->getContents().size(), SRE, Kind);
+  DF->getFixups().push_back(Fixup);
+}
+
 void MCXCOFFStreamer::emitXCOFFExceptDirective(const MCSymbol *Symbol,
                                                const MCSymbol *Trap,
                                                unsigned Lang, unsigned Reason,
                                                unsigned FunctionSize,
                                                bool hasDebug) {
   getAssembler().getWriter().addExceptionEntry(Symbol, Trap, Lang, Reason,
                                                FunctionSize, hasDebug);
 }

llvm/lib/MC/XCOFFObjectWriter.cpp

else if (Type == XCOFF::RelocationType::R_TOC ||
     // address, fragment offset and Fixup offset.
     uint64_t BRInstrAddress = SectionMap[ParentSec]->Address +
                               Layout.getFragmentOffset(Fragment) +
                               Fixup.getOffset();
     // The FixedValue should be the difference between SymA csect address and BR
     // instr address plus any constant value.
     FixedValue =
         SectionMap[SymASec]->Address - BRInstrAddress + Target.getConstant();
-  }
+  } else if (Type == XCOFF::RelocationType::R_REF)
+    // The FixedValue should always be 0 since it specifies a nonrelocating
+    // reference.
+    FixedValue = 0;
 
   assert((Fixup.getOffset() <=
           MaxRawDataSize - Layout.getFragmentOffset(Fragment)) &&
          "Fragment offset + fixup offset is overflowed.");
   uint32_t FixupOffsetInCsect =
       Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
 
   XCOFFRelocation Reloc = {Index, FixupOffsetInCsect, SignAndSize, Type};

llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

 public:
   XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
       : PPCAsmBackend(T, TT) {}
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override {
     return createPPCXCOFFObjectWriter(TT.isArch64Bit());
   }
+
+  std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
 };
 
 } // end anonymous namespace
 
 std::optional<MCFixupKind>
 ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
   if (TT.isOSBinFormatELF()) {
     unsigned Type;
#undef ELF_RELOC
                  .Default(-1u);
     }
     if (Type != -1u)
       return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
   }
   return std::nullopt;
 }
 
+std::optional<MCFixupKind>
+XCOFFPPCAsmBackend::getFixupKind(StringRef Name) const {
+  return StringSwitch<std::optional<MCFixupKind>>(Name)
+      .Case("R_REF", (MCFixupKind)PPC::fixup_ppc_nofixup)
+      .Default(std::nullopt);
+}
+
 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
                                         const MCSubtargetInfo &STI,
                                         const MCRegisterInfo &MRI,
                                         const MCTargetOptions &Options) {
   const Triple &TT = STI.getTargetTriple();
   if (TT.isOSBinFormatXCOFF())
     return new XCOFFPPCAsmBackend(T, TT);
 
   return new ELFPPCAsmBackend(T, TT);
 }

llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h

enum Fixups {
   // A 34-bit fixup corresponding to PC-relative paddi.
   fixup_ppc_pcrel34,
 
   // A 34-bit fixup corresponding to Non-PC-relative paddi.
   fixup_ppc_imm34,
 
   /// Not a true fixup, but ties a symbol to a call to __tls_get_addr for the
   /// TLS general and local dynamic models, or inserts the thread-pointer
-  /// register number.
+  /// register number. It can also be used to tie the ref symbol to prevent it
+  /// from being garbage collected on AIX.
   fixup_ppc_nofixup,
 
   /// A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for
   /// instrs like 'lxv'. Produces the same relocation as fixup_ppc_half16ds.
   fixup_ppc_half16dq,
 
   // Marker
   LastTargetFixupKind,
   NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
 };
 }
 }
 
 #endif

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

case PPC::fixup_ppc_half16dq: {
     }
   } break;
   case PPC::fixup_ppc_br24:
     // Branches are 4 byte aligned, so the 24 bits we encode in
     // the instruction actually represents a 26 bit offset.
     return {XCOFF::RelocationType::R_RBR, EncodedSignednessIndicator | 25};
   case PPC::fixup_ppc_br24abs:
     return {XCOFF::RelocationType::R_RBA, EncodedSignednessIndicator | 25};
+  case PPC::fixup_ppc_nofixup: {
+    if (Modifier == MCSymbolRefExpr::VK_None)
+      return {XCOFF::RelocationType::R_REF, 0};
+    else
+      llvm_unreachable("Unsupported Modifier");
+  } break;
   case FK_Data_4:
   case FK_Data_8:
     const uint8_t SignAndSizeForFKData =
         EncodedSignednessIndicator |
         ((unsigned)Fixup.getKind() == FK_Data_4 ? 31 : 63);
     switch (Modifier) {
     default:
       report_fatal_error("Unsupported modifier");

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

if (OutContext.hasXCOFFSection(
     MCSection *CntsSection = OutContext.getXCOFFSection(
         "__llvm_prf_cnts", SectionKind::getData(),
         XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD),
         /*MultiSymbolsAllowed*/ true);
 
     OutStreamer->switchSection(CntsSection);
     if (OutContext.hasXCOFFSection(
             "__llvm_prf_data",
-            XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD)))
-      OutStreamer->emitXCOFFRefDirective("__llvm_prf_data[RW]");
+            XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) {
+      MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_data[RW]");
+      OutStreamer->emitXCOFFRefDirective(S);
+    }
     if (OutContext.hasXCOFFSection(
             "__llvm_prf_names",
-            XCOFF::CsectProperties(XCOFF::XMC_RO, XCOFF::XTY_SD)))
-      OutStreamer->emitXCOFFRefDirective("__llvm_prf_names[RO]");
+            XCOFF::CsectProperties(XCOFF::XMC_RO, XCOFF::XTY_SD))) {
+      MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_names[RO]");
+      OutStreamer->emitXCOFFRefDirective(S);
+    }
     if (OutContext.hasXCOFFSection(
             "__llvm_prf_vnds",
-            XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD)))
-      OutStreamer->emitXCOFFRefDirective("__llvm_prf_vnds[RW]");
+            XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) {
+      MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_vnds[RW]");
+      OutStreamer->emitXCOFFRefDirective(S);
+    }
   }
 }
 
 void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
   // If there are no functions and there are no toc-data definitions in this
   // module, we will never need to reference the TOC base.
   if (M.empty() && TOCDataGlobalVars.empty())
     return;

llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll

 ; RUN: rm -rf %t && split-file %s %t
 
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false < %t/no-ref.ll | FileCheck %s --check-prefixes=NOREF
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false < %t/no-vnds.ll | FileCheck %s --check-prefixes=NOVNDS
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false < %t/with-vnds.ll | FileCheck %s --check-prefixes=WITHVNDS
-
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false < %t/no-ref.ll | FileCheck %s --check-prefixes=NOREF
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false --filetype=obj < %t/no-ref.ll -o %t/no-ref.o
+; RUN: llvm-objdump %t/no-ref.o -r | FileCheck %s --check-prefix=NOREF-OBJ
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false < %t/no-vnds.ll | FileCheck %s --check-prefixes=NOVNDS
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false --filetype=obj < %t/no-vnds.ll -o %t/no-vnds.o
+; RUN: llvm-objdump %t/no-vnds.o -r | FileCheck %s --check-prefix=NOVNDS-OBJ
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false < %t/with-vnds.ll | FileCheck %s --check-prefixes=WITHVNDS
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false --filetype=obj < %t/with-vnds.ll -o %t/with-vnds.o
+; RUN: llvm-objdump %t/with-vnds.o -tr | FileCheck %s --check-prefix=WITHVNDS-OBJ
 
 ;--- no-ref.ll
 ; The absence of a __llvm_prf_cnts section should stop generating the .refs.
 ;
 target datalayout = "E-m:a-p:32:32-i64:64-n32"
 target triple = "powerpc-ibm-aix7.2.0.0"
 
 @__profd_main = private global i64 zeroinitializer, section "__llvm_prf_data", align 8
 @__llvm_prf_nm = private constant [6 x i8] c"\04\00main", section "__llvm_prf_names", align 1
 
 @llvm.used = appending global [2 x ptr]
   [ptr @__profd_main,
    ptr @__llvm_prf_nm], section "llvm.metadata"
 
 define i32 @main() #0 {
 entry:
   ret i32 1
 }
 
 ; NOREF-NOT:  .ref __llvm_prf_data
 ; NOREF-NOT:  .ref __llvm_prf_names
 ; NOREF-NOT:  .ref __llvm_prf_vnds
 
+; NOREF-OBJ-NOT: R_REF  __llvm_prf_data
+; NOREF-OBJ-NOT: R_REF  __llvm_prf_names
+; NOREF-OBJ-NOT: R_REF  __llvm_prf_vnds
+
 ;--- no-vnds.ll
 ; This is the most common case. When -fprofile-generate is used and there exists executable code, we generate the __llvm_prf_cnts, __llvm_prf_data, and __llvm_prf_names sections.
 ;
 target datalayout = "E-m:a-p:32:32-i64:64-n32"
 target triple = "powerpc-ibm-aix7.2.0.0"
 
 @__profc_main = private global [1 x i64] zeroinitializer, section "__llvm_prf_cnts", align 8
 @__profd_main = private global i64 zeroinitializer, section "__llvm_prf_data", align 8

 ; XCOFF, a csect can be defined in pieces, so this is is legal assembly.
 ;
 ; NOVNDS:      .csect __llvm_prf_cnts[RW],3
 ; NOVNDS:      .csect __llvm_prf_cnts[RW],3
 ; NOVNDS-NEXT: .ref __llvm_prf_data[RW]
 ; NOVNDS-NEXT: .ref __llvm_prf_names[RO]
 ; NOVNDS-NOT:  .ref __llvm_prf_vnds
 
+; NOVNDS-OBJ: 00000008 R_REF  __llvm_prf_data
+; NOVNDS-OBJ: 00000008 R_REF  __llvm_prf_names
+; NOVNDS-OBJ-NOT: R_REF  __llvm_prf_vnds
+
 ;--- with-vnds.ll
 ; When value profiling is needed, the PGO instrumentation generates variables in the __llvm_prf_vnds section, so we generate a .ref for them too.
 ;
 @__profc_main = private global [1 x i64] zeroinitializer, section "__llvm_prf_cnts", align 8
 @__profd_main = private global i64 zeroinitializer, section "__llvm_prf_data", align 8
 @__llvm_prf_nm = private constant [6 x i8] c"\04\00main", section "__llvm_prf_names", align 1
 @__llvm_prf_vnodes = private global [10 x { i64, i64, ptr }] zeroinitializer, section "__llvm_prf_vnds"
 
 @llvm.used = appending global [4 x ptr]
   [ptr @__profc_main,
    ptr @__profd_main,
    ptr @__llvm_prf_nm,
    ptr @__llvm_prf_vnodes], section "llvm.metadata"
 
 define i32 @main() #0 {
 entry:
   ret i32 1
 }
 
 ; WITHVNDS:      .csect __llvm_prf_cnts[RW],3
 ; WITHVNDS:      .csect __llvm_prf_cnts[RW],3
 ; WITHVNDS-NEXT: .ref __llvm_prf_data[RW]
 ; WITHVNDS-NEXT: .ref __llvm_prf_names[RO]
 ; WITHVNDS-NEXT: .ref __llvm_prf_vnds[RW]
+
+; WITHVNDS-OBJ:      SYMBOL TABLE:
+; WITHVNDS-OBJ-NEXT: 00000000      df *DEBUG* 00000000 <stdin>
+; WITHVNDS-OBJ-NEXT: 00000000 l       .text 00000008 .text
+; WITHVNDS-OBJ-NEXT: 00000000 g     F .text (csect: .text)  00000000 .main
+; WITHVNDS-OBJ-NEXT: 00000008 l       .text 00000006 __llvm_prf_names
+; WITHVNDS-OBJ-NEXT: 00000010 l     O .data 00000008 __llvm_prf_cnts
+; WITHVNDS-OBJ-NEXT: 00000018 l     O .data 00000008 __llvm_prf_data
+; WITHVNDS-OBJ-NEXT: 00000020 l     O .data 000000f0 __llvm_prf_vnds
+; WITHVNDS-OBJ-NEXT: 00000110 g     O .data 0000000c main
+; WITHVNDS-OBJ-NEXT: 0000011c l       .data 00000000 TOC
+
+; WITHVNDS-OBJ:      RELOCATION RECORDS FOR [.data]:
+; WITHVNDS-OBJ-NEXT: OFFSET   TYPE                     VALUE
+; WITHVNDS-OBJ-NEXT: 00000008 R_REF                    __llvm_prf_data
+; WITHVNDS-OBJ-NEXT: 00000008 R_REF                    __llvm_prf_names
+; WITHVNDS-OBJ-NEXT: 00000008 R_REF                    __llvm_prf_vnds
+; WITHVNDS-OBJ-NEXT: 00000100 R_POS                    .main
+; WITHVNDS-OBJ-NEXT: 00000104 R_POS                    TOC