[RISCV] Add CoveredBySubRegs to the X*_PD register class.

[craig.topper]

Summary

Not completely sure what effect this has, but it's certainly true.

[asb]

Agreed it's not clear this has any practical effect for us, but it is true and setting this matches similar situations on other targets (e.g. Mips).

llvm/lib/Target/RISCV/RISCVRegisterInfo.td

let RegAltNameIndices = [ABIRegAltName] in {
   foreach I = 0-15 in {
     defvar Index = !shl(I, 1);
     defvar Reg = !cast<Register>("X"#Index);
     defvar RegP1 = !cast<Register>("X"#!add(Index,1));
     def X#Index#_PD : RISCVRegWithSubRegs<Index, Reg.AsmName,
                                           [Reg, RegP1],
                                           Reg.AltNames> {
       let SubRegIndices = [sub_32, sub_32_hi];
+      let CoveredBySubRegs = 1;
     }
   }
 }
 
 let RegInfos = RegInfoByHwMode<[RV64], [RegInfo<64, 64, 64>]> in
 def GPRPF64 : RegisterClass<"RISCV", [f64], 64, (add
     X10_PD, X12_PD, X14_PD, X16_PD,
     X6_PD,