[BOLT] Use MCInstrDesc::operands() instead of OpInfo

[foad]

Summary

operands() is the preferred accessor since D142213. OpInfo will be
removed in D142219.

[Amir]

LGTM

bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

if (isADRP(Inst))
       return false;
 
     if (isADR(Inst))
       return true;
 
     // Look for literal addressing mode (see C1-143 ARM DDI 0487B.a)
     const MCInstrDesc &MCII = Info->get(Inst.getOpcode());
     for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I)
-      if (MCII.OpInfo[I].OperandType == MCOI::OPERAND_PCREL)
+      if (MCII.operands()[I].OperandType == MCOI::OPERAND_PCREL)
         return true;
 
     return false;
   }
 
   bool evaluateADR(const MCInst &Inst, int64_t &Imm,
                    const MCExpr **DispExpr) const {
     assert((isADR(Inst) || isADRP(Inst)) && "Not an ADR instruction");
public:
   bool evaluateAArch64MemoryOperand(const MCInst &Inst, int64_t &DispImm,
                                     const MCExpr **DispExpr = nullptr) const {
     if (isADR(Inst) || isADRP(Inst))
       return evaluateADR(Inst, DispImm, DispExpr);
 
     // Literal addressing mode
     const MCInstrDesc &MCII = Info->get(Inst.getOpcode());
     for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) {
-      if (MCII.OpInfo[I].OperandType != MCOI::OPERAND_PCREL)
+      if (MCII.operands()[I].OperandType != MCOI::OPERAND_PCREL)
         continue;
 
       if (!Inst.getOperand(I).isImm()) {
         assert(Inst.getOperand(I).isExpr() && "Unexpected PCREL operand");
         assert(DispExpr && "DispExpr must be set");
         *DispExpr = Inst.getOperand(I).getExpr();
         return true;
       }
MCInst::iterator getMemOperandDisp(MCInst &Inst) const override {
     MCInst::iterator OI = Inst.begin();
     if (isADR(Inst) || isADRP(Inst)) {
       assert(MCPlus::getNumPrimeOperands(Inst) >= 2 &&
              "Unexpected number of operands");
       return ++OI;
     }
     const MCInstrDesc &MCII = Info->get(Inst.getOpcode());
     for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) {
-      if (MCII.OpInfo[I].OperandType == MCOI::OPERAND_PCREL)
+      if (MCII.operands()[I].OperandType == MCOI::OPERAND_PCREL)
         break;
       ++OI;
     }
     assert(OI != Inst.end() && "Literal operand not found");
     return OI;
   }
 
   bool replaceMemOperandDisp(MCInst &Inst, MCOperand Operand) const override {

bolt/lib/Target/X86/X86MCPlusBuilder.cpp

bool isRedundantMove(const MCInst &Inst) const override {
 
     assert(Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg());
     return Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg();
   }
 
   bool requiresAlignedAddress(const MCInst &Inst) const override {
     const MCInstrDesc &Desc = Info->get(Inst.getOpcode());
     for (unsigned int I = 0; I < Desc.getNumOperands(); ++I) {
-      const MCOperandInfo &Op = Desc.OpInfo[I];
+      const MCOperandInfo &Op = Desc.operands()[I];
       if (Op.OperandType != MCOI::OPERAND_REGISTER)
         continue;
       if (Op.RegClass == X86::VR128RegClassID)
         return true;
     }
     return false;
   }