[AMDGPU] Legalize soffset of buffer instruction. Use Waterfall loop logic.

[skc7]

Summary

Legalize soffset of buffer instructions. If vgpr is assigned to soffset, use waterfall loop logic to legalize.

Update loadSRsrcFromVGPR method to use for rsrc and soffset operands.

[skc7]

Use loadMBUFScalarOperandFromVGPR to build waterfall loop for soffset and srsrc.

[skc7]

Rebase

[skc7]

Rebase

[arsenm]

I think this will mishandle the case where both the SRD and the soffset are VGPRs. You need to handle both at the same time in one waterfall loop (this should show up if your tests used a meaningful SRD). You can also just look into the globalisel tests for these intrinsics, they test all the permutations already

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

5814

Don't understand the isIdenticalTo check, this will miss flag mismatches. Register and subregister equality should be sufficient (maybe it doesn't matter based on context)

llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll

35

All of these tests are using poison for the SRD, these should use a meaningful value

[skc7]

Make changes to legalize soffset and rsrc together.

[skc7]

In D141030#4059355, @arsenm wrote:

I think this will mishandle the case where both the SRD and the soffset are VGPRs. You need to handle both at the same time in one waterfall loop (this should show up if your tests used a meaningful SRD). You can also just look into the globalisel tests for these intrinsics, they test all the permutations already

Made changes to legalize and use single water fall loop for rsrc and soffset. As per my understanding, SiFixSGPRCopies pass makes call to moveToVALU sequentially (not together for soffset and rsrc) for operands. So we see two water fall loops in the tests.