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alex-t (Alexander)
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User Since
Jul 26 2016, 7:17 AM (146 w, 5 d)

Recent Activity

Wed, May 15

alex-t updated the diff for D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..

formatting etc

Wed, May 15, 5:13 AM

Tue, May 14

alex-t updated the diff for D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..

Added fixes after extended testing. Also GFX10 related update.

Tue, May 14, 5:07 AM

Tue, Apr 23

alex-t accepted D60999: AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies.

LGTM

Tue, Apr 23, 4:53 AM · Restricted Project

Apr 8 2019

alex-t added inline comments to D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..
Apr 8 2019, 8:52 AM
alex-t added a comment to D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..
Apr 8 2019, 8:10 AM

Apr 5 2019

alex-t added a comment to D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..

Adding llvm-commits to the CC. Please be more careful about that in the future... see http://llvm.org/docs/Phabricator.html

Apr 5 2019, 1:42 AM

Apr 4 2019

alex-t added inline comments to D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..
Apr 4 2019, 7:50 AM

Apr 3 2019

alex-t added inline comments to D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..
Apr 3 2019, 4:37 AM

Apr 2 2019

alex-t added a reviewer for D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence.: efriedma.
Apr 2 2019, 6:00 AM
alex-t updated the diff for D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..

changed according the reviewer request

Apr 2 2019, 5:58 AM

Mar 29 2019

alex-t updated the diff for D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..
Mar 29 2019, 8:15 AM
alex-t created D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence..
Mar 29 2019, 6:41 AM

Jan 3 2019

alex-t committed rL350350: [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression..
[AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression.
Jan 3 2019, 11:59 AM
alex-t closed D56161: [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression.
Jan 3 2019, 11:59 AM
alex-t updated the summary of D56161: [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression.
Jan 3 2019, 10:50 AM
alex-t updated the summary of D56161: [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression.
Jan 3 2019, 10:08 AM
alex-t retitled D56161: [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression from [AMDGPU] Fix scalar operand folding. to [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression.
Jan 3 2019, 10:06 AM

Dec 30 2018

alex-t created D56161: [AMDGPU] Fix scalar operand folding bug that causes SHOC performance regression.
Dec 30 2018, 11:18 AM

Nov 14 2018

alex-t added inline comments to D54340: AMDGPU: Fix various issues around the VirtReg2Value mapping.
Nov 14 2018, 3:44 AM

Oct 26 2018

alex-t added a comment to D53496: AMDGPU: Rewrite SILowerI1Copies to always stay on SALU.

It seems like we have to further develop this approach to deal with the scalar comparison instructions.
For instance, S_CMP_* does not produce any result but implicitly defines SCC.
Thus, InstrEmitter will insert the copies all the time.
Since DAG operator SETCC produces i1 value there will be the SCC to VReg_1 copies.
I not trying to invent a method to lower that copies.
First issue: in case all the uses are not divergent I don't need the V_CND_MASK -1,0 -> V_CMP_NE 0 pair
I need S_CSELECT -1, 0 immediately after the definition (to save SCC) and S_CMP_NE 0 just before use to rematerialize SCC
Second issue: I only need to save/restore if there are SCC defs in between.
So, we need to take into account not divergent flow as well.

Oct 26 2018, 6:53 AM

Oct 25 2018

alex-t added inline comments to D53496: AMDGPU: Rewrite SILowerI1Copies to always stay on SALU.
Oct 25 2018, 6:27 AM

Oct 16 2018

alex-t accepted D53283: AMDGPU: Divergence-driven selection of scalar buffer load intrinsics.

LGTM

Oct 16 2018, 12:26 AM

Oct 1 2018

alex-t committed rL343455: [AMDGPU] Divergence driven instruction selection. Shift operations..
[AMDGPU] Divergence driven instruction selection. Shift operations.
Oct 1 2018, 4:08 AM
alex-t closed D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Oct 1 2018, 4:08 AM

Sep 28 2018

alex-t added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 28 2018, 6:25 AM
alex-t updated the diff for D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..

Fixes according the discussion results.

Sep 28 2018, 6:18 AM

Sep 27 2018

alex-t added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 27 2018, 12:32 PM
alex-t added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 27 2018, 12:25 PM
alex-t added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 27 2018, 9:50 AM
alex-t added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 27 2018, 9:46 AM
alex-t added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 27 2018, 5:43 AM
alex-t updated the diff for D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..

Pattern changed to GCNPat, divergence check added.

Sep 27 2018, 5:43 AM

Sep 26 2018

alex-t created D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Sep 26 2018, 9:31 AM
alex-t closed D52019: [AMDGPU] Divergence driven instruction selection. Part 1..
Sep 26 2018, 9:28 AM

Sep 25 2018

alex-t accepted D52454: Run VerifyDAGDiverence in debug only.
Sep 25 2018, 12:41 PM
alex-t added a comment to D52454: Run VerifyDAGDiverence in debug only.

TargetTransformInfo::hasBranchDivergence() only returns true only if the divergence makes sense for the given target.
So, the compile time should be only affected for such targets: AMDGPU, NVPTX etc.

Sep 25 2018, 3:24 AM

Sep 21 2018

alex-t added a comment to D52019: [AMDGPU] Divergence driven instruction selection. Part 1..

Committed r342719.

Sep 21 2018, 3:37 AM
alex-t committed rL342719: [AMDGPU] Divergence driven instruction selection. Part 1..
[AMDGPU] Divergence driven instruction selection. Part 1.
Sep 21 2018, 3:34 AM

Sep 20 2018

alex-t updated the diff for D52019: [AMDGPU] Divergence driven instruction selection. Part 1..

MC/Disassembler/AMDGPU passed
Tests fixed

Sep 20 2018, 4:26 AM

Sep 19 2018

alex-t added inline comments to D52019: [AMDGPU] Divergence driven instruction selection. Part 1..
Sep 19 2018, 7:55 AM
alex-t updated the diff for D52019: [AMDGPU] Divergence driven instruction selection. Part 1..

Source cleanup.

Sep 19 2018, 7:55 AM

Sep 13 2018

alex-t set the repository for D52019: [AMDGPU] Divergence driven instruction selection. Part 1. to rL LLVM.
Sep 13 2018, 5:54 AM
alex-t closed D43334: AMDGPU: fix for SIRegisterInfo::isVGPR() crash.
Sep 13 2018, 5:53 AM
alex-t closed D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Sep 13 2018, 5:53 AM
alex-t closed D51586: [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32..
Sep 13 2018, 5:53 AM
alex-t closed D51975: [AMDGPU] Preliminary patch for divergence driven instruction selection. Load offset inlining pattern changed..
Sep 13 2018, 5:53 AM
alex-t closed D51931: [AMDGPU] Load divergence predicate refactoring.
Sep 13 2018, 5:49 AM
alex-t set the repository for D51975: [AMDGPU] Preliminary patch for divergence driven instruction selection. Load offset inlining pattern changed. to rL LLVM.
Sep 13 2018, 5:09 AM
alex-t committed rL342120: [AMDGPU] Load divergence predicate refactoring.
[AMDGPU] Load divergence predicate refactoring
Sep 13 2018, 2:08 AM
alex-t created D52019: [AMDGPU] Divergence driven instruction selection. Part 1..
Sep 13 2018, 1:54 AM

Sep 12 2018

alex-t added inline comments to D51931: [AMDGPU] Load divergence predicate refactoring.
Sep 12 2018, 11:43 PM
alex-t committed rL342115: [AMDGPU] Preliminary patch for divergence driven instruction selection..
[AMDGPU] Preliminary patch for divergence driven instruction selection.
Sep 12 2018, 11:37 PM
alex-t created D51975: [AMDGPU] Preliminary patch for divergence driven instruction selection. Load offset inlining pattern changed..
Sep 12 2018, 4:19 AM
alex-t updated the diff for D51931: [AMDGPU] Load divergence predicate refactoring.

Formatting fixed, function renamed.

Sep 12 2018, 3:21 AM

Sep 11 2018

alex-t created D51931: [AMDGPU] Load divergence predicate refactoring.
Sep 11 2018, 7:21 AM
alex-t committed rL341928: [AMDGPU] Preliminary patch for divergence driven instruction selection..
[AMDGPU] Preliminary patch for divergence driven instruction selection.
Sep 11 2018, 4:58 AM
alex-t closed D51734: [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed.
Sep 11 2018, 4:58 AM

Sep 10 2018

alex-t committed rL341843: [AMDGPU] Preliminary patch for divergence driven instruction selection..
[AMDGPU] Preliminary patch for divergence driven instruction selection.
Sep 10 2018, 9:44 AM

Sep 7 2018

alex-t added a comment to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

comitted: r341068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341068 91177308-0d34-0410-b5e6-96231b3b80d8

Sep 7 2018, 2:22 AM
alex-t committed rL341636: [AMDGPU] Preliminary patch for divergence driven instruction selection. Fold….
[AMDGPU] Preliminary patch for divergence driven instruction selection. Fold…
Sep 7 2018, 2:10 AM
alex-t closed D51610: [AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset..
Sep 7 2018, 2:10 AM

Sep 6 2018

alex-t created D51734: [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed.
Sep 6 2018, 8:07 AM
alex-t updated the diff for D51610: [AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset..

Unnecessary "isReg()" check removed.
Full context unified diff.

Sep 6 2018, 4:15 AM
alex-t updated the diff for D51586: [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32..

Physical registers handling added. Test cases for physical registers added.

Sep 6 2018, 1:01 AM
alex-t retitled D51586: [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32. from [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline move immediate. to [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32..
Sep 6 2018, 12:58 AM

Sep 4 2018

alex-t updated the diff for D51586: [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32..

Formatting corrected.

Sep 4 2018, 4:36 AM
alex-t created D51610: [AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset..
Sep 4 2018, 1:21 AM

Sep 3 2018

alex-t created D51586: [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32..
Sep 3 2018, 4:32 AM

Aug 30 2018

alex-t committed rL341068: [AMDGPU] Preliminary patch for divergence driven instruction selection..
[AMDGPU] Preliminary patch for divergence driven instruction selection.
Aug 30 2018, 6:56 AM
alex-t accepted D50433: A New Divergence Analysis for LLVM.
Aug 30 2018, 6:53 AM · Restricted Project
alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

Sorry, i am struggeling to follow.
Do you take the union of the PDF(P) for each immediate predecessor P of X? (where X is a potential join point).
That gives you invalid results.

      A
    /   \
   B     C
 /  \   /  \
D     E     F
 \  /   \  /
   G     H
   \    /
      I

PDF(G) = {E, B}
PDF(H) = {E, C}

PDF(G) join PDF(H) = {E, B, C} (where join is set union).
Yet, there are two disjoint paths from A to I. But A is in none of these sets.

You approach to the Control Dependence Analysis considering CFG only. You operate in terms ob BBs and branches.
I start from the PHI. The idea is simple: each point where 2 values converge has already been found while building SSA and is annotated with the PHI node.
I consider not PHI parent block predecessors PDF but PHI incoming values parent blocks PDFs.

Let's say the phi node in block I reads %x = phi double [ 0.0, %G ], [ 1.0, %H ]. How do you detect the divergence in %x?

Aug 30 2018, 6:50 AM · Restricted Project
alex-t added a comment to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 30 2018, 4:41 AM
alex-t updated the diff for D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

'registers' section dropped in test

Aug 30 2018, 4:39 AM

Aug 29 2018

alex-t added inline comments to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 29 2018, 9:29 AM
alex-t updated the diff for D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

Formatting. Test corrected.

Aug 29 2018, 9:29 AM
alex-t retitled D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1. from [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1. NFC. to [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 29 2018, 4:28 AM
alex-t added inline comments to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 29 2018, 4:28 AM

Aug 28 2018

alex-t added inline comments to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 28 2018, 10:20 AM
alex-t added a comment to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

Needs tests and comments.

I think I know what cases you are trying to solve, and there's usually a better way. Do you have a specific example?

Aug 28 2018, 7:40 AM
alex-t updated the diff for D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

Change has been split to several separate.
MIR test added

Aug 28 2018, 7:39 AM

Aug 27 2018

alex-t added a reviewer for D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1.: rampitec.
Aug 27 2018, 11:35 AM
alex-t created D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 27 2018, 11:35 AM
alex-t retitled D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1. from [AMDGPU] Preliminary patch for divergence driven instruction selection to [AMDGPU] Preliminary patch for divergence driven instruction selection. NFC..
Aug 27 2018, 11:35 AM
alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

Sorry, i am struggeling to follow.
Do you take the union of the PDF(P) for each immediate predecessor P of X? (where X is a potential join point).
That gives you invalid results.

      A
    /   \
   B     C
 /  \   /  \
D     E     F
 \  /   \  /
   G     H
   \    /
      I

PDF(G) = {E, B}
PDF(H) = {E, C}

PDF(G) join PDF(H) = {E, B, C} (where join is set union).
Yet, there are two disjoint paths from A to I. But A is in none of these sets.

Aug 27 2018, 10:44 AM · Restricted Project

Aug 24 2018

alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

For given branch all the blocks where PHI nodes must be inserted belongs to the branch parent block dominance frontier.

The problem with DF is that it implicitly assumes that there exists a definition at the function entry (see http://www.cs.utexas.edu/~pingali/CS380C/2010/papers/ssaCytron.pdf, comment below last equation of page 17).
So, we would get imprecise results.

I'm not sure that I understand you correct...
I still do not get an idea what do you mean by "imprecise results". The assumption in the paper you have referred looks reasonable.
Let's say we have 2 disjoint paths from Entry to block X and you have a use of some value V in X.

Aug 24 2018, 9:28 AM · Restricted Project

Aug 23 2018

alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

BTW, even with analyzing forward (up-down) and lazy style, for each divergent terminator you have to compute join points.
This is exactly what is done constructing SSA form to find all the blocks where should be PHI nodes.
For given branch all the blocks where PHI nodes must be inserted belongs to the branch parent block dominance frontier.
Why don't you use at least DF information from PDT?
Facing the divergent branch you can compute the blocks set affected by the divergence in linear time by Cooper's "two fingers" algorithm.

Aug 23 2018, 7:45 AM · Restricted Project
alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

I've not done with the source investigation yet but I already have one general objection.
The analysis algorithm is list-based iterative solver and hence it have to be of linear complexity.

Aug 23 2018, 6:15 AM · Restricted Project

Aug 22 2018

alex-t added a comment to D50433: A New Divergence Analysis for LLVM.
Aug 22 2018, 9:36 AM · Restricted Project
alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

Currently I cannot apply your diff to the trunk explicitly.
Could you tell me the commit or revision number in llvm trunk on which your patch could be applied?
The rebased diff could help as well.
if I could it'd be much more convenient to review.

Aug 22 2018, 2:24 AM · Restricted Project

Aug 20 2018

alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

Ping. Are there any further remarks, change requests or questions?

Aug 20 2018, 9:41 AM · Restricted Project
alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

How do you deal with terminators that have more than two successors? Example:

switch (divInt) {
  case 0:
   v = 1.0; break;
  case 1:
   v = 20.0; break;
  default:
  // do stuff (block D)
  return;
}
// do other stuff, using 'v' (J)

+----A----+
|    |    |
C0  C1    D
\   |    [..]
 \  |
   J

J is control-dependent on A. Therefore, you will erase A from the PDT sets of C0 and C1. However, there exist two disjoint paths from A to J through C0 and C1, which make PHI nodes in J divergent.

Aug 20 2018, 8:14 AM · Restricted Project

Aug 10 2018

alex-t added a comment to D50433: A New Divergence Analysis for LLVM.
Aug 10 2018, 3:56 AM · Restricted Project

Aug 9 2018

alex-t added a comment to D50433: A New Divergence Analysis for LLVM.

A few comments based on my experience of implemented the DA for AMD GPU legacy compiler :)

Aug 9 2018, 7:08 AM · Restricted Project

Jun 4 2018

alex-t added a comment to D46298: AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLowering.
should I just disable this analysis completely for r600?
Jun 4 2018, 3:34 AM
alex-t accepted D47148: [CodeGen] Always update divergence in SelectionDAG::UpdateNodeOperands.
Jun 4 2018, 3:25 AM
alex-t added a comment to D47148: [CodeGen] Always update divergence in SelectionDAG::UpdateNodeOperands.

My apologies for the delay. Thanks for handling this. LGTM.

Jun 4 2018, 3:24 AM

May 24 2018

alex-t added a comment to D46298: AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLowering.

I agree isVGPR should be illegal to call for R600

May 24 2018, 3:02 AM

May 21 2018

alex-t accepted D47151: [AMDGPU] Add divergence analysis as a dependency for ISel.

Thanks for catching this

May 21 2018, 11:21 AM

May 3 2018

alex-t added a comment to D46298: AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLowering.

Could you please clarify - why do you consider that check meaningless for r600?
I see that this line : " const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); " is misleading and in fact is not correct.
I'd better check and choose the R600Subtarget or SISubtarget.
If I understand right we need just check which subtarget to retrieve for physregs check.

May 3 2018, 4:49 AM

Apr 25 2018

alex-t added a comment to D40556: SIFixSGPRCopies should not change non-divergent PHI.

Sorry for the delay. Just submitted to trunk.
It was not about the reverse patch only. I had to change tests accordingly.

Apr 25 2018, 5:40 AM