Power ISA 3.0 introduced new 'test data class' instructions (xststdc(s|d|q)p and xvtstdc(s|d)p), which accept flags for: NaN, +Infinity, -Infinity, +Zero, -Zero, +Denormal, -Denormal.
This instruction can be used to implement custom lowering for llvm.is.fpclass intrinsic, but some extra bits provided by the intrinsic are missing: +Normal, -Normal, QNaN, SNaN ('normal' means a number is not inf/nan/zero/denormal). For those, this patch uses a two-way or three-way combination to implement correct behavior:
- For flags including both +Normal/-Normal, try reverse flags to avoid them.
- For flags including either +Normal/-Normal, try the rest flags first, and use method above with sign check.
- For flags including either QNaN/SNaN, try the rest flags first, and test 'whether it's NaN' with quiet bit set/unset.
I tested all flags (2**10=1024) against one value from every class with float/double/fp128 type (3*10), and compare result with Power8, all 30720 cases pass on ppc64le. And all 20480 cases (fp128 is not supported) pass on ppc64/ppc32.
Nearly all 3072 cases see improvement, except some shown in changes of is_fpclass.ll.