[AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones.

[arsenm]

I thought TFE was already handled?

llvm/lib/Target/AMDGPU/BUFInstructions.td

1304–1305 ↗

(On Diff #476133)

Why do these need fp and integer patterns? Given you've got the integer high element, I'd expect this to always be int vector

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll

125 ↗

(On Diff #476133)

All int and FP combinations not here?

149 ↗

(On Diff #476133)

2 x case missing?

[kosarev]

Removed unused patterns and added tests.

[kosarev]

I thought TFE was already handled?

Image TFE intrinsics were added in https://reviews.llvm.org/D48826, but TFE loads remained unsupported.

[kosarev]

Ping.

[kosarev]

Apologies, this was unintentionally submitted with D138492.

[arsenm]

LGTM, except I'd like to see tests trying to break the d16 interactions

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll

337 ↗

(On Diff #477719)

Can you also add i16 and f16 cases?

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll

124–125 ↗

(On Diff #477719)

Tests should use opaque pointers

232 ↗

(On Diff #477719)

Ditto, i16 and f16 cases

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

4557

If this isn't supposed to work, should return false for the fallback

[arsenm]

Should test the 16-bit cases

[kosarev]

Update tests to use opaque pointers.

[kosarev]

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

4557

What's the fallback? From what I see if we do not stop here, it will just crash later on a less specific check not being able to legalise the call.

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll

337 ↗

(On Diff #477719)

The title says it that this is not supposed to support d16 cases. We would just crash on these.

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll

232 ↗

(On Diff #477719)

Answered above.

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

4557

The legalization error is a better user facing error than hitting the assert

[kosarev]

Changed as requested.

[kosarev]

Rebased.

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

bool AMDGPULegalizerInfo::legalizeBufferLoad(MachineInstr &MI,
 
   std::tie(VOffset, ImmOffset) = splitBufferOffsets(B, VOffset);
   updateBufferMMO(MMO, VOffset, SOffset, ImmOffset, VIndex, MRI);
 
   unsigned Opc;
 
   // TODO: Support TFE for typed and narrow loads.
   if (IsTyped) {
-    assert(!IsTFE);
+    if (IsTFE)
+      return false;
     Opc = IsD16 ? AMDGPU::G_AMDGPU_TBUFFER_LOAD_FORMAT_D16 :
                   AMDGPU::G_AMDGPU_TBUFFER_LOAD_FORMAT;
   } else if (IsFormat) {
     if (IsD16) {
-      assert(!IsTFE);
+      if (IsTFE)
+        return false;
       Opc = AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT_D16;
     } else {
       Opc = IsTFE ? AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT_TFE
                   : AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT;
     }
   } else {
-    assert(!IsTFE);
+    if (IsTFE)
+      return false;
     switch (MemTy.getSizeInBits()) {
     case 8:
       Opc = AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE;
       break;
     case 16:
       Opc = AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT;
       break;
     default:

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

SDValue SITargetLowering::lowerIntrinsicLoad(MemSDNode *M, bool IsFormat,
   bool IsTFE = M->getNumValues() == 3;
 
   unsigned Opc;
   if (IsFormat) {
     Opc = IsTFE ? AMDGPUISD::BUFFER_LOAD_FORMAT_TFE
                 : AMDGPUISD::BUFFER_LOAD_FORMAT;
   } else {
     // TODO: Support non-format TFE loads.
-    assert(!IsTFE);
+    if (IsTFE)
+      return SDValue();
     Opc = AMDGPUISD::BUFFER_LOAD;
   }
 
   if (IsD16) {
     return adjustLoadValueType(AMDGPUISD::BUFFER_LOAD_FORMAT_D16, M, DAG, Ops);
   }
 
   // Handle BUFFER_LOAD_BYTE/UBYTE/SHORT/USHORT overloaded intrinsics