For stack frames on the size of a register in x86, a code size optimization
emits "push rax/eax" instead of "sub" for stack allocation. For example:
foo:
.cfi_startproc
BB#0:
pushq %rax
Ltmp0:
.cfi_def_cfa_offset 16 ... .cfi_endproc
However, according to this code snippet in X86AsmBackend:
If the amount of the stack allocation is the size of a register, then
we "push" the RAX/EAX register onto the stack instead of adjusting the
stack pointer with a SUB instruction. We don't support the push of the
RAX/EAX register with compact unwind. So we check for that situation
// here.
if ((NumDefCFAOffsets == SavedRegIdx + 1 &&
StackSize - PrevStackSize == 1) || (Instrs.size() == 1 && NumDefCFAOffsets == 1 && StackSize == 2)) return CU::UNWIND_MODE_DWARF;
we cannot use compact unwind in this function since encoding "push rax/eax"
isn't supported. This looks overzealous since we really don't need to
encode rax/eax here, specially because we don't care about %rax content, i.e.,
there's no .cfi_offset %rax, <offset> being used.
It's also overzealous in the case where there are pushes for callee saved
registers followed by a "push rax/eax" instead of "sub", in which we should
also be able to encode the callee saved regs and everything else using compact
unwind.
This patch removes this restriction, if the approach looks sane I'll include
a testcase for the compact unwind part.