[mlir][arith][spirv] Hard fail in `-convert-arith-to-spirv`

[kuhar]

Summary

Turn legalization failures into hard failures to make sure that we do
not miss conversion pattern application failures.

Add a message on type conversion failure.

Move unsupported cases into a separate test file.

mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp

auto addUnrealizedCast = [](OpBuilder &builder, Type type,
                                 ValueRange inputs, Location loc) {
       auto cast = builder.create<UnrealizedConversionCastOp>(loc, type, inputs);
       return Optional<Value>(cast.getResult(0));
     };
     typeConverter.addSourceMaterialization(addUnrealizedCast);
     typeConverter.addTargetMaterialization(addUnrealizedCast);
     target->addLegalOp<UnrealizedConversionCastOp>();
 
+    // Fail hard when there are any remaining 'arith' ops.
+    target->addIllegalDialect<arith::ArithDialect>();
+
     RewritePatternSet patterns(&getContext());
     arith::populateArithToSPIRVPatterns(typeConverter, patterns);
 
     if (failed(applyPartialConversion(op, *target, std::move(patterns))))
       signalPassFailure();
   }
 };
 } // namespace
 
 std::unique_ptr<OperationPass<>> mlir::arith::createConvertArithToSPIRVPass() {
   return std::make_unique<ConvertArithToSPIRVPass>();
 }

mlir/lib/Conversion/SPIRVCommon/Pattern.h

 //===- Pattern.h - SPIRV Common Conversion Patterns -----------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef MLIR_CONVERSION_SPIRVCOMMON_PATTERN_H
 #define MLIR_CONVERSION_SPIRVCOMMON_PATTERN_H
 
 #include "mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h"
 #include "mlir/Transforms/DialectConversion.h"
+#include "llvm/Support/FormatVariadic.h"
 
 namespace mlir {
 namespace spirv {
 
 /// Converts elementwise unary, binary and ternary standard operations to SPIR-V
 /// operations.
 template <typename Op, typename SPIRVOp>
 class ElementwiseOpPattern final : public OpConversionPattern<Op> {
 public:
   using OpConversionPattern<Op>::OpConversionPattern;
 
   LogicalResult
   matchAndRewrite(Op op, typename Op::Adaptor adaptor,
                   ConversionPatternRewriter &rewriter) const override {
     assert(adaptor.getOperands().size() <= 3);
-    auto dstType = this->getTypeConverter()->convertType(op.getType());
-    if (!dstType)
-      return failure();
+    Type dstType = this->getTypeConverter()->convertType(op.getType());
+    if (!dstType) {
+      return rewriter.notifyMatchFailure(
+          op->getLoc(),
+          llvm::formatv("failed to convert type {0} for SPIR-V", op.getType()));
+    }
+
     if (SPIRVOp::template hasTrait<OpTrait::spirv::UnsignedOp>() &&
         !op.getType().isIndex() && dstType != op.getType()) {
       return op.emitError(
           "bitwidth emulation is not implemented yet on unsigned op");
     }
     rewriter.template replaceOpWithNewOp<SPIRVOp>(op, dstType,
                                                   adaptor.getOperands());
     return success();
   }
 };
 
 } // namespace spirv
 } // namespace mlir
 
 #endif // MLIR_CONVERSION_SPIRVCOMMON_PATTERN_H

mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir

+// RUN: mlir-opt -split-input-file -convert-arith-to-spirv -verify-diagnostics %s
+
+///===----------------------------------------------------------------------===//
+// Binary ops
+//===----------------------------------------------------------------------===//
+
+// -----
+
+module attributes {
+  spirv.target_env = #spirv.target_env<
+    #spirv.vce<v1.0, [Int8, Int16, Int64, Float16, Float64, Shader], []>, #spirv.resource_limits<>>
+} {
+
+func.func @unsupported_5elem_vector(%arg0: vector<5xi32>) {
+  // expected-error@+1 {{failed to legalize operation 'arith.subi'}}
+  %1 = arith.subi %arg0, %arg0: vector<5xi32>
+  return
+}
+
+} // end module
+
+// -----
+
+module attributes {
+  spirv.target_env = #spirv.target_env<
+    #spirv.vce<v1.0, [Int8, Int16, Int64, Float16, Float64, Shader], []>, #spirv.resource_limits<>>
+} {
+
+func.func @unsupported_2x2elem_vector(%arg0: vector<2x2xi32>) {
+  // expected-error@+1 {{failed to legalize operation 'arith.muli'}}
+  %2 = arith.muli %arg0, %arg0: vector<2x2xi32>
+  return
+}
+
+} // end module
+
+// -----
+
+func.func @int_vector4_invalid(%arg0: vector<2xi16>) {
+  // expected-error @+2 {{failed to legalize operation 'arith.divui'}}
+  // expected-error @+1 {{bitwidth emulation is not implemented yet on unsigned op}}
+  %0 = arith.divui %arg0, %arg0: vector<2xi16>
+  return
+}
+
+///===----------------------------------------------------------------------===//
+// Constant ops
+//===----------------------------------------------------------------------===//
+
+// -----
+
+func.func @unsupported_constant_0() {
+  // expected-error @+1 {{failed to legalize operation 'arith.constant'}}
+  %0 = arith.constant 4294967296 : i64 // 2^32
+  return
+}
+
+// -----
+
+func.func @unsupported_constant_1() {
+  // expected-error @+1 {{failed to legalize operation 'arith.constant'}}
+  %1 = arith.constant -2147483649 : i64 // -2^31 - 1
+  return
+}
+
+// -----
+
+func.func @unsupported_constant_2() {
+  // expected-error @+1 {{failed to legalize operation 'arith.constant'}}
+  %2 = arith.constant -2147483649 : i64 // -2^31 - 1
+  return
+}

mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir

 
 // CHECK-LABEL: @one_elem_vector
 func.func @one_elem_vector(%arg0: vector<1xi32>) {
   // CHECK: spirv.IAdd %{{.+}}, %{{.+}}: i32
   %0 = arith.addi %arg0, %arg0: vector<1xi32>
   return
 }
 
-// CHECK-LABEL: @unsupported_5elem_vector
-func.func @unsupported_5elem_vector(%arg0: vector<5xi32>) {
-  // CHECK: arith.subi
-  %1 = arith.subi %arg0, %arg0: vector<5xi32>
-  return
-}
-
-// CHECK-LABEL: @unsupported_2x2elem_vector
-func.func @unsupported_2x2elem_vector(%arg0: vector<2x2xi32>) {
-  // CHECK: arith.muli
-  %2 = arith.muli %arg0, %arg0: vector<2x2xi32>
-  return
-}
-
-} // end module
-
-// -----
-
-// Check that types are converted to 32-bit when no special capabilities.
-module attributes {
-  spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [], []>, #spirv.resource_limits<>>
-} {
-
-// CHECK-LABEL: @int_vector23
-func.func @int_vector23(%arg0: vector<2xi8>, %arg1: vector<3xi16>) {
-  // CHECK: spirv.SDiv %{{.*}}, %{{.*}}: vector<2xi32>
-  %0 = arith.divsi %arg0, %arg0: vector<2xi8>
-  // CHECK: spirv.SDiv %{{.*}}, %{{.*}}: vector<3xi32>
-  %1 = arith.divsi %arg1, %arg1: vector<3xi16>
-  return
-}
-
-// CHECK-LABEL: @float_scalar
-func.func @float_scalar(%arg0: f16, %arg1: f64) {
-  // CHECK: spirv.FAdd %{{.*}}, %{{.*}}: f32
-  %0 = arith.addf %arg0, %arg0: f16
-  // CHECK: spirv.FMul %{{.*}}, %{{.*}}: f32
-  %1 = arith.mulf %arg1, %arg1: f64
-  return
-}
-
-} // end module
-
-// -----
-
-// Check that types are converted to 32-bit when no special capabilities that
-// are not supported.
-module attributes {
-  spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [], []>, #spirv.resource_limits<>>
-} {
-
-func.func @int_vector4_invalid(%arg0: vector<4xi64>) {
-  // expected-error @+1 {{bitwidth emulation is not implemented yet on unsigned op}}
-  %0 = arith.divui %arg0, %arg0: vector<4xi64>
-  return
-}
-
 } // end module
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // std bit ops
 //===----------------------------------------------------------------------===//
 
func.func @corner_cases() {
   // CHECK: spirv.Constant false
   %9 = arith.constant false
   // CHECK: spirv.Constant true
   %10 = arith.constant true
 
   return
 }
 
-// CHECK-LABEL: @unsupported_cases
-func.func @unsupported_cases() {
-  // CHECK: %{{.*}} = arith.constant 4294967296 : i64
-  %0 = arith.constant 4294967296 : i64 // 2^32
-  // CHECK: %{{.*}} = arith.constant -2147483649 : i64
-  %1 = arith.constant -2147483649 : i64 // -2^31 - 1
-  // CHECK: %{{.*}} = arith.constant 1.0000000000000002 : f64
-  %2 = arith.constant 0x3FF0000000000001 : f64 // smallest number > 1
-  return
-}
-
 } // end module
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // std cast ops
 //===----------------------------------------------------------------------===//
 

 
 // CHECK-LABEL: @one_elem_vector
 func.func @one_elem_vector(%arg0: vector<1xi32>) {
   // CHECK: spirv.IAdd %{{.+}}, %{{.+}}: i32
   %0 = arith.addi %arg0, %arg0: vector<1xi32>
   return
 }
 
-// CHECK-LABEL: @unsupported_5elem_vector
-func.func @unsupported_5elem_vector(%arg0: vector<5xi32>) {
-  // CHECK: subi
-  %1 = arith.subi %arg0, %arg0: vector<5xi32>
-  return
-}
-
-// CHECK-LABEL: @unsupported_2x2elem_vector
-func.func @unsupported_2x2elem_vector(%arg0: vector<2x2xi32>) {
-  // CHECK: muli
-  %2 = arith.muli %arg0, %arg0: vector<2x2xi32>
-  return
-}
-
 } // end module
 
 // -----
 
 // Check that types are converted to 32-bit when no special capabilities.
 module attributes {
   spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [], []>, #spirv.resource_limits<>>
 } {
func.func @float_scalar(%arg0: f16, %arg1: f64) {
   %1 = arith.mulf %arg1, %arg1: f64
   return
 }
 
 } // end module
 
 // -----
 
-// Check that types are converted to 32-bit when no special capabilities that
-// are not supported.
-module attributes {
-  spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [], []>, #spirv.resource_limits<>>
-} {
-
-func.func @int_vector4_invalid(%arg0: vector<4xi64>) {
-  // expected-error@+1 {{bitwidth emulation is not implemented yet on unsigned op}}
-  %0 = arith.divui %arg0, %arg0: vector<4xi64>
-  return
-}
-
-} // end module
-
-// -----
-
 //===----------------------------------------------------------------------===//
 // std bit ops
 //===----------------------------------------------------------------------===//
 
 module attributes {
   spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [], []>, #spirv.resource_limits<>>
 } {
 
func.func @corner_cases() {
   // CHECK: spirv.Constant false
   %9 = arith.constant false
   // CHECK: spirv.Constant true
   %10 = arith.constant true
 
   return
 }
 
-// CHECK-LABEL: @unsupported_cases
-func.func @unsupported_cases() {
-  // CHECK: %{{.*}} = arith.constant 4294967296 : i64
-  %0 = arith.constant 4294967296 : i64 // 2^32
-  // CHECK: %{{.*}} = arith.constant -2147483649 : i64
-  %1 = arith.constant -2147483649 : i64 // -2^31 - 1
-  // CHECK: %{{.*}} = arith.constant 1.0000000000000002 : f64
-  %2 = arith.constant 0x3FF0000000000001 : f64 // smallest number > 1
-  return
-}
-
 } // end module
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // std cast ops
 //===----------------------------------------------------------------------===//