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ThomasRaoux (Thomas Raoux)
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Jul 29 2019, 2:32 PM (99 w, 8 h)

Recent Activity

Today

ThomasRaoux accepted D104683: [mlir][linalg] Fusion of PadTensorOp.
Mon, Jun 21, 7:46 PM · Restricted Project
ThomasRaoux committed rG1244bca53fb2: [mlir][vector] Support distributing transfer op with permutation map (authored by ThomasRaoux).
[mlir][vector] Support distributing transfer op with permutation map
Mon, Jun 21, 12:56 PM
ThomasRaoux closed D104263: [mlir][vector] Support distributing transfer op with permutation map.
Mon, Jun 21, 12:56 PM · Restricted Project
ThomasRaoux added inline comments to D104263: [mlir][vector] Support distributing transfer op with permutation map.
Mon, Jun 21, 12:50 PM · Restricted Project
ThomasRaoux updated the diff for D104263: [mlir][vector] Support distributing transfer op with permutation map.

Address comments

Mon, Jun 21, 12:49 PM · Restricted Project

Fri, Jun 18

ThomasRaoux added a comment to D104134: [mlir][VectorToGPU] Add conversion for scf::For op with Matrix operands.

ping :)

Fri, Jun 18, 10:07 AM · Restricted Project
ThomasRaoux added a comment to D104133: [mlir][VectorToGPU] Add conversion for splat constant to MMA const matrix.

ping :)

Fri, Jun 18, 10:07 AM · Restricted Project
ThomasRaoux accepted D104357: [mlir][linalg] Lower subtensor(pad_tensor) to pad_tensor(subtensor).
Fri, Jun 18, 8:29 AM · Restricted Project

Thu, Jun 17

ThomasRaoux added inline comments to D104357: [mlir][linalg] Lower subtensor(pad_tensor) to pad_tensor(subtensor).
Thu, Jun 17, 7:44 PM · Restricted Project
ThomasRaoux added inline comments to D104357: [mlir][linalg] Lower subtensor(pad_tensor) to pad_tensor(subtensor).
Thu, Jun 17, 8:57 AM · Restricted Project
ThomasRaoux accepted D104278: [mlir][linalg] Canonicalize PadTensorOp with zero source dimension.
Thu, Jun 17, 8:31 AM · Restricted Project

Tue, Jun 15

ThomasRaoux requested review of D104343: [mlir][vector] Extend vector distribution to all elementwise and contract.
Tue, Jun 15, 5:42 PM · Restricted Project

Mon, Jun 14

ThomasRaoux requested review of D104263: [mlir][vector] Support distributing transfer op with permutation map.
Mon, Jun 14, 1:29 PM · Restricted Project

Fri, Jun 11

ThomasRaoux updated the diff for D104133: [mlir][VectorToGPU] Add conversion for splat constant to MMA const matrix.

Address review comments.

Fri, Jun 11, 5:07 PM · Restricted Project
ThomasRaoux retitled D104134: [mlir][VectorToGPU] Add conversion for scf::For op with Matrix operands from [mlir][ConvertVectorToGPU] Add support for converting scf::For op with Matrix operands to [mlir][VectorToGPU] Add conversion for scf::For op with Matrix operands.
Fri, Jun 11, 3:58 PM · Restricted Project
ThomasRaoux requested review of D104134: [mlir][VectorToGPU] Add conversion for scf::For op with Matrix operands.
Fri, Jun 11, 11:01 AM · Restricted Project
ThomasRaoux requested review of D104133: [mlir][VectorToGPU] Add conversion for splat constant to MMA const matrix.
Fri, Jun 11, 10:39 AM · Restricted Project
ThomasRaoux added inline comments to D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.
Fri, Jun 11, 8:05 AM · Restricted Project
ThomasRaoux committed rGedd9515bd125: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops (authored by ThomasRaoux).
[mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops
Fri, Jun 11, 7:53 AM
ThomasRaoux closed D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.
Fri, Jun 11, 7:53 AM · Restricted Project
ThomasRaoux added a comment to D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.

Thanks Nicolas!

Fri, Jun 11, 7:46 AM · Restricted Project
ThomasRaoux updated the diff for D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.

Rebase and address review feedback

Fri, Jun 11, 7:41 AM · Restricted Project

Thu, Jun 10

ThomasRaoux accepted D104004: [mlir][linalg] Add constant padding helper to PadTensorOp.
Thu, Jun 10, 9:16 AM · Restricted Project
ThomasRaoux added a comment to D103870: [mlir][gpu] Add op to create MMA constant matrix.

This is a great addition. We can bring in a scaling op also which scales mmaMatrix by a certain value. Maybe I can take that up.

It would be nice to be able to handle most of the element-wise ops, ideally we should re-use the std ops but it looks like this would require infrastructure changes to MLIR (https://llvm.discourse.group/t/using-gpu-type-with-standard-ops/3542/2). The best short term solution is probably to add an op taking an attribute like GPU_AllReduceOperationAttr. This is a bit hacky but that would allow us to be able to generate interesting code using the mma ops.

Okay, That would allow us to use the same op and define the semantics of the pointwise op as we like. I will be happy to take this up in the near future. Let me know what you think.

Thu, Jun 10, 8:37 AM · Restricted Project
ThomasRaoux committed rG428a62f65f16: [mlir][gpu] Add op to create MMA constant matrix (authored by ThomasRaoux).
[mlir][gpu] Add op to create MMA constant matrix
Thu, Jun 10, 8:34 AM
ThomasRaoux closed D103870: [mlir][gpu] Add op to create MMA constant matrix.
Thu, Jun 10, 8:34 AM · Restricted Project

Wed, Jun 9

ThomasRaoux added a comment to D103870: [mlir][gpu] Add op to create MMA constant matrix.

This is a great addition. We can bring in a scaling op also which scales mmaMatrix by a certain value. Maybe I can take that up.

Wed, Jun 9, 9:48 AM · Restricted Project
ThomasRaoux added inline comments to D103870: [mlir][gpu] Add op to create MMA constant matrix.
Wed, Jun 9, 9:44 AM · Restricted Project
ThomasRaoux updated the diff for D103870: [mlir][gpu] Add op to create MMA constant matrix.

Address review comments

Wed, Jun 9, 9:43 AM · Restricted Project
ThomasRaoux committed rG9b496c2373dc: [mlir][gpu][NFC] Simplify conversion of MMA type to NVVM (authored by ThomasRaoux).
[mlir][gpu][NFC] Simplify conversion of MMA type to NVVM
Wed, Jun 9, 9:34 AM
ThomasRaoux closed D103868: [mlir][gpu][NFC] Simplify conversion of MMA type to NVVM.
Wed, Jun 9, 9:34 AM · Restricted Project
ThomasRaoux added inline comments to D103868: [mlir][gpu][NFC] Simplify conversion of MMA type to NVVM.
Wed, Jun 9, 9:19 AM · Restricted Project
ThomasRaoux updated the diff for D103868: [mlir][gpu][NFC] Simplify conversion of MMA type to NVVM.

Address review comments

Wed, Jun 9, 9:19 AM · Restricted Project

Mon, Jun 7

ThomasRaoux added a comment to D103870: [mlir][gpu] Add op to create MMA constant matrix.

Patch is on top of https://reviews.llvm.org/D103868

Mon, Jun 7, 10:34 PM · Restricted Project
ThomasRaoux requested review of D103870: [mlir][gpu] Add op to create MMA constant matrix.
Mon, Jun 7, 10:33 PM · Restricted Project
ThomasRaoux requested review of D103868: [mlir][gpu][NFC] Simplify conversion of MMA type to NVVM.
Mon, Jun 7, 10:29 PM · Restricted Project
ThomasRaoux updated the diff for D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.

clang-format

Mon, Jun 7, 10:41 AM · Restricted Project
ThomasRaoux committed rZORGc24b52684776: [MLIR] Enable tensorcore integration tests (authored by ThomasRaoux).
[MLIR] Enable tensorcore integration tests
Mon, Jun 7, 10:10 AM
ThomasRaoux closed D103266: [MLIR] Enable TensorCore integrations tests on Tesla buildbots.
Mon, Jun 7, 10:10 AM
ThomasRaoux updated the diff for D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.

Add missing comment.

Mon, Jun 7, 9:57 AM · Restricted Project
ThomasRaoux added inline comments to D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.
Mon, Jun 7, 9:55 AM · Restricted Project
ThomasRaoux updated the diff for D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.
Mon, Jun 7, 9:50 AM · Restricted Project
ThomasRaoux updated the diff for D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.

Address review comments

Mon, Jun 7, 9:47 AM · Restricted Project

Thu, May 27

ThomasRaoux requested review of D103266: [MLIR] Enable TensorCore integrations tests on Tesla buildbots.
Thu, May 27, 9:52 AM
ThomasRaoux committed rG750799b7bc3f: [mlir][NFC] Don't outline kernel in MMA integration tests (authored by ThomasRaoux).
[mlir][NFC] Don't outline kernel in MMA integration tests
Thu, May 27, 9:45 AM
ThomasRaoux closed D103099: [mlir] Fix gpu MMA integrations tests.
Thu, May 27, 9:45 AM · Restricted Project
ThomasRaoux updated the diff for D103099: [mlir] Fix gpu MMA integrations tests.
Thu, May 27, 9:42 AM · Restricted Project
ThomasRaoux added a comment to D103099: [mlir] Fix gpu MMA integrations tests.

Thanks! this is something I wasn't aware of. BTW I tested these on a Turing with CUDA10.2, and they passed, but maybe they fail on some other devices.

Thu, May 27, 9:18 AM · Restricted Project
ThomasRaoux committed rGb44007bec247: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops. (authored by ThomasRaoux).
[mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.
Thu, May 27, 9:14 AM
ThomasRaoux closed D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops..
Thu, May 27, 9:14 AM · Restricted Project
ThomasRaoux updated the diff for D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops..

remove extra > and rebase.

Thu, May 27, 9:13 AM · Restricted Project
ThomasRaoux requested review of D103253: [mlir][vector] Fold inbound attribute for transfer op with permutations.
Thu, May 27, 7:50 AM · Restricted Project
ThomasRaoux added a reviewer for D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.: nicolasvasilache.
Thu, May 27, 7:42 AM · Restricted Project

Wed, May 26

ThomasRaoux committed rG94d67b51dd02: [mlir] Add n-D vector lowering to LLVM for cast ops (authored by harsh).
[mlir] Add n-D vector lowering to LLVM for cast ops
Wed, May 26, 3:28 PM
ThomasRaoux closed D103207: Add n-D vector lowering to LLVM for cast ops.
Wed, May 26, 3:28 PM · Restricted Project
ThomasRaoux accepted D103207: Add n-D vector lowering to LLVM for cast ops.

Looks good

Wed, May 26, 3:14 PM · Restricted Project
ThomasRaoux accepted D103194: [mlir] Add a pass to distribute linalg::TiledLoopOp..
Wed, May 26, 3:11 PM · Restricted Project
ThomasRaoux committed rGe5eff533f761: [mlir] Make StripDebugInfo strip out block arguments locs (authored by ThomasRaoux).
[mlir] Make StripDebugInfo strip out block arguments locs
Wed, May 26, 11:06 AM
ThomasRaoux closed D103187: [mlir] Make StripDebugInfo strip out block arguments locs.
Wed, May 26, 11:06 AM · Restricted Project
ThomasRaoux edited reviewers for D103187: [mlir] Make StripDebugInfo strip out block arguments locs, added: rriddle; removed: mravishankar.
Wed, May 26, 10:35 AM · Restricted Project
ThomasRaoux removed a reviewer for D103187: [mlir] Make StripDebugInfo strip out block arguments locs: mravishankar.
Wed, May 26, 10:31 AM · Restricted Project
ThomasRaoux edited reviewers for D103187: [mlir] Make StripDebugInfo strip out block arguments locs, added: Alexander; removed: mravishankar.
Wed, May 26, 10:31 AM · Restricted Project
ThomasRaoux requested review of D103187: [mlir] Make StripDebugInfo strip out block arguments locs.
Wed, May 26, 10:30 AM · Restricted Project

Tue, May 25

ThomasRaoux added a comment to D103099: [mlir] Fix gpu MMA integrations tests.

The test had started failing with https://github.com/llvm/llvm-project/commit/81467f500f6ad106a69088bc276024c5e1938571. I'll also enable those tests in google build bots that have Tesla T4 GPUs once this is fixed.

Tue, May 25, 12:03 PM · Restricted Project
ThomasRaoux requested review of D103099: [mlir] Fix gpu MMA integrations tests.
Tue, May 25, 9:34 AM · Restricted Project
ThomasRaoux added a comment to D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops..

Note that I was also considering just removing the "DOp" altogether and have it always use "COp" but I didn't know if it was consistent with the direction you have in mind. This would be a good step in the direction of potentially removing those operands altogether.
Let me know what you think.

Hi @ThomasRaoux, It Seems like DOp is redundant. Everyone(performance-centric) would use the ops in the pattern you have in the test case. So it would be good if we could simply drop DOp and use COp instead.

Tue, May 25, 6:33 AM · Restricted Project
ThomasRaoux updated the diff for D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops..
Tue, May 25, 6:33 AM · Restricted Project

Mon, May 24

ThomasRaoux committed rGdae90386116f: [mlir] Lower sm version for TensorCore intergration tests (authored by ThomasRaoux).
[mlir] Lower sm version for TensorCore intergration tests
Mon, May 24, 2:46 PM
ThomasRaoux closed D103049: [mlir] Use lower sm version for TensorCore intergration tests.
Mon, May 24, 2:45 PM · Restricted Project
ThomasRaoux requested review of D103049: [mlir] Use lower sm version for TensorCore intergration tests.
Mon, May 24, 2:36 PM · Restricted Project
ThomasRaoux committed rG505933a48920: [NVPTX] Fix lowering of frem for negative values (authored by ThomasRaoux).
[NVPTX] Fix lowering of frem for negative values
Mon, May 24, 7:46 AM
ThomasRaoux closed D102528: [NVPTX] Fix lowering of frem for negative values.
Mon, May 24, 7:46 AM · Restricted Project
ThomasRaoux added a comment to D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops..

Note that I was also considering just removing the "DOp" altogether and have it always use "COp" but I didn't know if it was consistent with the direction you have in mind. This would be a good step in the direction of potentially removing those operands altogether.
Let me know what you think.

Mon, May 24, 7:03 AM · Restricted Project
ThomasRaoux requested review of D103023: [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops..
Mon, May 24, 7:02 AM · Restricted Project
ThomasRaoux abandoned D102953: [mlir][GPU] Make MMAMatrixStorage hash unique for a given type..
Mon, May 24, 5:48 AM · Restricted Project
ThomasRaoux added a comment to D102953: [mlir][GPU] Make MMAMatrixStorage hash unique for a given type..

Hi @ThomasRaoux,

Great to see this, But I am not fully sure why the earlier key did not work? Isn't the underlying data used to generate the hashCode for ArrayRef<> and StirngRef<>. Here are some references from llvm/include/llvm/ADT/ArrayRef.h and llvm/lib/Support/StringRef.cpp.

template <typename T> hash_code hash_value(ArrayRef<T> S) {
  return hash_combine_range(S.begin(), S.end());
}
// Implementation of StringRef hashing.
hash_code llvm::hash_value(StringRef S) {
  return hash_combine_range(S.begin(), S.end());
}

Also, I remember before moving to tablegen, MemRefTypeStorage was using this as the KeyTy,

std::tuple<ArrayRef<int64_t>, Type, ArrayRef<AffineMap>, unsigned>

and now its,

std::tuple<::llvm::ArrayRef<int64_t>, Type, ::llvm::ArrayRef<AffineMap>, Attribute>

It seems like the earlier key would have worked. Please let me know If I am missing something.

Thanks!

Mon, May 24, 5:48 AM · Restricted Project

May 21 2021

ThomasRaoux updated the diff for D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.
May 21 2021, 10:50 PM · Restricted Project
ThomasRaoux retitled D102953: [mlir][GPU] Make MMAMatrixStorage hash unique for a given type. from [GPU] Make MMAMatrixStorage hash unique for a given type. to [mlir][GPU] Make MMAMatrixStorage hash unique for a given type..
May 21 2021, 6:25 PM · Restricted Project
ThomasRaoux requested review of D102962: [mlir][VectorToGPU] First step to convert vector ops to GPU MMA ops.
May 21 2021, 6:25 PM · Restricted Project
ThomasRaoux requested review of D102953: [mlir][GPU] Make MMAMatrixStorage hash unique for a given type..
May 21 2021, 4:19 PM · Restricted Project
ThomasRaoux added a comment to D95334: [MLIR][GPU] Add CUDA Tensor core WMMA test.

I just realized that getting these test cases in will mean check-mlir will fail for all those without tensor cores on GPUs (if they are configuring with NVPTX)! Can we add an -DMLIR_ENABLE_CUDA_TENSOR_CORES and have these tests run under that? @ftynse @ThomasRaoux

May 21 2021, 9:19 AM · Restricted Project

May 17 2021

ThomasRaoux added inline comments to D102593: [mlir] Use VectorTransferLoweringPatterns in VectorToSCF.
May 17 2021, 8:12 PM · Restricted Project
ThomasRaoux added inline comments to D102593: [mlir] Use VectorTransferLoweringPatterns in VectorToSCF.
May 17 2021, 8:11 PM · Restricted Project

May 16 2021

ThomasRaoux accepted D102548: [mlir] Lower permutation maps on TransferWriteOps.
May 16 2021, 10:19 PM · Restricted Project
ThomasRaoux accepted D102572: [mlir] Fix in_bounds attr handling in TransferReadPermutationLowering.
May 16 2021, 10:09 PM · Restricted Project

May 14 2021

ThomasRaoux added a reviewer for D102528: [NVPTX] Fix lowering of frem for negative values: timshen.
May 14 2021, 1:26 PM · Restricted Project
ThomasRaoux added a reviewer for D102528: [NVPTX] Fix lowering of frem for negative values: jholewinski.
May 14 2021, 1:19 PM · Restricted Project
ThomasRaoux requested review of D102528: [NVPTX] Fix lowering of frem for negative values.
May 14 2021, 1:18 PM · Restricted Project

May 12 2021

ThomasRaoux accepted D102324: [mlir][linalg] Remove template parameter from loop lowering..

LGTM

May 12 2021, 6:45 AM · Restricted Project

May 11 2021

ThomasRaoux added inline comments to D101745: [mlir] Fix masked vector transfer ops with broadcasts.
May 11 2021, 11:36 PM · Restricted Project
ThomasRaoux added inline comments to D101745: [mlir] Fix masked vector transfer ops with broadcasts.
May 11 2021, 9:19 PM · Restricted Project
ThomasRaoux added inline comments to D102222: [mlir] Support masks in TransferOpReduceRank and TransferReadPermutationLowering.
May 11 2021, 8:59 PM · Restricted Project
ThomasRaoux requested changes to D102222: [mlir] Support masks in TransferOpReduceRank and TransferReadPermutationLowering.
May 11 2021, 7:58 AM · Restricted Project

May 10 2021

ThomasRaoux accepted D102187: [mlir][linalg] Remove IndexedGenericOp support from LinalgToLoops....

Nice!

May 10 2021, 2:21 PM · Restricted Project

May 7 2021

ThomasRaoux added inline comments to D102034: [mlir][vector] add pattern to cast away leading unit dim for elementwise op.
May 7 2021, 5:13 PM · Restricted Project
ThomasRaoux committed rG6aaf06f92988: [mlir][vector] Fix warning (authored by ThomasRaoux).
[mlir][vector] Fix warning
May 7 2021, 5:13 PM
ThomasRaoux committed rGb90b66bcbe3e: [mlir] Missed clang-format (authored by ThomasRaoux).
[mlir] Missed clang-format
May 7 2021, 1:58 PM
ThomasRaoux committed rGd0453a8933a1: [mlir][vector] Extend pattern to trim lead unit dimension to Splat Op (authored by ThomasRaoux).
[mlir][vector] Extend pattern to trim lead unit dimension to Splat Op
May 7 2021, 1:56 PM
ThomasRaoux closed D102091: [mlir][vector] Extend pattern to trim lead unit dimension to Splat Op.
May 7 2021, 1:56 PM · Restricted Project
ThomasRaoux requested review of D102091: [mlir][vector] Extend pattern to trim lead unit dimension to Splat Op.
May 7 2021, 1:51 PM · Restricted Project