[SDAG] Print divergence in SDNode::dump

[rampitec]

Summary

If target does not support divergence the field is set to false
and not printed.

[arsenm]

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

1070

Should print this before the operands so it's attached to the node name. Placement at the end makes it look like it's the one operand

[foad]

Can this use the same # D:1 style of output that you get with -dag-dump-verbose?

[rampitec]

Moved info right after the node and use the same style as -dag-dump-verbose.
Avoid info duplication if -dag-dump-verbose is used.

[arsenm]

Not sure what the point of the ":1" part is

[rampitec]

In D133984#3796106, @arsenm wrote:

Not sure what the point of the ":1" part is

Just to match -dag-dump-verbose style. This used D:0 and D:1 to always dump it.

[thakis]

The test fails on non-linux:
http://45.33.8.238/macm1/44600/step_11.txt
http://45.33.8.238/win/66403/step_11.txt

Don't use |&, it's not portable.

Please take a look and revert for now if it takes a while to fix.

[rampitec]

In D133984#3796228, @thakis wrote:

The test fails on non-linux:
http://45.33.8.238/macm1/44600/step_11.txt
http://45.33.8.238/win/66403/step_11.txt

Don't use |&, it's not portable.

Please take a look and revert for now if it takes a while to fix.

Already fixed: https://reviews.llvm.org/rG167826ee12e7
Sorry.

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
   // Don't print impossibly deep things.
   dumprWithDepth(G, 10);
 }
 #endif
 
 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
   printr(OS, G);
+  // Under VerboseDAGDumping divergence will be printed always.
+  if (isDivergent() && !VerboseDAGDumping)
+    OS << " # D:1";
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
     if (i) OS << ", "; else OS << " ";
     printOperand(OS, G, getOperand(i));
   }
   if (DebugLoc DL = getDebugLoc()) {
     OS << ", ";
     DL.print(OS);
   }
 }

llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll

+; RUN: llc -march=amdgcn -mcpu=gfx900 -O0 -verify-machineinstrs < %s -debug-only=isel -o /dev/null |& FileCheck --check-prefixes=GCN,GCN-DEFAULT %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -O0 -verify-machineinstrs < %s -debug-only=isel -dag-dump-verbose -o /dev/null |& FileCheck --check-prefixes=GCN,GCN-VERBOSE %s
+
+; REQUIRES: asserts
+
+; GCN-LABEL: === test_sdag_dump
+; GCN: Initial selection DAG: %bb.0 'test_sdag_dump:entry'
+; GCN: SelectionDAG has 10 nodes:
+
+; GCN-DEFAULT:  t0: ch = EntryToken
+; GCN-DEFAULT:  t2: f32,ch = CopyFromReg t0, Register:f32 %0
+; GCN-DEFAULT:      t5: f32 = fadd t2, t2
+; GCN-DEFAULT:      t4: f32,ch = CopyFromReg # D:1 t0, Register:f32 %1
+; GCN-DEFAULT:    t6: f32 = fadd # D:1 t5, t4
+; GCN-DEFAULT:  t8: ch,glue = CopyToReg # D:1 t0, Register:f32 $vgpr0, t6
+; GCN-DEFAULT:  t9: ch = RETURN_TO_EPILOG # D:1 t8, Register:f32 $vgpr0, t8:1
+
+; GCN-VERBOSE:  t0: ch = EntryToken # D:0
+; GCN-VERBOSE:  t2: f32,ch = CopyFromReg [ORD=1] # D:0 t0, Register:f32 %0 # D:0
+; GCN-VERBOSE:      t5: f32 = fadd [ORD=2] # D:0 t2, t2
+; GCN-VERBOSE:      t4: f32,ch = CopyFromReg [ORD=1] # D:1 t0, Register:f32 %1 # D:0
+; GCN-VERBOSE:    t6: f32 = fadd [ORD=3] # D:1 t5, t4
+; GCN-VERBOSE:  t8: ch,glue = CopyToReg [ORD=4] # D:1 t0, Register:f32 $vgpr0 # D:0, t6
+; GCN-VERBOSE:  t9: ch = RETURN_TO_EPILOG [ORD=4] # D:1 t8, Register:f32 $vgpr0 # D:0, t8:1
+
+define amdgpu_ps float @test_sdag_dump(float inreg %scalar, float %vector)  {
+entry:
+  %sadd = fadd float %scalar, %scalar
+  %ret = fadd float %sadd, %vector
+  ret float %ret
+}
+
+declare i32 @llvm.amdgcn.workitem.id.x()