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Differential D130518

[SPIRV] use tablegen to create SPIRVBaseInfo*
ClosedPublic

Authored by iliya-diyachkov on Jul 25 2022, 2:31 PM.

Details

Reviewers
zuban32
rengolin
MaskRay
arsenm
konrad.trifunovic
mpaszkowski
andreytr
Commits
rGb25b507c7797: [SPIRV] use tablegen to create SPIRVBaseInfo*
Summary

The patch replaces SPIRVBaseInfo.* previously created using macros by the tablegen approach. There are many small changes in other files (in names of namespace) because tablegen cannot generate enum classes, so table-generated enums are wrapped in a namespaces with the same name. Also, functions in SPIRVUtils are moved to the llvm namespace.

Diff Detail

Event Timeline

iliya-diyachkov created this revision.Jul 25 2022, 2:31 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 25 2022, 2:31 PM
Herald added subscribers: StephenFan, ThomasRaoux, hiraditya, mgorny. · View Herald Transcript
iliya-diyachkov requested review of this revision.Jul 25 2022, 2:31 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 25 2022, 2:31 PM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
Harbormaster completed remote builds in B177469: Diff 447464.Jul 25 2022, 4:55 PM
iliya-diyachkov updated this revision to Diff 447880.Jul 26 2022, 4:56 PM

Fix building by clang.

Harbormaster completed remote builds in B177749: Diff 447880.Jul 26 2022, 5:49 PM
mpaszkowski accepted this revision.Aug 1 2022, 8:52 AM

Thank you for preparing the patch @iliya-diyachkov! LGTM!

This revision is now accepted and ready to land.Aug 1 2022, 8:52 AM
This revision was landed with ongoing or failed builds.Aug 1 2022, 3:15 PM
Closed by commit rGb25b507c7797: [SPIRV] use tablegen to create SPIRVBaseInfo* (authored by iliya-diyachkov). · Explain Why
This revision was automatically updated to reflect the committed changes.
iliya-diyachkov added a commit: rGb25b507c7797: [SPIRV] use tablegen to create SPIRVBaseInfo*.

Revision Contents

Diff 449142

llvm/lib/Target/SPIRV/CMakeLists.txt

add_llvm_component_group(SPIRV) add_llvm_component_group(SPIRV)
set(LLVM_TARGET_DEFINITIONS SPIRV.td) set(LLVM_TARGET_DEFINITIONS SPIRV.td)
tablegen(LLVM SPIRVGenAsmWriter.inc -gen-asm-writer) tablegen(LLVM SPIRVGenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM SPIRVGenGlobalISel.inc -gen-global-isel) tablegen(LLVM SPIRVGenGlobalISel.inc -gen-global-isel)
tablegen(LLVM SPIRVGenInstrInfo.inc -gen-instr-info) tablegen(LLVM SPIRVGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM SPIRVGenMCCodeEmitter.inc -gen-emitter) tablegen(LLVM SPIRVGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM SPIRVGenRegisterBank.inc -gen-register-bank) tablegen(LLVM SPIRVGenRegisterBank.inc -gen-register-bank)
tablegen(LLVM SPIRVGenRegisterInfo.inc -gen-register-info) tablegen(LLVM SPIRVGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM SPIRVGenSubtargetInfo.inc -gen-subtarget) tablegen(LLVM SPIRVGenSubtargetInfo.inc -gen-subtarget)
tablegen(LLVM SPIRVGenTables.inc -gen-searchable-tables)
add_public_tablegen_target(SPIRVCommonTableGen) add_public_tablegen_target(SPIRVCommonTableGen)
add_llvm_target(SPIRVCodeGen add_llvm_target(SPIRVCodeGen
SPIRVAsmPrinter.cpp SPIRVAsmPrinter.cpp
SPIRVCallLowering.cpp SPIRVCallLowering.cpp
SPIRVDuplicatesTracker.cpp SPIRVDuplicatesTracker.cpp
SPIRVEmitIntrinsics.cpp SPIRVEmitIntrinsics.cpp
Show All 35 Lines

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h

//===-- SPIRVBaseInfo.h - Top level definitions for SPIRV ------*- C++ -*-===// //===-- SPIRVBaseInfo.h - Top level SPIRV definitions -----------*- C++ -*-===//
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// This file contains small standalone helper functions and enum definitions for // This file contains TableGen generated enum definitions, mnemonic lookup
// the SPIRV target useful for the compiler back-end and the MC libraries. // functions, versioning/capabilities/extensions getters for symbolic/named
// As such, it deliberately does not include references to LLVM core // operands for various SPIR-V instructions.
// code gen types, passes, etc..
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVBASEINFO_H #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVSYMBOLICOPERANDS_H
#define LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVBASEINFO_H #define LLVM_LIB_TARGET_SPIRV_SPIRVSYMBOLICOPERANDS_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h" #include "llvm/ADT/StringRef.h"
#include <string> #include <string>
namespace llvm { namespace llvm {
namespace SPIRV { namespace SPIRV {
enum class Capability : uint32_t { namespace OperandCategory {
Matrix = 0, #define GET_OperandCategory_DECL
Shader = 1, #include "SPIRVGenTables.inc"
Geometry = 2, } // namespace OperandCategory
Tessellation = 3,
Addresses = 4, namespace Extension {
Linkage = 5, #define GET_Extension_DECL
Kernel = 6, #include "SPIRVGenTables.inc"
Vector16 = 7, } // namespace Extension
Float16Buffer = 8,
Float16 = 9, namespace Capability {
Float64 = 10, #define GET_Capability_DECL
Int64 = 11, #include "SPIRVGenTables.inc"
Int64Atomics = 12, } // namespace Capability
ImageBasic = 13,
ImageReadWrite = 14, namespace SourceLanguage {
ImageMipmap = 15, #define GET_SourceLanguage_DECL
Pipes = 17, #include "SPIRVGenTables.inc"
Groups = 18, } // namespace SourceLanguage
DeviceEnqueue = 19,
LiteralSampler = 20, namespace AddressingModel {
AtomicStorage = 21, #define GET_AddressingModel_DECL
Int16 = 22, #include "SPIRVGenTables.inc"
TessellationPointSize = 23, } // namespace AddressingModel
GeometryPointSize = 24,
ImageGatherExtended = 25, namespace ExecutionModel {
StorageImageMultisample = 27, #define GET_ExecutionModel_DECL
UniformBufferArrayDynamicIndexing = 28, #include "SPIRVGenTables.inc"
SampledImageArrayDymnamicIndexing = 29, } // namespace ExecutionModel
ClipDistance = 32,
CullDistance = 33, namespace MemoryModel {
ImageCubeArray = 34, #define GET_MemoryModel_DECL
SampleRateShading = 35, #include "SPIRVGenTables.inc"
ImageRect = 36, } // namespace MemoryModel
SampledRect = 37,
GenericPointer = 38, namespace ExecutionMode {
Int8 = 39, #define GET_ExecutionMode_DECL
InputAttachment = 40, #include "SPIRVGenTables.inc"
SparseResidency = 41, } // namespace ExecutionMode
MinLod = 42,
Sampled1D = 43, namespace StorageClass {
Image1D = 44, #define GET_StorageClass_DECL
SampledCubeArray = 45, #include "SPIRVGenTables.inc"
SampledBuffer = 46, } // namespace StorageClass
ImageBuffer = 47,
ImageMSArray = 48, namespace Dim {
StorageImageExtendedFormats = 49, #define GET_Dim_DECL
ImageQuery = 50, #include "SPIRVGenTables.inc"
DerivativeControl = 51, } // namespace Dim
InterpolationFunction = 52,
TransformFeedback = 53, namespace SamplerAddressingMode {
GeometryStreams = 54, #define GET_SamplerAddressingMode_DECL
StorageImageReadWithoutFormat = 55, #include "SPIRVGenTables.inc"
StorageImageWriteWithoutFormat = 56, } // namespace SamplerAddressingMode
MultiViewport = 57,
SubgroupDispatch = 58, namespace SamplerFilterMode {
NamedBarrier = 59, #define GET_SamplerFilterMode_DECL
PipeStorage = 60, #include "SPIRVGenTables.inc"
GroupNonUniform = 61, } // namespace SamplerFilterMode
GroupNonUniformVote = 62,
GroupNonUniformArithmetic = 63, namespace ImageFormat {
GroupNonUniformBallot = 64, #define GET_ImageFormat_DECL
GroupNonUniformShuffle = 65, #include "SPIRVGenTables.inc"
GroupNonUniformShuffleRelative = 66, } // namespace ImageFormat
GroupNonUniformClustered = 67,
GroupNonUniformQuad = 68, namespace ImageChannelOrder {
SubgroupBallotKHR = 4423, #define GET_ImageChannelOrder_DECL
DrawParameters = 4427, #include "SPIRVGenTables.inc"
SubgroupVoteKHR = 4431, } // namespace ImageChannelOrder
StorageBuffer16BitAccess = 4433,
StorageUniform16 = 4434, namespace ImageChannelDataType {
StoragePushConstant16 = 4435, #define GET_ImageChannelDataType_DECL
StorageInputOutput16 = 4436, #include "SPIRVGenTables.inc"
DeviceGroup = 4437, } // namespace ImageChannelDataType
MultiView = 4439,
VariablePointersStorageBuffer = 4441, namespace ImageOperand {
VariablePointers = 4442, #define GET_ImageOperand_DECL
AtomicStorageOps = 4445, #include "SPIRVGenTables.inc"
SampleMaskPostDepthCoverage = 4447, } // namespace ImageOperand
StorageBuffer8BitAccess = 4448,
UniformAndStorageBuffer8BitAccess = 4449, namespace FPFastMathMode {
StoragePushConstant8 = 4450, #define GET_FPFastMathMode_DECL
DenormPreserve = 4464, #include "SPIRVGenTables.inc"
DenormFlushToZero = 4465, } // namespace FPFastMathMode
SignedZeroInfNanPreserve = 4466,
RoundingModeRTE = 4467, namespace FPRoundingMode {
RoundingModeRTZ = 4468, #define GET_FPRoundingMode_DECL
Float16ImageAMD = 5008, #include "SPIRVGenTables.inc"
ImageGatherBiasLodAMD = 5009, } // namespace FPRoundingMode
FragmentMaskAMD = 5010,
StencilExportEXT = 5013, namespace LinkageType {
ImageReadWriteLodAMD = 5015, #define GET_LinkageType_DECL
SampleMaskOverrideCoverageNV = 5249, #include "SPIRVGenTables.inc"
GeometryShaderPassthroughNV = 5251, } // namespace LinkageType
ShaderViewportIndexLayerEXT = 5254,
ShaderViewportMaskNV = 5255, namespace AccessQualifier {
ShaderStereoViewNV = 5259, #define GET_AccessQualifier_DECL
PerViewAttributesNV = 5260, #include "SPIRVGenTables.inc"
FragmentFullyCoveredEXT = 5265, } // namespace AccessQualifier
MeshShadingNV = 5266,
ShaderNonUniformEXT = 5301, namespace FunctionParameterAttribute {
RuntimeDescriptorArrayEXT = 5302, #define GET_FunctionParameterAttribute_DECL
InputAttachmentArrayDynamicIndexingEXT = 5303, #include "SPIRVGenTables.inc"
UniformTexelBufferArrayDynamicIndexingEXT = 5304, } // namespace FunctionParameterAttribute
StorageTexelBufferArrayDynamicIndexingEXT = 5305,
UniformBufferArrayNonUniformIndexingEXT = 5306, namespace Decoration {
SampledImageArrayNonUniformIndexingEXT = 5307, #define GET_Decoration_DECL
StorageBufferArrayNonUniformIndexingEXT = 5308, #include "SPIRVGenTables.inc"
StorageImageArrayNonUniformIndexingEXT = 5309, } // namespace Decoration
InputAttachmentArrayNonUniformIndexingEXT = 5310,
UniformTexelBufferArrayNonUniformIndexingEXT = 5311, namespace BuiltIn {
StorageTexelBufferArrayNonUniformIndexingEXT = 5312, #define GET_BuiltIn_DECL
RayTracingNV = 5340, #include "SPIRVGenTables.inc"
SubgroupShuffleINTEL = 5568, } // namespace BuiltIn
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570, namespace SelectionControl {
SubgroupImageMediaBlockIOINTEL = 5579, #define GET_SelectionControl_DECL
SubgroupAvcMotionEstimationINTEL = 5696, #include "SPIRVGenTables.inc"
SubgroupAvcMotionEstimationIntraINTEL = 5697, } // namespace SelectionControl
SubgroupAvcMotionEstimationChromaINTEL = 5698,
GroupNonUniformPartitionedNV = 5297, namespace LoopControl {
VulkanMemoryModelKHR = 5345, #define GET_LoopControl_DECL
VulkanMemoryModelDeviceScopeKHR = 5346, #include "SPIRVGenTables.inc"
ImageFootprintNV = 5282, } // namespace LoopControl
FragmentBarycentricNV = 5284,
ComputeDerivativeGroupQuadsNV = 5288, namespace FunctionControl {
ComputeDerivativeGroupLinearNV = 5350, #define GET_FunctionControl_DECL
FragmentDensityEXT = 5291, #include "SPIRVGenTables.inc"
PhysicalStorageBufferAddressesEXT = 5347, } // namespace FunctionControl
CooperativeMatrixNV = 5357,
}; namespace MemorySemantics {
StringRef getCapabilityName(Capability e); #define GET_MemorySemantics_DECL
#include "SPIRVGenTables.inc"
enum class SourceLanguage : uint32_t { } // namespace MemorySemantics
Unknown = 0,
ESSL = 1, namespace MemoryOperand {
GLSL = 2, #define GET_MemoryOperand_DECL
OpenCL_C = 3, #include "SPIRVGenTables.inc"
OpenCL_CPP = 4, } // namespace MemoryOperand
HLSL = 5,
}; namespace Scope {
StringRef getSourceLanguageName(SourceLanguage e); #define GET_Scope_DECL
#include "SPIRVGenTables.inc"
enum class AddressingModel : uint32_t { } // namespace Scope
Logical = 0,
Physical32 = 1, namespace GroupOperation {
Physical64 = 2, #define GET_GroupOperation_DECL
PhysicalStorageBuffer64EXT = 5348, #include "SPIRVGenTables.inc"
}; } // namespace GroupOperation
StringRef getAddressingModelName(AddressingModel e);
namespace KernelEnqueueFlags {
enum class ExecutionModel : uint32_t { #define GET_KernelEnqueueFlags_DECL
Vertex = 0, #include "SPIRVGenTables.inc"
TessellationControl = 1, } // namespace KernelEnqueueFlags
TessellationEvaluation = 2,
Geometry = 3, namespace KernelProfilingInfo {
Fragment = 4, #define GET_KernelProfilingInfo_DECL
GLCompute = 5, #include "SPIRVGenTables.inc"
Kernel = 6, } // namespace KernelProfilingInfo
TaskNV = 5267,
MeshNV = 5268, namespace OpenCLExtInst {
RayGenerationNV = 5313, #define GET_OpenCLExtInst_DECL
IntersectionNV = 5314, #include "SPIRVGenTables.inc"
AnyHitNV = 5315, } // namespace OpenCLExtInst
ClosestHitNV = 5316,
MissNV = 5317, namespace GLSLExtInst {
CallableNV = 5318, #define GET_GLSLExtInst_DECL
}; #include "SPIRVGenTables.inc"
StringRef getExecutionModelName(ExecutionModel e); } // namespace GLSLExtInst
enum class MemoryModel : uint32_t { namespace Opcode {
Simple = 0, #define GET_Opcode_DECL
GLSL450 = 1, #include "SPIRVGenTables.inc"
OpenCL = 2, } // namespace Opcode
VulkanKHR = 3,
};
StringRef getMemoryModelName(MemoryModel e);
enum class ExecutionMode : uint32_t {
Invocations = 0,
SpacingEqual = 1,
SpacingFractionalEven = 2,
SpacingFractionalOdd = 3,
VertexOrderCw = 4,
VertexOrderCcw = 5,
PixelCenterInteger = 6,
OriginUpperLeft = 7,
OriginLowerLeft = 8,
EarlyFragmentTests = 9,
PointMode = 10,
Xfb = 11,
DepthReplacing = 12,
DepthGreater = 14,
DepthLess = 15,
DepthUnchanged = 16,
LocalSize = 17,
LocalSizeHint = 18,
InputPoints = 19,
InputLines = 20,
InputLinesAdjacency = 21,
Triangles = 22,
InputTrianglesAdjacency = 23,
Quads = 24,
Isolines = 25,
OutputVertices = 26,
OutputPoints = 27,
OutputLineStrip = 28,
OutputTriangleStrip = 29,
VecTypeHint = 30,
ContractionOff = 31,
Initializer = 33,
Finalizer = 34,
SubgroupSize = 35,
SubgroupsPerWorkgroup = 36,
SubgroupsPerWorkgroupId = 37,
LocalSizeId = 38,
LocalSizeHintId = 39,
PostDepthCoverage = 4446,
DenormPreserve = 4459,
DenormFlushToZero = 4460,
SignedZeroInfNanPreserve = 4461,
RoundingModeRTE = 4462,
RoundingModeRTZ = 4463,
StencilRefReplacingEXT = 5027,
OutputLinesNV = 5269,
DerivativeGroupQuadsNV = 5289,
DerivativeGroupLinearNV = 5290,
OutputTrianglesNV = 5298,
};
StringRef getExecutionModeName(ExecutionMode e);
enum class StorageClass : uint32_t {
UniformConstant = 0,
Input = 1,
Uniform = 2,
Output = 3,
Workgroup = 4,
CrossWorkgroup = 5,
Private = 6,
Function = 7,
Generic = 8,
PushConstant = 9,
AtomicCounter = 10,
Image = 11,
StorageBuffer = 12,
CallableDataNV = 5328,
IncomingCallableDataNV = 5329,
RayPayloadNV = 5338,
HitAttributeNV = 5339,
IncomingRayPayloadNV = 5342,
ShaderRecordBufferNV = 5343,
PhysicalStorageBufferEXT = 5349,
};
StringRef getStorageClassName(StorageClass e);
enum class Dim : uint32_t {
DIM_1D = 0,
DIM_2D = 1,
DIM_3D = 2,
DIM_Cube = 3,
DIM_Rect = 4,
DIM_Buffer = 5,
DIM_SubpassData = 6,
};
StringRef getDimName(Dim e);
enum class SamplerAddressingMode : uint32_t {
None = 0,
ClampToEdge = 1,
Clamp = 2,
Repeat = 3,
RepeatMirrored = 4,
};
StringRef getSamplerAddressingModeName(SamplerAddressingMode e);
enum class SamplerFilterMode : uint32_t {
Nearest = 0,
Linear = 1,
};
StringRef getSamplerFilterModeName(SamplerFilterMode e);
enum class ImageFormat : uint32_t {
Unknown = 0,
Rgba32f = 1,
Rgba16f = 2,
R32f = 3,
Rgba8 = 4,
Rgba8Snorm = 5,
Rg32f = 6,
Rg16f = 7,
R11fG11fB10f = 8,
R16f = 9,
Rgba16 = 10,
Rgb10A2 = 11,
Rg16 = 12,
Rg8 = 13,
R16 = 14,
R8 = 15,
Rgba16Snorm = 16,
Rg16Snorm = 17,
Rg8Snorm = 18,
R16Snorm = 19,
R8Snorm = 20,
Rgba32i = 21,
Rgba16i = 22,
Rgba8i = 23,
R32i = 24,
Rg32i = 25,
Rg16i = 26,
Rg8i = 27,
R16i = 28,
R8i = 29,
Rgba32ui = 30,
Rgba16ui = 31,
Rgba8ui = 32,
R32ui = 33,
Rgb10a2ui = 34,
Rg32ui = 35,
Rg16ui = 36,
Rg8ui = 37,
R16ui = 38,
R8ui = 39,
};
StringRef getImageFormatName(ImageFormat e);
enum class ImageChannelOrder : uint32_t {
R = 0,
A = 1,
RG = 2,
RA = 3,
RGB = 4,
RGBA = 5,
BGRA = 6,
ARGB = 7,
Intensity = 8,
Luminance = 9,
Rx = 10,
RGx = 11,
RGBx = 12,
Depth = 13,
DepthStencil = 14,
sRGB = 15,
sRGBx = 16,
sRGBA = 17,
sBGRA = 18,
ABGR = 19,
};
StringRef getImageChannelOrderName(ImageChannelOrder e);
enum class ImageChannelDataType : uint32_t {
SnormInt8 = 0,
SnormInt16 = 1,
UnormInt8 = 2,
UnormInt16 = 3,
UnormShort565 = 4,
UnormShort555 = 5,
UnormInt101010 = 6,
SignedInt8 = 7,
SignedInt16 = 8,
SignedInt32 = 9,
UnsignedInt8 = 10,
UnsignedInt16 = 11,
UnsigendInt32 = 12,
HalfFloat = 13,
Float = 14,
UnormInt24 = 15,
UnormInt101010_2 = 16,
};
StringRef getImageChannelDataTypeName(ImageChannelDataType e);
enum class ImageOperand : uint32_t {
None = 0x0,
Bias = 0x1,
Lod = 0x2,
Grad = 0x4,
ConstOffset = 0x8,
Offset = 0x10,
ConstOffsets = 0x20,
Sample = 0x40,
MinLod = 0x80,
MakeTexelAvailableKHR = 0x100,
MakeTexelVisibleKHR = 0x200,
NonPrivateTexelKHR = 0x400,
VolatileTexelKHR = 0x800,
SignExtend = 0x1000,
ZeroExtend = 0x2000,
};
std::string getImageOperandName(uint32_t e);
enum class FPFastMathMode : uint32_t {
None = 0x0,
NotNaN = 0x1,
NotInf = 0x2,
NSZ = 0x4,
AllowRecip = 0x8,
Fast = 0x10,
};
std::string getFPFastMathModeName(uint32_t e);
enum class FPRoundingMode : uint32_t {
RTE = 0,
RTZ = 1,
RTP = 2,
RTN = 3,
};
StringRef getFPRoundingModeName(FPRoundingMode e);
enum class LinkageType : uint32_t {
Export = 0,
Import = 1,
};
StringRef getLinkageTypeName(LinkageType e);
enum class AccessQualifier : uint32_t {
ReadOnly = 0,
WriteOnly = 1,
ReadWrite = 2,
};
StringRef getAccessQualifierName(AccessQualifier e);
enum class FunctionParameterAttribute : uint32_t {
Zext = 0,
Sext = 1,
ByVal = 2,
Sret = 3,
NoAlias = 4,
NoCapture = 5,
NoWrite = 6,
NoReadWrite = 7,
};
StringRef getFunctionParameterAttributeName(FunctionParameterAttribute e);
enum class Decoration : uint32_t {
RelaxedPrecision = 0,
SpecId = 1,
Block = 2,
BufferBlock = 3,
RowMajor = 4,
ColMajor = 5,
ArrayStride = 6,
MatrixStride = 7,
GLSLShared = 8,
GLSLPacked = 9,
CPacked = 10,
BuiltIn = 11,
NoPerspective = 13,
Flat = 14,
Patch = 15,
Centroid = 16,
Sample = 17,
Invariant = 18,
Restrict = 19,
Aliased = 20,
Volatile = 21,
Constant = 22,
Coherent = 23,
NonWritable = 24,
NonReadable = 25,
Uniform = 26,
UniformId = 27,
SaturatedConversion = 28,
Stream = 29,
Location = 30,
Component = 31,
Index = 32,
Binding = 33,
DescriptorSet = 34,
Offset = 35,
XfbBuffer = 36,
XfbStride = 37,
FuncParamAttr = 38,
FPRoundingMode = 39,
FPFastMathMode = 40,
LinkageAttributes = 41,
NoContraction = 42,
InputAttachmentIndex = 43,
Alignment = 44,
MaxByteOffset = 45,
AlignmentId = 46,
MaxByteOffsetId = 47,
NoSignedWrap = 4469,
NoUnsignedWrap = 4470,
ExplicitInterpAMD = 4999,
OverrideCoverageNV = 5248,
PassthroughNV = 5250,
ViewportRelativeNV = 5252,
SecondaryViewportRelativeNV = 5256,
PerPrimitiveNV = 5271,
PerViewNV = 5272,
PerVertexNV = 5273,
NonUniformEXT = 5300,
CountBuffer = 5634,
UserSemantic = 5635,
RestrictPointerEXT = 5355,
AliasedPointerEXT = 5356,
};
StringRef getDecorationName(Decoration e);
enum class BuiltIn : uint32_t {
Position = 0,
PointSize = 1,
ClipDistance = 3,
CullDistance = 4,
VertexId = 5,
InstanceId = 6,
PrimitiveId = 7,
InvocationId = 8,
Layer = 9,
ViewportIndex = 10,
TessLevelOuter = 11,
TessLevelInner = 12,
TessCoord = 13,
PatchVertices = 14,
FragCoord = 15,
PointCoord = 16,
FrontFacing = 17,
SampleId = 18,
SamplePosition = 19,
SampleMask = 20,
FragDepth = 22,
HelperInvocation = 23,
NumWorkgroups = 24,
WorkgroupSize = 25,
WorkgroupId = 26,
LocalInvocationId = 27,
GlobalInvocationId = 28,
LocalInvocationIndex = 29,
WorkDim = 30,
GlobalSize = 31,
EnqueuedWorkgroupSize = 32,
GlobalOffset = 33,
GlobalLinearId = 34,
SubgroupSize = 36,
SubgroupMaxSize = 37,
NumSubgroups = 38,
NumEnqueuedSubgroups = 39,
SubgroupId = 40,
SubgroupLocalInvocationId = 41,
VertexIndex = 42,
InstanceIndex = 43,
SubgroupEqMask = 4416,
SubgroupGeMask = 4417,
SubgroupGtMask = 4418,
SubgroupLeMask = 4419,
SubgroupLtMask = 4420,
BaseVertex = 4424,
BaseInstance = 4425,
DrawIndex = 4426,
DeviceIndex = 4438,
ViewIndex = 4440,
BaryCoordNoPerspAMD = 4492,
BaryCoordNoPerspCentroidAMD = 4493,
BaryCoordNoPerspSampleAMD = 4494,
BaryCoordSmoothAMD = 4495,
BaryCoordSmoothCentroid = 4496,
BaryCoordSmoothSample = 4497,
BaryCoordPullModel = 4498,
FragStencilRefEXT = 5014,
ViewportMaskNV = 5253,
SecondaryPositionNV = 5257,
SecondaryViewportMaskNV = 5258,
PositionPerViewNV = 5261,
ViewportMaskPerViewNV = 5262,
FullyCoveredEXT = 5264,
TaskCountNV = 5274,
PrimitiveCountNV = 5275,
PrimitiveIndicesNV = 5276,
ClipDistancePerViewNV = 5277,
CullDistancePerViewNV = 5278,
LayerPerViewNV = 5279,
MeshViewCountNV = 5280,
MeshViewIndices = 5281,
BaryCoordNV = 5286,
BaryCoordNoPerspNV = 5287,
FragSizeEXT = 5292,
FragInvocationCountEXT = 5293,
LaunchIdNV = 5319,
LaunchSizeNV = 5320,
WorldRayOriginNV = 5321,
WorldRayDirectionNV = 5322,
ObjectRayOriginNV = 5323,
ObjectRayDirectionNV = 5324,
RayTminNV = 5325,
RayTmaxNV = 5326,
InstanceCustomIndexNV = 5327,
ObjectToWorldNV = 5330,
WorldToObjectNV = 5331,
HitTNV = 5332,
HitKindNV = 5333,
IncomingRayFlagsNV = 5351,
};
StringRef getBuiltInName(BuiltIn e);
enum class SelectionControl : uint32_t {
None = 0x0,
Flatten = 0x1,
DontFlatten = 0x2,
};
std::string getSelectionControlName(uint32_t e);
enum class LoopControl : uint32_t {
None = 0x0,
Unroll = 0x1,
DontUnroll = 0x2,
DependencyInfinite = 0x4,
DependencyLength = 0x8,
MinIterations = 0x10,
MaxIterations = 0x20,
IterationMultiple = 0x40,
PeelCount = 0x80,
PartialCount = 0x100,
};
std::string getLoopControlName(uint32_t e);
enum class FunctionControl : uint32_t {
None = 0x0,
Inline = 0x1,
DontInline = 0x2,
Pure = 0x4,
Const = 0x8,
};
std::string getFunctionControlName(uint32_t e);
enum class MemorySemantics : uint32_t {
None = 0x0,
Acquire = 0x2,
Release = 0x4,
AcquireRelease = 0x8,
SequentiallyConsistent = 0x10,
UniformMemory = 0x40,
SubgroupMemory = 0x80,
WorkgroupMemory = 0x100,
CrossWorkgroupMemory = 0x200,
AtomicCounterMemory = 0x400,
ImageMemory = 0x800,
OutputMemoryKHR = 0x1000,
MakeAvailableKHR = 0x2000,
MakeVisibleKHR = 0x4000,
};
std::string getMemorySemanticsName(uint32_t e);
enum class MemoryOperand : uint32_t {
None = 0x0,
Volatile = 0x1,
Aligned = 0x2,
Nontemporal = 0x4,
MakePointerAvailableKHR = 0x8,
MakePointerVisibleKHR = 0x10,
NonPrivatePointerKHR = 0x20,
};
std::string getMemoryOperandName(uint32_t e);
enum class Scope : uint32_t {
CrossDevice = 0,
Device = 1,
Workgroup = 2,
Subgroup = 3,
Invocation = 4,
QueueFamilyKHR = 5,
};
StringRef getScopeName(Scope e);
enum class GroupOperation : uint32_t {
Reduce = 0,
InclusiveScan = 1,
ExclusiveScan = 2,
ClusteredReduce = 3,
PartitionedReduceNV = 6,
PartitionedInclusiveScanNV = 7,
PartitionedExclusiveScanNV = 8,
};
StringRef getGroupOperationName(GroupOperation e);
enum class KernelEnqueueFlags : uint32_t {
NoWait = 0,
WaitKernel = 1,
WaitWorkGroup = 2,
};
StringRef getKernelEnqueueFlagsName(KernelEnqueueFlags e);
enum class KernelProfilingInfo : uint32_t {
None = 0x0,
CmdExecTime = 0x1,
};
StringRef getKernelProfilingInfoName(KernelProfilingInfo e);
enum class InstructionSet : uint32_t { enum class InstructionSet : uint32_t {
OpenCL_std = 0, OpenCL_std = 0,
GLSL_std_450 = 1, GLSL_std_450 = 1,
SPV_AMD_shader_trinary_minmax = 2, SPV_AMD_shader_trinary_minmax = 2,
}; };
std::string getExtInstSetName(InstructionSet e); std::string getExtInstSetName(InstructionSet e);
// TODO: implement other mnemonics.
enum class Opcode : uint32_t {
InBoundsPtrAccessChain = 70,
PtrCastToGeneric = 121,
};
} // namespace SPIRV } // namespace SPIRV
} // namespace llvm
using CapabilityList = SmallVector<SPIRV::Capability::Capability, 8>;
using ExtensionList = SmallVector<SPIRV::Extension::Extension, 8>;
std::string
getSymbolicOperandMnemonic(SPIRV::OperandCategory::OperandCategory Category,
int32_t Value);
uint32_t
getSymbolicOperandMinVersion(SPIRV::OperandCategory::OperandCategory Category,
uint32_t Value);
uint32_t
getSymbolicOperandMaxVersion(SPIRV::OperandCategory::OperandCategory Category,
uint32_t Value);
CapabilityList
getSymbolicOperandCapabilities(SPIRV::OperandCategory::OperandCategory Category,
uint32_t Value);
ExtensionList
getSymbolicOperandExtensions(SPIRV::OperandCategory::OperandCategory Category,
uint32_t Value);
std::string getLinkStringForBuiltIn(SPIRV::BuiltIn::BuiltIn BuiltInValue);
bool getSpirvBuiltInIdByName(StringRef Name, SPIRV::BuiltIn::BuiltIn &BI);
// Return a string representation of the operands from startIndex onwards. // Return a string representation of the operands from startIndex onwards.
// Templated to allow both MachineInstr and MCInst to use the same logic. // Templated to allow both MachineInstr and MCInst to use the same logic.
template <class InstType> template <class InstType>
std::string getSPIRVStringOperand(const InstType &MI, unsigned StartIndex) { std::string getSPIRVStringOperand(const InstType &MI, unsigned StartIndex) {
std::string s; // Iteratively append to this string. std::string s; // Iteratively append to this string.
const unsigned NumOps = MI.getNumOperands(); const unsigned NumOps = MI.getNumOperands();
bool IsFinished = false; bool IsFinished = false;
for (unsigned i = StartIndex; i < NumOps && !IsFinished; ++i) { for (unsigned i = StartIndex; i < NumOps && !IsFinished; ++i) {
const auto &Op = MI.getOperand(i); const auto &Op = MI.getOperand(i);
if (!Op.isImm()) // Stop if we hit a register operand. if (!Op.isImm()) // Stop if we hit a register operand.
break; break;
assert((Op.getImm() >> 32) == 0 && "Imm operand should be i32 word"); assert((Op.getImm() >> 32) == 0 && "Imm operand should be i32 word");
const uint32_t Imm = Op.getImm(); // Each i32 word is up to 4 characters. const uint32_t Imm = Op.getImm(); // Each i32 word is up to 4 characters.
for (unsigned ShiftAmount = 0; ShiftAmount < 32; ShiftAmount += 8) { for (unsigned ShiftAmount = 0; ShiftAmount < 32; ShiftAmount += 8) {
char c = (Imm >> ShiftAmount) & 0xff; char c = (Imm >> ShiftAmount) & 0xff;
if (c == 0) { // Stop if we hit a null-terminator character. if (c == 0) { // Stop if we hit a null-terminator character.
IsFinished = true; IsFinished = true;
break; break;
} else {
s += c; // Otherwise, append the character to the result string.
} }
s += c; // Otherwise, append the character to the result string.
} }
} }
return s; return s;
} }
} // namespace llvm
#endif // LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVBASEINFO_H #endif // LLVM_LIB_TARGET_SPIRV_SPIRVSYMBOLICOPERANDS_H

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp

//===-- SPIRVBaseInfo.cpp - Top level definitions for SPIRV ----*- C++ -*-===// //===-- SPIRVBaseInfo.cpp - Top level SPIRV definitions ---------*- C++ -*-===//
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// This file contains small standalone helper functions and enum definitions for // This file contains the implementation for helper mnemonic lookup functions,
// the SPIRV target useful for the compiler back-end and the MC libraries. // versioning/capabilities/extensions getters for symbolic/named operands used
// As such, it deliberately does not include references to LLVM core // in various SPIR-V instructions.
// code gen types, passes, etc..
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "SPIRVBaseInfo.h" #include "SPIRVBaseInfo.h"
#include "llvm/Support/ErrorHandling.h" #include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
namespace llvm { namespace llvm {
namespace SPIRV { namespace SPIRV {
struct SymbolicOperand {
OperandCategory::OperandCategory Category;
uint32_t Value;
StringRef Mnemonic;
uint32_t MinVersion;
uint32_t MaxVersion;
};
struct ExtensionEntry {
OperandCategory::OperandCategory Category;
uint32_t Value;
Extension::Extension ReqExtension;
};
struct CapabilityEntry {
OperandCategory::OperandCategory Category;
uint32_t Value;
Capability::Capability ReqCapability;
};
using namespace OperandCategory;
using namespace Extension;
using namespace Capability;
#define GET_SymbolicOperands_DECL
#define GET_SymbolicOperands_IMPL
#define GET_ExtensionEntries_DECL
#define GET_ExtensionEntries_IMPL
#define GET_CapabilityEntries_DECL
#define GET_CapabilityEntries_IMPL
#define GET_ExtendedBuiltins_DECL
#define GET_ExtendedBuiltins_IMPL
#include "SPIRVGenTables.inc"
#define CASE(CLASS, ATTR) \ #define CASE(CLASS, ATTR) \
case CLASS::ATTR: \ case CLASS::ATTR: \
return #ATTR; return #ATTR;
#define CASE_SUF(CLASS, SF, ATTR) \ std::string getExtInstSetName(InstructionSet e) {
case CLASS::SF##_##ATTR: \
return #ATTR;
// Implement getEnumName(Enum e) helper functions.
// TODO: re-implement all the functions using TableGen.
StringRef getCapabilityName(Capability e) {
switch (e) {
CASE(Capability, Matrix)
CASE(Capability, Shader)
CASE(Capability, Geometry)
CASE(Capability, Tessellation)
CASE(Capability, Addresses)
CASE(Capability, Linkage)
CASE(Capability, Kernel)
CASE(Capability, Vector16)
CASE(Capability, Float16Buffer)
CASE(Capability, Float16)
CASE(Capability, Float64)
CASE(Capability, Int64)
CASE(Capability, Int64Atomics)
CASE(Capability, ImageBasic)
CASE(Capability, ImageReadWrite)
CASE(Capability, ImageMipmap)
CASE(Capability, Pipes)
CASE(Capability, Groups)
CASE(Capability, DeviceEnqueue)
CASE(Capability, LiteralSampler)
CASE(Capability, AtomicStorage)
CASE(Capability, Int16)
CASE(Capability, TessellationPointSize)
CASE(Capability, GeometryPointSize)
CASE(Capability, ImageGatherExtended)
CASE(Capability, StorageImageMultisample)
CASE(Capability, UniformBufferArrayDynamicIndexing)
CASE(Capability, SampledImageArrayDymnamicIndexing)
CASE(Capability, ClipDistance)
CASE(Capability, CullDistance)
CASE(Capability, ImageCubeArray)
CASE(Capability, SampleRateShading)
CASE(Capability, ImageRect)
CASE(Capability, SampledRect)
CASE(Capability, GenericPointer)
CASE(Capability, Int8)
CASE(Capability, InputAttachment)
CASE(Capability, SparseResidency)
CASE(Capability, MinLod)
CASE(Capability, Sampled1D)
CASE(Capability, Image1D)
CASE(Capability, SampledCubeArray)
CASE(Capability, SampledBuffer)
CASE(Capability, ImageBuffer)
CASE(Capability, ImageMSArray)
CASE(Capability, StorageImageExtendedFormats)
CASE(Capability, ImageQuery)
CASE(Capability, DerivativeControl)
CASE(Capability, InterpolationFunction)
CASE(Capability, TransformFeedback)
CASE(Capability, GeometryStreams)
CASE(Capability, StorageImageReadWithoutFormat)
CASE(Capability, StorageImageWriteWithoutFormat)
CASE(Capability, MultiViewport)
CASE(Capability, SubgroupDispatch)
CASE(Capability, NamedBarrier)
CASE(Capability, PipeStorage)
CASE(Capability, GroupNonUniform)
CASE(Capability, GroupNonUniformVote)
CASE(Capability, GroupNonUniformArithmetic)
CASE(Capability, GroupNonUniformBallot)
CASE(Capability, GroupNonUniformShuffle)
CASE(Capability, GroupNonUniformShuffleRelative)
CASE(Capability, GroupNonUniformClustered)
CASE(Capability, GroupNonUniformQuad)
CASE(Capability, SubgroupBallotKHR)
CASE(Capability, DrawParameters)
CASE(Capability, SubgroupVoteKHR)
CASE(Capability, StorageBuffer16BitAccess)
CASE(Capability, StorageUniform16)
CASE(Capability, StoragePushConstant16)
CASE(Capability, StorageInputOutput16)
CASE(Capability, DeviceGroup)
CASE(Capability, MultiView)
CASE(Capability, VariablePointersStorageBuffer)
CASE(Capability, VariablePointers)
CASE(Capability, AtomicStorageOps)
CASE(Capability, SampleMaskPostDepthCoverage)
CASE(Capability, StorageBuffer8BitAccess)
CASE(Capability, UniformAndStorageBuffer8BitAccess)
CASE(Capability, StoragePushConstant8)
CASE(Capability, DenormPreserve)
CASE(Capability, DenormFlushToZero)
CASE(Capability, SignedZeroInfNanPreserve)
CASE(Capability, RoundingModeRTE)
CASE(Capability, RoundingModeRTZ)
CASE(Capability, Float16ImageAMD)
CASE(Capability, ImageGatherBiasLodAMD)
CASE(Capability, FragmentMaskAMD)
CASE(Capability, StencilExportEXT)
CASE(Capability, ImageReadWriteLodAMD)
CASE(Capability, SampleMaskOverrideCoverageNV)
CASE(Capability, GeometryShaderPassthroughNV)
CASE(Capability, ShaderViewportIndexLayerEXT)
CASE(Capability, ShaderViewportMaskNV)
CASE(Capability, ShaderStereoViewNV)
CASE(Capability, PerViewAttributesNV)
CASE(Capability, FragmentFullyCoveredEXT)
CASE(Capability, MeshShadingNV)
CASE(Capability, ShaderNonUniformEXT)
CASE(Capability, RuntimeDescriptorArrayEXT)
CASE(Capability, InputAttachmentArrayDynamicIndexingEXT)
CASE(Capability, UniformTexelBufferArrayDynamicIndexingEXT)
CASE(Capability, StorageTexelBufferArrayDynamicIndexingEXT)
CASE(Capability, UniformBufferArrayNonUniformIndexingEXT)
CASE(Capability, SampledImageArrayNonUniformIndexingEXT)
CASE(Capability, StorageBufferArrayNonUniformIndexingEXT)
CASE(Capability, StorageImageArrayNonUniformIndexingEXT)
CASE(Capability, InputAttachmentArrayNonUniformIndexingEXT)
CASE(Capability, UniformTexelBufferArrayNonUniformIndexingEXT)
CASE(Capability, StorageTexelBufferArrayNonUniformIndexingEXT)
CASE(Capability, RayTracingNV)
CASE(Capability, SubgroupShuffleINTEL)
CASE(Capability, SubgroupBufferBlockIOINTEL)
CASE(Capability, SubgroupImageBlockIOINTEL)
CASE(Capability, SubgroupImageMediaBlockIOINTEL)
CASE(Capability, SubgroupAvcMotionEstimationINTEL)
CASE(Capability, SubgroupAvcMotionEstimationIntraINTEL)
CASE(Capability, SubgroupAvcMotionEstimationChromaINTEL)
CASE(Capability, GroupNonUniformPartitionedNV)
CASE(Capability, VulkanMemoryModelKHR)
CASE(Capability, VulkanMemoryModelDeviceScopeKHR)
CASE(Capability, ImageFootprintNV)
CASE(Capability, FragmentBarycentricNV)
CASE(Capability, ComputeDerivativeGroupQuadsNV)
CASE(Capability, ComputeDerivativeGroupLinearNV)
CASE(Capability, FragmentDensityEXT)
CASE(Capability, PhysicalStorageBufferAddressesEXT)
CASE(Capability, CooperativeMatrixNV)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getSourceLanguageName(SourceLanguage e) {
switch (e) {
CASE(SourceLanguage, Unknown)
CASE(SourceLanguage, ESSL)
CASE(SourceLanguage, GLSL)
CASE(SourceLanguage, OpenCL_C)
CASE(SourceLanguage, OpenCL_CPP)
CASE(SourceLanguage, HLSL)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getExecutionModelName(ExecutionModel e) {
switch (e) {
CASE(ExecutionModel, Vertex)
CASE(ExecutionModel, TessellationControl)
CASE(ExecutionModel, TessellationEvaluation)
CASE(ExecutionModel, Geometry)
CASE(ExecutionModel, Fragment)
CASE(ExecutionModel, GLCompute)
CASE(ExecutionModel, Kernel)
CASE(ExecutionModel, TaskNV)
CASE(ExecutionModel, MeshNV)
CASE(ExecutionModel, RayGenerationNV)
CASE(ExecutionModel, IntersectionNV)
CASE(ExecutionModel, AnyHitNV)
CASE(ExecutionModel, ClosestHitNV)
CASE(ExecutionModel, MissNV)
CASE(ExecutionModel, CallableNV)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getAddressingModelName(AddressingModel e) {
switch (e) {
CASE(AddressingModel, Logical)
CASE(AddressingModel, Physical32)
CASE(AddressingModel, Physical64)
CASE(AddressingModel, PhysicalStorageBuffer64EXT)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getMemoryModelName(MemoryModel e) {
switch (e) {
CASE(MemoryModel, Simple)
CASE(MemoryModel, GLSL450)
CASE(MemoryModel, OpenCL)
CASE(MemoryModel, VulkanKHR)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getExecutionModeName(ExecutionMode e) {
switch (e) {
CASE(ExecutionMode, Invocations)
CASE(ExecutionMode, SpacingEqual)
CASE(ExecutionMode, SpacingFractionalEven)
CASE(ExecutionMode, SpacingFractionalOdd)
CASE(ExecutionMode, VertexOrderCw)
CASE(ExecutionMode, VertexOrderCcw)
CASE(ExecutionMode, PixelCenterInteger)
CASE(ExecutionMode, OriginUpperLeft)
CASE(ExecutionMode, OriginLowerLeft)
CASE(ExecutionMode, EarlyFragmentTests)
CASE(ExecutionMode, PointMode)
CASE(ExecutionMode, Xfb)
CASE(ExecutionMode, DepthReplacing)
CASE(ExecutionMode, DepthGreater)
CASE(ExecutionMode, DepthLess)
CASE(ExecutionMode, DepthUnchanged)
CASE(ExecutionMode, LocalSize)
CASE(ExecutionMode, LocalSizeHint)
CASE(ExecutionMode, InputPoints)
CASE(ExecutionMode, InputLines)
CASE(ExecutionMode, InputLinesAdjacency)
CASE(ExecutionMode, Triangles)
CASE(ExecutionMode, InputTrianglesAdjacency)
CASE(ExecutionMode, Quads)
CASE(ExecutionMode, Isolines)
CASE(ExecutionMode, OutputVertices)
CASE(ExecutionMode, OutputPoints)
CASE(ExecutionMode, OutputLineStrip)
CASE(ExecutionMode, OutputTriangleStrip)
CASE(ExecutionMode, VecTypeHint)
CASE(ExecutionMode, ContractionOff)
CASE(ExecutionMode, Initializer)
CASE(ExecutionMode, Finalizer)
CASE(ExecutionMode, SubgroupSize)
CASE(ExecutionMode, SubgroupsPerWorkgroup)
CASE(ExecutionMode, SubgroupsPerWorkgroupId)
CASE(ExecutionMode, LocalSizeId)
CASE(ExecutionMode, LocalSizeHintId)
CASE(ExecutionMode, PostDepthCoverage)
CASE(ExecutionMode, DenormPreserve)
CASE(ExecutionMode, DenormFlushToZero)
CASE(ExecutionMode, SignedZeroInfNanPreserve)
CASE(ExecutionMode, RoundingModeRTE)
CASE(ExecutionMode, RoundingModeRTZ)
CASE(ExecutionMode, StencilRefReplacingEXT)
CASE(ExecutionMode, OutputLinesNV)
CASE(ExecutionMode, DerivativeGroupQuadsNV)
CASE(ExecutionMode, DerivativeGroupLinearNV)
CASE(ExecutionMode, OutputTrianglesNV)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getStorageClassName(StorageClass e) {
switch (e) {
CASE(StorageClass, UniformConstant)
CASE(StorageClass, Input)
CASE(StorageClass, Uniform)
CASE(StorageClass, Output)
CASE(StorageClass, Workgroup)
CASE(StorageClass, CrossWorkgroup)
CASE(StorageClass, Private)
CASE(StorageClass, Function)
CASE(StorageClass, Generic)
CASE(StorageClass, PushConstant)
CASE(StorageClass, AtomicCounter)
CASE(StorageClass, Image)
CASE(StorageClass, StorageBuffer)
CASE(StorageClass, CallableDataNV)
CASE(StorageClass, IncomingCallableDataNV)
CASE(StorageClass, RayPayloadNV)
CASE(StorageClass, HitAttributeNV)
CASE(StorageClass, IncomingRayPayloadNV)
CASE(StorageClass, ShaderRecordBufferNV)
CASE(StorageClass, PhysicalStorageBufferEXT)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getDimName(Dim dim) {
switch (dim) {
CASE_SUF(Dim, DIM, 1D)
CASE_SUF(Dim, DIM, 2D)
CASE_SUF(Dim, DIM, 3D)
CASE_SUF(Dim, DIM, Cube)
CASE_SUF(Dim, DIM, Rect)
CASE_SUF(Dim, DIM, Buffer)
CASE_SUF(Dim, DIM, SubpassData)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getSamplerAddressingModeName(SamplerAddressingMode e) {
switch (e) {
CASE(SamplerAddressingMode, None)
CASE(SamplerAddressingMode, ClampToEdge)
CASE(SamplerAddressingMode, Clamp)
CASE(SamplerAddressingMode, Repeat)
CASE(SamplerAddressingMode, RepeatMirrored)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getSamplerFilterModeName(SamplerFilterMode e) {
switch (e) { switch (e) {
CASE(SamplerFilterMode, Nearest) CASE(InstructionSet, OpenCL_std)
CASE(SamplerFilterMode, Linear) CASE(InstructionSet, GLSL_std_450)
CASE(InstructionSet, SPV_AMD_shader_trinary_minmax)
break; break;
} }
llvm_unreachable("Unexpected operand"); llvm_unreachable("Unexpected operand");
} }
} // namespace SPIRV
StringRef getImageFormatName(ImageFormat e) { std::string
switch (e) { getSymbolicOperandMnemonic(SPIRV::OperandCategory::OperandCategory Category,
CASE(ImageFormat, Unknown) int32_t Value) {
CASE(ImageFormat, Rgba32f) const SPIRV::SymbolicOperand *Lookup =
CASE(ImageFormat, Rgba16f) SPIRV::lookupSymbolicOperandByCategoryAndValue(Category, Value);
CASE(ImageFormat, R32f) // Value that encodes just one enum value.
CASE(ImageFormat, Rgba8) if (Lookup)
CASE(ImageFormat, Rgba8Snorm) return Lookup->Mnemonic.str();
CASE(ImageFormat, Rg32f) if (Category != SPIRV::OperandCategory::ImageOperandOperand &&
CASE(ImageFormat, Rg16f) Category != SPIRV::OperandCategory::FPFastMathModeOperand &&
CASE(ImageFormat, R11fG11fB10f) Category != SPIRV::OperandCategory::SelectionControlOperand &&
CASE(ImageFormat, R16f) Category != SPIRV::OperandCategory::LoopControlOperand &&
CASE(ImageFormat, Rgba16) Category != SPIRV::OperandCategory::FunctionControlOperand &&
CASE(ImageFormat, Rgb10A2) Category != SPIRV::OperandCategory::MemorySemanticsOperand &&
CASE(ImageFormat, Rg16) Category != SPIRV::OperandCategory::MemoryOperandOperand &&
CASE(ImageFormat, Rg8) Category != SPIRV::OperandCategory::KernelProfilingInfoOperand)
CASE(ImageFormat, R16) return "UNKNOWN";
CASE(ImageFormat, R8) // Value that encodes many enum values (one bit per enum value).
CASE(ImageFormat, Rgba16Snorm) std::string Name;
CASE(ImageFormat, Rg16Snorm) std::string Separator;
CASE(ImageFormat, Rg8Snorm) const SPIRV::SymbolicOperand *EnumValueInCategory =
CASE(ImageFormat, R16Snorm) SPIRV::lookupSymbolicOperandByCategory(Category);
CASE(ImageFormat, R8Snorm)
CASE(ImageFormat, Rgba32i)
CASE(ImageFormat, Rgba16i)
CASE(ImageFormat, Rgba8i)
CASE(ImageFormat, R32i)
CASE(ImageFormat, Rg32i)
CASE(ImageFormat, Rg16i)
CASE(ImageFormat, Rg8i)
CASE(ImageFormat, R16i)
CASE(ImageFormat, R8i)
CASE(ImageFormat, Rgba32ui)
CASE(ImageFormat, Rgba16ui)
CASE(ImageFormat, Rgba8ui)
CASE(ImageFormat, R32ui)
CASE(ImageFormat, Rgb10a2ui)
CASE(ImageFormat, Rg32ui)
CASE(ImageFormat, Rg16ui)
CASE(ImageFormat, Rg8ui)
CASE(ImageFormat, R16ui)
CASE(ImageFormat, R8ui)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getImageChannelOrderName(ImageChannelOrder e) { while (EnumValueInCategory && EnumValueInCategory->Category == Category) {
switch (e) { if ((EnumValueInCategory->Value != 0) &&
CASE(ImageChannelOrder, R) (Value & EnumValueInCategory->Value)) {
CASE(ImageChannelOrder, A) Name += Separator + EnumValueInCategory->Mnemonic.str();
CASE(ImageChannelOrder, RG) Separator = "|";
CASE(ImageChannelOrder, RA)
CASE(ImageChannelOrder, RGB)
CASE(ImageChannelOrder, RGBA)
CASE(ImageChannelOrder, BGRA)
CASE(ImageChannelOrder, ARGB)
CASE(ImageChannelOrder, Intensity)
CASE(ImageChannelOrder, Luminance)
CASE(ImageChannelOrder, Rx)
CASE(ImageChannelOrder, RGx)
CASE(ImageChannelOrder, RGBx)
CASE(ImageChannelOrder, Depth)
CASE(ImageChannelOrder, DepthStencil)
CASE(ImageChannelOrder, sRGB)
CASE(ImageChannelOrder, sRGBx)
CASE(ImageChannelOrder, sRGBA)
CASE(ImageChannelOrder, sBGRA)
CASE(ImageChannelOrder, ABGR)
break;
} }
llvm_unreachable("Unexpected operand"); ++EnumValueInCategory;
} }
StringRef getImageChannelDataTypeName(ImageChannelDataType e) { return Name;
switch (e) {
CASE(ImageChannelDataType, SnormInt8)
CASE(ImageChannelDataType, SnormInt16)
CASE(ImageChannelDataType, UnormInt8)
CASE(ImageChannelDataType, UnormInt16)
CASE(ImageChannelDataType, UnormShort565)
CASE(ImageChannelDataType, UnormShort555)
CASE(ImageChannelDataType, UnormInt101010)
CASE(ImageChannelDataType, SignedInt8)
CASE(ImageChannelDataType, SignedInt16)
CASE(ImageChannelDataType, SignedInt32)
CASE(ImageChannelDataType, UnsignedInt8)
CASE(ImageChannelDataType, UnsignedInt16)
CASE(ImageChannelDataType, UnsigendInt32)
CASE(ImageChannelDataType, HalfFloat)
CASE(ImageChannelDataType, Float)
CASE(ImageChannelDataType, UnormInt24)
CASE(ImageChannelDataType, UnormInt101010_2)
break;
}
llvm_unreachable("Unexpected operand");
} }
std::string getImageOperandName(uint32_t e) { uint32_t
std::string nameString = ""; getSymbolicOperandMinVersion(SPIRV::OperandCategory::OperandCategory Category,
std::string sep = ""; uint32_t Value) {
if (e == static_cast<uint32_t>(ImageOperand::None)) const SPIRV::SymbolicOperand *Lookup =
return "None"; SPIRV::lookupSymbolicOperandByCategoryAndValue(Category, Value);
if (e == static_cast<uint32_t>(ImageOperand::Bias))
return "Bias";
if (e & static_cast<uint32_t>(ImageOperand::Bias)) {
nameString += sep + "Bias";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::Lod))
return "Lod";
if (e & static_cast<uint32_t>(ImageOperand::Lod)) {
nameString += sep + "Lod";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::Grad))
return "Grad";
if (e & static_cast<uint32_t>(ImageOperand::Grad)) {
nameString += sep + "Grad";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::ConstOffset))
return "ConstOffset";
if (e & static_cast<uint32_t>(ImageOperand::ConstOffset)) {
nameString += sep + "ConstOffset";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::Offset))
return "Offset";
if (e & static_cast<uint32_t>(ImageOperand::Offset)) {
nameString += sep + "Offset";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::ConstOffsets))
return "ConstOffsets";
if (e & static_cast<uint32_t>(ImageOperand::ConstOffsets)) {
nameString += sep + "ConstOffsets";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::Sample))
return "Sample";
if (e & static_cast<uint32_t>(ImageOperand::Sample)) {
nameString += sep + "Sample";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::MinLod))
return "MinLod";
if (e & static_cast<uint32_t>(ImageOperand::MinLod)) {
nameString += sep + "MinLod";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::MakeTexelAvailableKHR))
return "MakeTexelAvailableKHR";
if (e & static_cast<uint32_t>(ImageOperand::MakeTexelAvailableKHR)) {
nameString += sep + "MakeTexelAvailableKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::MakeTexelVisibleKHR))
return "MakeTexelVisibleKHR";
if (e & static_cast<uint32_t>(ImageOperand::MakeTexelVisibleKHR)) {
nameString += sep + "MakeTexelVisibleKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::NonPrivateTexelKHR))
return "NonPrivateTexelKHR";
if (e & static_cast<uint32_t>(ImageOperand::NonPrivateTexelKHR)) {
nameString += sep + "NonPrivateTexelKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::VolatileTexelKHR))
return "VolatileTexelKHR";
if (e & static_cast<uint32_t>(ImageOperand::VolatileTexelKHR)) {
nameString += sep + "VolatileTexelKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::SignExtend))
return "SignExtend";
if (e & static_cast<uint32_t>(ImageOperand::SignExtend)) {
nameString += sep + "SignExtend";
sep = "|";
}
if (e == static_cast<uint32_t>(ImageOperand::ZeroExtend))
return "ZeroExtend";
if (e & static_cast<uint32_t>(ImageOperand::ZeroExtend)) {
nameString += sep + "ZeroExtend";
sep = "|";
};
return nameString;
}
std::string getFPFastMathModeName(uint32_t e) { if (Lookup)
std::string nameString = ""; return Lookup->MinVersion;
std::string sep = "";
if (e == static_cast<uint32_t>(FPFastMathMode::None))
return "None";
if (e == static_cast<uint32_t>(FPFastMathMode::NotNaN))
return "NotNaN";
if (e & static_cast<uint32_t>(FPFastMathMode::NotNaN)) {
nameString += sep + "NotNaN";
sep = "|";
}
if (e == static_cast<uint32_t>(FPFastMathMode::NotInf))
return "NotInf";
if (e & static_cast<uint32_t>(FPFastMathMode::NotInf)) {
nameString += sep + "NotInf";
sep = "|";
}
if (e == static_cast<uint32_t>(FPFastMathMode::NSZ))
return "NSZ";
if (e & static_cast<uint32_t>(FPFastMathMode::NSZ)) {
nameString += sep + "NSZ";
sep = "|";
}
if (e == static_cast<uint32_t>(FPFastMathMode::AllowRecip))
return "AllowRecip";
if (e & static_cast<uint32_t>(FPFastMathMode::AllowRecip)) {
nameString += sep + "AllowRecip";
sep = "|";
}
if (e == static_cast<uint32_t>(FPFastMathMode::Fast))
return "Fast";
if (e & static_cast<uint32_t>(FPFastMathMode::Fast)) {
nameString += sep + "Fast";
sep = "|";
};
return nameString;
}
StringRef getFPRoundingModeName(FPRoundingMode e) { return 0;
switch (e) {
CASE(FPRoundingMode, RTE)
CASE(FPRoundingMode, RTZ)
CASE(FPRoundingMode, RTP)
CASE(FPRoundingMode, RTN)
break;
}
llvm_unreachable("Unexpected operand");
} }
StringRef getLinkageTypeName(LinkageType e) { uint32_t
switch (e) { getSymbolicOperandMaxVersion(SPIRV::OperandCategory::OperandCategory Category,
CASE(LinkageType, Export) uint32_t Value) {
CASE(LinkageType, Import) const SPIRV::SymbolicOperand *Lookup =
break; SPIRV::lookupSymbolicOperandByCategoryAndValue(Category, Value);
}
llvm_unreachable("Unexpected operand");
}
StringRef getAccessQualifierName(AccessQualifier e) { if (Lookup)
switch (e) { return Lookup->MaxVersion;
CASE(AccessQualifier, ReadOnly)
CASE(AccessQualifier, WriteOnly)
CASE(AccessQualifier, ReadWrite)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getFunctionParameterAttributeName(FunctionParameterAttribute e) { return 0;
switch (e) {
CASE(FunctionParameterAttribute, Zext)
CASE(FunctionParameterAttribute, Sext)
CASE(FunctionParameterAttribute, ByVal)
CASE(FunctionParameterAttribute, Sret)
CASE(FunctionParameterAttribute, NoAlias)
CASE(FunctionParameterAttribute, NoCapture)
CASE(FunctionParameterAttribute, NoWrite)
CASE(FunctionParameterAttribute, NoReadWrite)
break;
}
llvm_unreachable("Unexpected operand");
} }
StringRef getDecorationName(Decoration e) { CapabilityList
switch (e) { getSymbolicOperandCapabilities(SPIRV::OperandCategory::OperandCategory Category,
CASE(Decoration, RelaxedPrecision) uint32_t Value) {
CASE(Decoration, SpecId) const SPIRV::CapabilityEntry *Capability =
CASE(Decoration, Block) SPIRV::lookupCapabilityByCategoryAndValue(Category, Value);
CASE(Decoration, BufferBlock)
CASE(Decoration, RowMajor)
CASE(Decoration, ColMajor)
CASE(Decoration, ArrayStride)
CASE(Decoration, MatrixStride)
CASE(Decoration, GLSLShared)
CASE(Decoration, GLSLPacked)
CASE(Decoration, CPacked)
CASE(Decoration, BuiltIn)
CASE(Decoration, NoPerspective)
CASE(Decoration, Flat)
CASE(Decoration, Patch)
CASE(Decoration, Centroid)
CASE(Decoration, Sample)
CASE(Decoration, Invariant)
CASE(Decoration, Restrict)
CASE(Decoration, Aliased)
CASE(Decoration, Volatile)
CASE(Decoration, Constant)
CASE(Decoration, Coherent)
CASE(Decoration, NonWritable)
CASE(Decoration, NonReadable)
CASE(Decoration, Uniform)
CASE(Decoration, UniformId)
CASE(Decoration, SaturatedConversion)
CASE(Decoration, Stream)
CASE(Decoration, Location)
CASE(Decoration, Component)
CASE(Decoration, Index)
CASE(Decoration, Binding)
CASE(Decoration, DescriptorSet)
CASE(Decoration, Offset)
CASE(Decoration, XfbBuffer)
CASE(Decoration, XfbStride)
CASE(Decoration, FuncParamAttr)
CASE(Decoration, FPRoundingMode)
CASE(Decoration, FPFastMathMode)
CASE(Decoration, LinkageAttributes)
CASE(Decoration, NoContraction)
CASE(Decoration, InputAttachmentIndex)
CASE(Decoration, Alignment)
CASE(Decoration, MaxByteOffset)
CASE(Decoration, AlignmentId)
CASE(Decoration, MaxByteOffsetId)
CASE(Decoration, NoSignedWrap)
CASE(Decoration, NoUnsignedWrap)
CASE(Decoration, ExplicitInterpAMD)
CASE(Decoration, OverrideCoverageNV)
CASE(Decoration, PassthroughNV)
CASE(Decoration, ViewportRelativeNV)
CASE(Decoration, SecondaryViewportRelativeNV)
CASE(Decoration, PerPrimitiveNV)
CASE(Decoration, PerViewNV)
CASE(Decoration, PerVertexNV)
CASE(Decoration, NonUniformEXT)
CASE(Decoration, CountBuffer)
CASE(Decoration, UserSemantic)
CASE(Decoration, RestrictPointerEXT)
CASE(Decoration, AliasedPointerEXT)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getBuiltInName(BuiltIn e) { CapabilityList Capabilities;
switch (e) { while (Capability && Capability->Category == Category &&
CASE(BuiltIn, Position) Capability->Value == Value) {
CASE(BuiltIn, PointSize) Capabilities.push_back(
CASE(BuiltIn, ClipDistance) static_cast<SPIRV::Capability::Capability>(Capability->ReqCapability));
CASE(BuiltIn, CullDistance) ++Capability;
CASE(BuiltIn, VertexId)
CASE(BuiltIn, InstanceId)
CASE(BuiltIn, PrimitiveId)
CASE(BuiltIn, InvocationId)
CASE(BuiltIn, Layer)
CASE(BuiltIn, ViewportIndex)
CASE(BuiltIn, TessLevelOuter)
CASE(BuiltIn, TessLevelInner)
CASE(BuiltIn, TessCoord)
CASE(BuiltIn, PatchVertices)
CASE(BuiltIn, FragCoord)
CASE(BuiltIn, PointCoord)
CASE(BuiltIn, FrontFacing)
CASE(BuiltIn, SampleId)
CASE(BuiltIn, SamplePosition)
CASE(BuiltIn, SampleMask)
CASE(BuiltIn, FragDepth)
CASE(BuiltIn, HelperInvocation)
CASE(BuiltIn, NumWorkgroups)
CASE(BuiltIn, WorkgroupSize)
CASE(BuiltIn, WorkgroupId)
CASE(BuiltIn, LocalInvocationId)
CASE(BuiltIn, GlobalInvocationId)
CASE(BuiltIn, LocalInvocationIndex)
CASE(BuiltIn, WorkDim)
CASE(BuiltIn, GlobalSize)
CASE(BuiltIn, EnqueuedWorkgroupSize)
CASE(BuiltIn, GlobalOffset)
CASE(BuiltIn, GlobalLinearId)
CASE(BuiltIn, SubgroupSize)
CASE(BuiltIn, SubgroupMaxSize)
CASE(BuiltIn, NumSubgroups)
CASE(BuiltIn, NumEnqueuedSubgroups)
CASE(BuiltIn, SubgroupId)
CASE(BuiltIn, SubgroupLocalInvocationId)
CASE(BuiltIn, VertexIndex)
CASE(BuiltIn, InstanceIndex)
CASE(BuiltIn, SubgroupEqMask)
CASE(BuiltIn, SubgroupGeMask)
CASE(BuiltIn, SubgroupGtMask)
CASE(BuiltIn, SubgroupLeMask)
CASE(BuiltIn, SubgroupLtMask)
CASE(BuiltIn, BaseVertex)
CASE(BuiltIn, BaseInstance)
CASE(BuiltIn, DrawIndex)
CASE(BuiltIn, DeviceIndex)
CASE(BuiltIn, ViewIndex)
CASE(BuiltIn, BaryCoordNoPerspAMD)
CASE(BuiltIn, BaryCoordNoPerspCentroidAMD)
CASE(BuiltIn, BaryCoordNoPerspSampleAMD)
CASE(BuiltIn, BaryCoordSmoothAMD)
CASE(BuiltIn, BaryCoordSmoothCentroid)
CASE(BuiltIn, BaryCoordSmoothSample)
CASE(BuiltIn, BaryCoordPullModel)
CASE(BuiltIn, FragStencilRefEXT)
CASE(BuiltIn, ViewportMaskNV)
CASE(BuiltIn, SecondaryPositionNV)
CASE(BuiltIn, SecondaryViewportMaskNV)
CASE(BuiltIn, PositionPerViewNV)
CASE(BuiltIn, ViewportMaskPerViewNV)
CASE(BuiltIn, FullyCoveredEXT)
CASE(BuiltIn, TaskCountNV)
CASE(BuiltIn, PrimitiveCountNV)
CASE(BuiltIn, PrimitiveIndicesNV)
CASE(BuiltIn, ClipDistancePerViewNV)
CASE(BuiltIn, CullDistancePerViewNV)
CASE(BuiltIn, LayerPerViewNV)
CASE(BuiltIn, MeshViewCountNV)
CASE(BuiltIn, MeshViewIndices)
CASE(BuiltIn, BaryCoordNV)
CASE(BuiltIn, BaryCoordNoPerspNV)
CASE(BuiltIn, FragSizeEXT)
CASE(BuiltIn, FragInvocationCountEXT)
CASE(BuiltIn, LaunchIdNV)
CASE(BuiltIn, LaunchSizeNV)
CASE(BuiltIn, WorldRayOriginNV)
CASE(BuiltIn, WorldRayDirectionNV)
CASE(BuiltIn, ObjectRayOriginNV)
CASE(BuiltIn, ObjectRayDirectionNV)
CASE(BuiltIn, RayTminNV)
CASE(BuiltIn, RayTmaxNV)
CASE(BuiltIn, InstanceCustomIndexNV)
CASE(BuiltIn, ObjectToWorldNV)
CASE(BuiltIn, WorldToObjectNV)
CASE(BuiltIn, HitTNV)
CASE(BuiltIn, HitKindNV)
CASE(BuiltIn, IncomingRayFlagsNV)
break;
}
llvm_unreachable("Unexpected operand");
} }
std::string getSelectionControlName(uint32_t e) { return Capabilities;
std::string nameString = "";
std::string sep = "";
if (e == static_cast<uint32_t>(SelectionControl::None))
return "None";
if (e == static_cast<uint32_t>(SelectionControl::Flatten))
return "Flatten";
if (e & static_cast<uint32_t>(SelectionControl::Flatten)) {
nameString += sep + "Flatten";
sep = "|";
}
if (e == static_cast<uint32_t>(SelectionControl::DontFlatten))
return "DontFlatten";
if (e & static_cast<uint32_t>(SelectionControl::DontFlatten)) {
nameString += sep + "DontFlatten";
sep = "|";
};
return nameString;
} }
std::string getLoopControlName(uint32_t e) { ExtensionList
std::string nameString = ""; getSymbolicOperandExtensions(SPIRV::OperandCategory::OperandCategory Category,
std::string sep = ""; uint32_t Value) {
if (e == static_cast<uint32_t>(LoopControl::None)) const SPIRV::ExtensionEntry *Extension =
return "None"; SPIRV::lookupExtensionByCategoryAndValue(Category, Value);
if (e == static_cast<uint32_t>(LoopControl::Unroll))
return "Unroll";
if (e & static_cast<uint32_t>(LoopControl::Unroll)) {
nameString += sep + "Unroll";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::DontUnroll))
return "DontUnroll";
if (e & static_cast<uint32_t>(LoopControl::DontUnroll)) {
nameString += sep + "DontUnroll";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::DependencyInfinite))
return "DependencyInfinite";
if (e & static_cast<uint32_t>(LoopControl::DependencyInfinite)) {
nameString += sep + "DependencyInfinite";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::DependencyLength))
return "DependencyLength";
if (e & static_cast<uint32_t>(LoopControl::DependencyLength)) {
nameString += sep + "DependencyLength";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::MinIterations))
return "MinIterations";
if (e & static_cast<uint32_t>(LoopControl::MinIterations)) {
nameString += sep + "MinIterations";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::MaxIterations))
return "MaxIterations";
if (e & static_cast<uint32_t>(LoopControl::MaxIterations)) {
nameString += sep + "MaxIterations";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::IterationMultiple))
return "IterationMultiple";
if (e & static_cast<uint32_t>(LoopControl::IterationMultiple)) {
nameString += sep + "IterationMultiple";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::PeelCount))
return "PeelCount";
if (e & static_cast<uint32_t>(LoopControl::PeelCount)) {
nameString += sep + "PeelCount";
sep = "|";
}
if (e == static_cast<uint32_t>(LoopControl::PartialCount))
return "PartialCount";
if (e & static_cast<uint32_t>(LoopControl::PartialCount)) {
nameString += sep + "PartialCount";
sep = "|";
};
return nameString;
}
std::string getFunctionControlName(uint32_t e) { ExtensionList Extensions;
std::string nameString = ""; while (Extension && Extension->Category == Category &&
std::string sep = ""; Extension->Value == Value) {
if (e == static_cast<uint32_t>(FunctionControl::None)) Extensions.push_back(
return "None"; static_cast<SPIRV::Extension::Extension>(Extension->ReqExtension));
if (e == static_cast<uint32_t>(FunctionControl::Inline)) ++Extension;
return "Inline";
if (e & static_cast<uint32_t>(FunctionControl::Inline)) {
nameString += sep + "Inline";
sep = "|";
}
if (e == static_cast<uint32_t>(FunctionControl::DontInline))
return "DontInline";
if (e & static_cast<uint32_t>(FunctionControl::DontInline)) {
nameString += sep + "DontInline";
sep = "|";
}
if (e == static_cast<uint32_t>(FunctionControl::Pure))
return "Pure";
if (e & static_cast<uint32_t>(FunctionControl::Pure)) {
nameString += sep + "Pure";
sep = "|";
}
if (e == static_cast<uint32_t>(FunctionControl::Const))
return "Const";
if (e & static_cast<uint32_t>(FunctionControl::Const)) {
nameString += sep + "Const";
sep = "|";
};
return nameString;
} }
std::string getMemorySemanticsName(uint32_t e) { return Extensions;
std::string nameString = "";
std::string sep = "";
if (e == static_cast<uint32_t>(MemorySemantics::None))
return "None";
if (e == static_cast<uint32_t>(MemorySemantics::Acquire))
return "Acquire";
if (e & static_cast<uint32_t>(MemorySemantics::Acquire)) {
nameString += sep + "Acquire";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::Release))
return "Release";
if (e & static_cast<uint32_t>(MemorySemantics::Release)) {
nameString += sep + "Release";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::AcquireRelease))
return "AcquireRelease";
if (e & static_cast<uint32_t>(MemorySemantics::AcquireRelease)) {
nameString += sep + "AcquireRelease";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::SequentiallyConsistent))
return "SequentiallyConsistent";
if (e & static_cast<uint32_t>(MemorySemantics::SequentiallyConsistent)) {
nameString += sep + "SequentiallyConsistent";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::UniformMemory))
return "UniformMemory";
if (e & static_cast<uint32_t>(MemorySemantics::UniformMemory)) {
nameString += sep + "UniformMemory";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::SubgroupMemory))
return "SubgroupMemory";
if (e & static_cast<uint32_t>(MemorySemantics::SubgroupMemory)) {
nameString += sep + "SubgroupMemory";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::WorkgroupMemory))
return "WorkgroupMemory";
if (e & static_cast<uint32_t>(MemorySemantics::WorkgroupMemory)) {
nameString += sep + "WorkgroupMemory";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::CrossWorkgroupMemory))
return "CrossWorkgroupMemory";
if (e & static_cast<uint32_t>(MemorySemantics::CrossWorkgroupMemory)) {
nameString += sep + "CrossWorkgroupMemory";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::AtomicCounterMemory))
return "AtomicCounterMemory";
if (e & static_cast<uint32_t>(MemorySemantics::AtomicCounterMemory)) {
nameString += sep + "AtomicCounterMemory";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::ImageMemory))
return "ImageMemory";
if (e & static_cast<uint32_t>(MemorySemantics::ImageMemory)) {
nameString += sep + "ImageMemory";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::OutputMemoryKHR))
return "OutputMemoryKHR";
if (e & static_cast<uint32_t>(MemorySemantics::OutputMemoryKHR)) {
nameString += sep + "OutputMemoryKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::MakeAvailableKHR))
return "MakeAvailableKHR";
if (e & static_cast<uint32_t>(MemorySemantics::MakeAvailableKHR)) {
nameString += sep + "MakeAvailableKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(MemorySemantics::MakeVisibleKHR))
return "MakeVisibleKHR";
if (e & static_cast<uint32_t>(MemorySemantics::MakeVisibleKHR)) {
nameString += sep + "MakeVisibleKHR";
sep = "|";
};
return nameString;
} }
std::string getMemoryOperandName(uint32_t e) { std::string getLinkStringForBuiltIn(SPIRV::BuiltIn::BuiltIn BuiltInValue) {
std::string nameString = ""; const SPIRV::SymbolicOperand *Lookup =
std::string sep = ""; SPIRV::lookupSymbolicOperandByCategoryAndValue(
if (e == static_cast<uint32_t>(MemoryOperand::None)) SPIRV::OperandCategory::BuiltInOperand, BuiltInValue);
return "None";
if (e == static_cast<uint32_t>(MemoryOperand::Volatile))
return "Volatile";
if (e & static_cast<uint32_t>(MemoryOperand::Volatile)) {
nameString += sep + "Volatile";
sep = "|";
}
if (e == static_cast<uint32_t>(MemoryOperand::Aligned))
return "Aligned";
if (e & static_cast<uint32_t>(MemoryOperand::Aligned)) {
nameString += sep + "Aligned";
sep = "|";
}
if (e == static_cast<uint32_t>(MemoryOperand::Nontemporal))
return "Nontemporal";
if (e & static_cast<uint32_t>(MemoryOperand::Nontemporal)) {
nameString += sep + "Nontemporal";
sep = "|";
}
if (e == static_cast<uint32_t>(MemoryOperand::MakePointerAvailableKHR))
return "MakePointerAvailableKHR";
if (e & static_cast<uint32_t>(MemoryOperand::MakePointerAvailableKHR)) {
nameString += sep + "MakePointerAvailableKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(MemoryOperand::MakePointerVisibleKHR))
return "MakePointerVisibleKHR";
if (e & static_cast<uint32_t>(MemoryOperand::MakePointerVisibleKHR)) {
nameString += sep + "MakePointerVisibleKHR";
sep = "|";
}
if (e == static_cast<uint32_t>(MemoryOperand::NonPrivatePointerKHR))
return "NonPrivatePointerKHR";
if (e & static_cast<uint32_t>(MemoryOperand::NonPrivatePointerKHR)) {
nameString += sep + "NonPrivatePointerKHR";
sep = "|";
};
return nameString;
}
StringRef getScopeName(Scope e) { if (Lookup)
switch (e) { return "__spirv_BuiltIn" + Lookup->Mnemonic.str();
CASE(Scope, CrossDevice) return "UNKNOWN_BUILTIN";
CASE(Scope, Device)
CASE(Scope, Workgroup)
CASE(Scope, Subgroup)
CASE(Scope, Invocation)
CASE(Scope, QueueFamilyKHR)
break;
}
llvm_unreachable("Unexpected operand");
} }
StringRef getGroupOperationName(GroupOperation e) { bool getSpirvBuiltInIdByName(llvm::StringRef Name,
switch (e) { SPIRV::BuiltIn::BuiltIn &BI) {
CASE(GroupOperation, Reduce) const std::string Prefix = "__spirv_BuiltIn";
CASE(GroupOperation, InclusiveScan) if (!Name.startswith(Prefix))
CASE(GroupOperation, ExclusiveScan) return false;
CASE(GroupOperation, ClusteredReduce)
CASE(GroupOperation, PartitionedReduceNV)
CASE(GroupOperation, PartitionedInclusiveScanNV)
CASE(GroupOperation, PartitionedExclusiveScanNV)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getKernelEnqueueFlagsName(KernelEnqueueFlags e) { const SPIRV::SymbolicOperand *Lookup =
switch (e) { SPIRV::lookupSymbolicOperandByCategoryAndMnemonic(
CASE(KernelEnqueueFlags, NoWait) SPIRV::OperandCategory::BuiltInOperand,
CASE(KernelEnqueueFlags, WaitKernel) Name.drop_front(Prefix.length()));
CASE(KernelEnqueueFlags, WaitWorkGroup)
break;
}
llvm_unreachable("Unexpected operand");
}
StringRef getKernelProfilingInfoName(KernelProfilingInfo e) { if (!Lookup)
switch (e) { return false;
CASE(KernelProfilingInfo, None)
CASE(KernelProfilingInfo, CmdExecTime)
break;
}
llvm_unreachable("Unexpected operand");
}
std::string getExtInstSetName(InstructionSet e) { BI = static_cast<SPIRV::BuiltIn::BuiltIn>(Lookup->Value);
switch (e) { return true;
CASE(InstructionSet, OpenCL_std)
CASE(InstructionSet, GLSL_std_450)
CASE(InstructionSet, SPV_AMD_shader_trinary_minmax)
break;
} }
llvm_unreachable("Unexpected operand");
}
} // namespace SPIRV
} // namespace llvm } // namespace llvm

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h

//===-- SPIRVInstPrinter.h - Output SPIR-V MCInsts as ASM -------*- C++ -*-===// //===-- SPIRVInstPrinter.h - Output SPIR-V MCInsts as ASM -------*- C++ -*-===//
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// This class prints a SPIR-V MCInst to a .s file. // This class prints a SPIR-V MCInst to a .s file.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_SPIRV_INSTPRINTER_SPIRVINSTPRINTER_H #ifndef LLVM_LIB_TARGET_SPIRV_INSTPRINTER_SPIRVINSTPRINTER_H
#define LLVM_LIB_TARGET_SPIRV_INSTPRINTER_SPIRVINSTPRINTER_H #define LLVM_LIB_TARGET_SPIRV_INSTPRINTER_SPIRVINSTPRINTER_H
#include "MCTargetDesc/SPIRVBaseInfo.h"
#include "llvm/MC/MCInstPrinter.h" #include "llvm/MC/MCInstPrinter.h"
namespace llvm { namespace llvm {
class SPIRVInstPrinter : public MCInstPrinter { class SPIRVInstPrinter : public MCInstPrinter {
private: private:
void recordOpExtInstImport(const MCInst *MI); void recordOpExtInstImport(const MCInst *MI);
public: public:
Show All 9 Linespublic:
void printOpDecorate(const MCInst *MI, raw_ostream &O); void printOpDecorate(const MCInst *MI, raw_ostream &O);
void printOpExtInst(const MCInst *MI, raw_ostream &O); void printOpExtInst(const MCInst *MI, raw_ostream &O);
void printRemainingVariableOps(const MCInst *MI, unsigned StartIndex, void printRemainingVariableOps(const MCInst *MI, unsigned StartIndex,
raw_ostream &O, bool SkipFirstSpace = false, raw_ostream &O, bool SkipFirstSpace = false,
bool SkipImmediates = false); bool SkipImmediates = false);
void printOpConstantVarOps(const MCInst *MI, unsigned StartIndex, void printOpConstantVarOps(const MCInst *MI, unsigned StartIndex,
raw_ostream &O); raw_ostream &O);
void printExtInst(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printExtension(const MCInst *MI, unsigned OpNo, raw_ostream &O);
template <SPIRV::OperandCategory::OperandCategory category>
void printSymbolicOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
// SPIR-V enumerations printing.
void printCapability(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printSourceLanguage(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printExecutionModel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printAddressingModel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printMemoryModel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printExecutionMode(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printStorageClass(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printDim(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printSamplerAddressingMode(const MCInst *MI, unsigned OpNo,
raw_ostream &O);
void printSamplerFilterMode(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printImageFormat(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printImageChannelOrder(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printImageChannelDataType(const MCInst *MI, unsigned OpNo,
raw_ostream &O);
void printImageOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printFPFastMathMode(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printFPRoundingMode(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printLinkageType(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printAccessQualifier(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printFunctionParameterAttribute(const MCInst *MI, unsigned OpNo,
raw_ostream &O);
void printDecoration(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printBuiltIn(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printSelectionControl(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printLoopControl(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printFunctionControl(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printMemorySemantics(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printMemoryOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printScope(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printGroupOperation(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printKernelEnqueueFlags(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printKernelProfilingInfo(const MCInst *MI, unsigned OpNo,
raw_ostream &O);
// Autogenerated by tblgen. // Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override; std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O); void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo); static const char *getRegisterName(unsigned RegNo);
}; };
} // namespace llvm } // namespace llvm
#endif // LLVM_LIB_TARGET_SPIRV_INSTPRINTER_SPIRVINSTPRINTER_H #endif // LLVM_LIB_TARGET_SPIRV_INSTPRINTER_SPIRVINSTPRINTER_H

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp

Show All 18 Lines
#include "llvm/MC/MCInst.h" #include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSymbol.h" #include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h" #include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h" #include "llvm/Support/FormattedStream.h"
using namespace llvm; using namespace llvm;
using namespace llvm::SPIRV;
#define DEBUG_TYPE "asm-printer" #define DEBUG_TYPE "asm-printer"
// Include the auto-generated portion of the assembly writer. // Include the auto-generated portion of the assembly writer.
#include "SPIRVGenAsmWriter.inc" #include "SPIRVGenAsmWriter.inc"
void SPIRVInstPrinter::printRemainingVariableOps(const MCInst *MI, void SPIRVInstPrinter::printRemainingVariableOps(const MCInst *MI,
unsigned StartIndex, unsigned StartIndex,
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines if (MCDesc.isVariadic()) {
if (NumFixedOps > 0 && if (NumFixedOps > 0 &&
MCDesc.OpInfo[LastFixedIndex].OperandType == MCOI::OPERAND_UNKNOWN) { MCDesc.OpInfo[LastFixedIndex].OperandType == MCOI::OPERAND_UNKNOWN) {
// For instructions where a custom type (not reg or immediate) comes as // For instructions where a custom type (not reg or immediate) comes as
// the last operand before the variable_ops. This is usually a StringImm // the last operand before the variable_ops. This is usually a StringImm
// operand, but there are a few other cases. // operand, but there are a few other cases.
switch (OpCode) { switch (OpCode) {
case SPIRV::OpTypeImage: case SPIRV::OpTypeImage:
OS << ' '; OS << ' ';
printAccessQualifier(MI, FirstVariableIndex, OS); printSymbolicOperand<OperandCategory::AccessQualifierOperand>(
MI, FirstVariableIndex, OS);
break; break;
case SPIRV::OpVariable: case SPIRV::OpVariable:
OS << ' '; OS << ' ';
printOperand(MI, FirstVariableIndex, OS); printOperand(MI, FirstVariableIndex, OS);
break; break;
case SPIRV::OpEntryPoint: { case SPIRV::OpEntryPoint: {
// Print the interface ID operands, skipping the name's string // Print the interface ID operands, skipping the name's string
// literal. // literal.
printRemainingVariableOps(MI, NumFixedOps, OS, false, true); printRemainingVariableOps(MI, NumFixedOps, OS, false, true);
break; break;
} }
case SPIRV::OpExecutionMode: case SPIRV::OpExecutionMode:
case SPIRV::OpExecutionModeId: case SPIRV::OpExecutionModeId:
case SPIRV::OpLoopMerge: { case SPIRV::OpLoopMerge: {
// Print any literals after the OPERAND_UNKNOWN argument normally. // Print any literals after the OPERAND_UNKNOWN argument normally.
printRemainingVariableOps(MI, NumFixedOps, OS); printRemainingVariableOps(MI, NumFixedOps, OS);
break; break;
} }
default: default:
break; // printStringImm has already been handled break; // printStringImm has already been handled.
} }
} else { } else {
// For instructions with no fixed ops or a reg/immediate as the final // For instructions with no fixed ops or a reg/immediate as the final
// fixed operand, we can usually print the rest with "printOperand", but // fixed operand, we can usually print the rest with "printOperand", but
// check for a few cases with custom types first. // check for a few cases with custom types first.
switch (OpCode) { switch (OpCode) {
case SPIRV::OpLoad: case SPIRV::OpLoad:
case SPIRV::OpStore: case SPIRV::OpStore:
OS << ' '; OS << ' ';
printMemoryOperand(MI, FirstVariableIndex, OS); printSymbolicOperand<OperandCategory::MemoryOperandOperand>(
MI, FirstVariableIndex, OS);
printRemainingVariableOps(MI, FirstVariableIndex + 1, OS); printRemainingVariableOps(MI, FirstVariableIndex + 1, OS);
break; break;
case SPIRV::OpImageSampleImplicitLod: case SPIRV::OpImageSampleImplicitLod:
case SPIRV::OpImageSampleDrefImplicitLod: case SPIRV::OpImageSampleDrefImplicitLod:
case SPIRV::OpImageSampleProjImplicitLod: case SPIRV::OpImageSampleProjImplicitLod:
case SPIRV::OpImageSampleProjDrefImplicitLod: case SPIRV::OpImageSampleProjDrefImplicitLod:
case SPIRV::OpImageFetch: case SPIRV::OpImageFetch:
case SPIRV::OpImageGather: case SPIRV::OpImageGather:
case SPIRV::OpImageDrefGather: case SPIRV::OpImageDrefGather:
case SPIRV::OpImageRead: case SPIRV::OpImageRead:
case SPIRV::OpImageWrite: case SPIRV::OpImageWrite:
case SPIRV::OpImageSparseSampleImplicitLod: case SPIRV::OpImageSparseSampleImplicitLod:
case SPIRV::OpImageSparseSampleDrefImplicitLod: case SPIRV::OpImageSparseSampleDrefImplicitLod:
case SPIRV::OpImageSparseSampleProjImplicitLod: case SPIRV::OpImageSparseSampleProjImplicitLod:
case SPIRV::OpImageSparseSampleProjDrefImplicitLod: case SPIRV::OpImageSparseSampleProjDrefImplicitLod:
case SPIRV::OpImageSparseFetch: case SPIRV::OpImageSparseFetch:
case SPIRV::OpImageSparseGather: case SPIRV::OpImageSparseGather:
case SPIRV::OpImageSparseDrefGather: case SPIRV::OpImageSparseDrefGather:
case SPIRV::OpImageSparseRead: case SPIRV::OpImageSparseRead:
case SPIRV::OpImageSampleFootprintNV: case SPIRV::OpImageSampleFootprintNV:
OS << ' '; OS << ' ';
printImageOperand(MI, FirstVariableIndex, OS); printSymbolicOperand<OperandCategory::ImageOperandOperand>(
MI, FirstVariableIndex, OS);
printRemainingVariableOps(MI, NumFixedOps + 1, OS); printRemainingVariableOps(MI, NumFixedOps + 1, OS);
break; break;
case SPIRV::OpCopyMemory: case SPIRV::OpCopyMemory:
case SPIRV::OpCopyMemorySized: { case SPIRV::OpCopyMemorySized: {
const unsigned NumOps = MI->getNumOperands(); const unsigned NumOps = MI->getNumOperands();
for (unsigned i = NumFixedOps; i < NumOps; ++i) { for (unsigned i = NumFixedOps; i < NumOps; ++i) {
OS << ' '; OS << ' ';
printMemoryOperand(MI, i, OS); printSymbolicOperand<OperandCategory::MemoryOperandOperand>(MI, i,
if (MI->getOperand(i).getImm() & OS);
static_cast<unsigned>(SPIRV::MemoryOperand::Aligned)) { if (MI->getOperand(i).getImm() & MemoryOperand::Aligned) {
assert(i + 1 < NumOps && "Missing alignment operand"); assert(i + 1 < NumOps && "Missing alignment operand");
OS << ' '; OS << ' ';
printOperand(MI, i + 1, OS); printOperand(MI, i + 1, OS);
i += 1; i += 1;
} }
} }
break; break;
} }
Show All 30 Lines
void SPIRVInstPrinter::printOpDecorate(const MCInst *MI, raw_ostream &O) { void SPIRVInstPrinter::printOpDecorate(const MCInst *MI, raw_ostream &O) {
// The fixed operands have already been printed, so just need to decide what // The fixed operands have already been printed, so just need to decide what
// type of decoration operands to print based on the Decoration type. // type of decoration operands to print based on the Decoration type.
MCInstrDesc MCDesc = MII.get(MI->getOpcode()); MCInstrDesc MCDesc = MII.get(MI->getOpcode());
unsigned NumFixedOps = MCDesc.getNumOperands(); unsigned NumFixedOps = MCDesc.getNumOperands();
if (NumFixedOps != MI->getNumOperands()) { if (NumFixedOps != MI->getNumOperands()) {
auto DecOp = MI->getOperand(NumFixedOps - 1); auto DecOp = MI->getOperand(NumFixedOps - 1);
auto Dec = static_cast<SPIRV::Decoration>(DecOp.getImm()); auto Dec = static_cast<Decoration::Decoration>(DecOp.getImm());
O << ' '; O << ' ';
switch (Dec) { switch (Dec) {
case SPIRV::Decoration::BuiltIn: case Decoration::BuiltIn:
printBuiltIn(MI, NumFixedOps, O); printSymbolicOperand<OperandCategory::BuiltInOperand>(MI, NumFixedOps, O);
break; break;
case SPIRV::Decoration::UniformId: case Decoration::UniformId:
printScope(MI, NumFixedOps, O); printSymbolicOperand<OperandCategory::ScopeOperand>(MI, NumFixedOps, O);
break; break;
case SPIRV::Decoration::FuncParamAttr: case Decoration::FuncParamAttr:
printFunctionParameterAttribute(MI, NumFixedOps, O); printSymbolicOperand<OperandCategory::FunctionParameterAttributeOperand>(
MI, NumFixedOps, O);
break;
case Decoration::FPRoundingMode:
printSymbolicOperand<OperandCategory::FPRoundingModeOperand>(
MI, NumFixedOps, O);
break;
case Decoration::FPFastMathMode:
printSymbolicOperand<OperandCategory::FPFastMathModeOperand>(
MI, NumFixedOps, O);
break; break;
case SPIRV::Decoration::FPRoundingMode: case Decoration::LinkageAttributes:
printFPRoundingMode(MI, NumFixedOps, O); case Decoration::UserSemantic:
break;
case SPIRV::Decoration::FPFastMathMode:
printFPFastMathMode(MI, NumFixedOps, O);
break;
case SPIRV::Decoration::LinkageAttributes:
case SPIRV::Decoration::UserSemantic:
printStringImm(MI, NumFixedOps, O); printStringImm(MI, NumFixedOps, O);
break; break;
default: default:
printRemainingVariableOps(MI, NumFixedOps, O, true); printRemainingVariableOps(MI, NumFixedOps, O, true);
break; break;
} }
} }
} }
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines while (StrStartIndex < NumOps) {
O << '"'; O << '"';
unsigned numOpsInString = (Str.size() / 4) + 1; unsigned numOpsInString = (Str.size() / 4) + 1;
StrStartIndex += numOpsInString; StrStartIndex += numOpsInString;
// Check for final Op of "OpDecorate %x %stringImm %linkageAttribute". // Check for final Op of "OpDecorate %x %stringImm %linkageAttribute".
if (MI->getOpcode() == SPIRV::OpDecorate && if (MI->getOpcode() == SPIRV::OpDecorate &&
MI->getOperand(1).getImm() == MI->getOperand(1).getImm() ==
static_cast<unsigned>(SPIRV::Decoration::LinkageAttributes)) { static_cast<unsigned>(Decoration::LinkageAttributes)) {
O << ' '; O << ' ';
printLinkageType(MI, StrStartIndex, O); printSymbolicOperand<OperandCategory::LinkageTypeOperand>(
MI, StrStartIndex, O);
break; break;
} }
} }
} }
void SPIRVInstPrinter::printExtInst(const MCInst *MI, unsigned OpNo, void SPIRVInstPrinter::printExtension(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
llvm_unreachable("Unimplemented printExtInst");
}
void SPIRVInstPrinter::printCapability(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::Capability e =
static_cast<SPIRV::Capability>(MI->getOperand(OpNo).getImm());
O << SPIRV::getCapabilityName(e);
}
}
void SPIRVInstPrinter::printSourceLanguage(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::SourceLanguage e =
static_cast<SPIRV::SourceLanguage>(MI->getOperand(OpNo).getImm());
O << SPIRV::getSourceLanguageName(e);
}
}
void SPIRVInstPrinter::printExecutionModel(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::ExecutionModel e =
static_cast<SPIRV::ExecutionModel>(MI->getOperand(OpNo).getImm());
O << SPIRV::getExecutionModelName(e);
}
}
void SPIRVInstPrinter::printAddressingModel(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::AddressingModel e =
static_cast<SPIRV::AddressingModel>(MI->getOperand(OpNo).getImm());
O << SPIRV::getAddressingModelName(e);
}
}
void SPIRVInstPrinter::printMemoryModel(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::MemoryModel e =
static_cast<SPIRV::MemoryModel>(MI->getOperand(OpNo).getImm());
O << SPIRV::getMemoryModelName(e);
}
}
void SPIRVInstPrinter::printExecutionMode(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::ExecutionMode e =
static_cast<SPIRV::ExecutionMode>(MI->getOperand(OpNo).getImm());
O << SPIRV::getExecutionModeName(e);
}
}
void SPIRVInstPrinter::printStorageClass(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::StorageClass e =
static_cast<SPIRV::StorageClass>(MI->getOperand(OpNo).getImm());
O << SPIRV::getStorageClassName(e);
}
}
void SPIRVInstPrinter::printDim(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::Dim e = static_cast<SPIRV::Dim>(MI->getOperand(OpNo).getImm());
O << SPIRV::getDimName(e);
}
}
void SPIRVInstPrinter::printSamplerAddressingMode(const MCInst *MI,
unsigned OpNo,
raw_ostream &O) { raw_ostream &O) {
if (OpNo < MI->getNumOperands()) { llvm_unreachable("Unimplemented printExtension");
SPIRV::SamplerAddressingMode e = static_cast<SPIRV::SamplerAddressingMode>(
MI->getOperand(OpNo).getImm());
O << SPIRV::getSamplerAddressingModeName(e);
}
}
void SPIRVInstPrinter::printSamplerFilterMode(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::SamplerFilterMode e =
static_cast<SPIRV::SamplerFilterMode>(MI->getOperand(OpNo).getImm());
O << SPIRV::getSamplerFilterModeName(e);
}
}
void SPIRVInstPrinter::printImageFormat(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::ImageFormat e =
static_cast<SPIRV::ImageFormat>(MI->getOperand(OpNo).getImm());
O << SPIRV::getImageFormatName(e);
}
}
void SPIRVInstPrinter::printImageChannelOrder(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::ImageChannelOrder e =
static_cast<SPIRV::ImageChannelOrder>(MI->getOperand(OpNo).getImm());
O << SPIRV::getImageChannelOrderName(e);
}
}
void SPIRVInstPrinter::printImageChannelDataType(const MCInst *MI,
unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::ImageChannelDataType e =
static_cast<SPIRV::ImageChannelDataType>(MI->getOperand(OpNo).getImm());
O << SPIRV::getImageChannelDataTypeName(e);
}
}
void SPIRVInstPrinter::printImageOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getImageOperandName(e);
}
}
void SPIRVInstPrinter::printFPFastMathMode(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getFPFastMathModeName(e);
}
}
void SPIRVInstPrinter::printFPRoundingMode(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::FPRoundingMode e =
static_cast<SPIRV::FPRoundingMode>(MI->getOperand(OpNo).getImm());
O << SPIRV::getFPRoundingModeName(e);
}
}
void SPIRVInstPrinter::printLinkageType(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::LinkageType e =
static_cast<SPIRV::LinkageType>(MI->getOperand(OpNo).getImm());
O << SPIRV::getLinkageTypeName(e);
}
}
void SPIRVInstPrinter::printAccessQualifier(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::AccessQualifier e =
static_cast<SPIRV::AccessQualifier>(MI->getOperand(OpNo).getImm());
O << SPIRV::getAccessQualifierName(e);
}
}
void SPIRVInstPrinter::printFunctionParameterAttribute(const MCInst *MI,
unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::FunctionParameterAttribute e =
static_cast<SPIRV::FunctionParameterAttribute>(
MI->getOperand(OpNo).getImm());
O << SPIRV::getFunctionParameterAttributeName(e);
}
}
void SPIRVInstPrinter::printDecoration(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::Decoration e =
static_cast<SPIRV::Decoration>(MI->getOperand(OpNo).getImm());
O << SPIRV::getDecorationName(e);
}
}
void SPIRVInstPrinter::printBuiltIn(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::BuiltIn e =
static_cast<SPIRV::BuiltIn>(MI->getOperand(OpNo).getImm());
O << SPIRV::getBuiltInName(e);
}
}
void SPIRVInstPrinter::printSelectionControl(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getSelectionControlName(e);
}
}
void SPIRVInstPrinter::printLoopControl(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getLoopControlName(e);
}
}
void SPIRVInstPrinter::printFunctionControl(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getFunctionControlName(e);
}
}
void SPIRVInstPrinter::printMemorySemantics(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getMemorySemanticsName(e);
}
}
void SPIRVInstPrinter::printMemoryOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
unsigned e = static_cast<unsigned>(MI->getOperand(OpNo).getImm());
O << SPIRV::getMemoryOperandName(e);
}
}
void SPIRVInstPrinter::printScope(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::Scope e = static_cast<SPIRV::Scope>(MI->getOperand(OpNo).getImm());
O << SPIRV::getScopeName(e);
}
}
void SPIRVInstPrinter::printGroupOperation(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::GroupOperation e =
static_cast<SPIRV::GroupOperation>(MI->getOperand(OpNo).getImm());
O << SPIRV::getGroupOperationName(e);
}
}
void SPIRVInstPrinter::printKernelEnqueueFlags(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
if (OpNo < MI->getNumOperands()) {
SPIRV::KernelEnqueueFlags e =
static_cast<SPIRV::KernelEnqueueFlags>(MI->getOperand(OpNo).getImm());
O << SPIRV::getKernelEnqueueFlagsName(e);
}
} }
void SPIRVInstPrinter::printKernelProfilingInfo(const MCInst *MI, unsigned OpNo, template <OperandCategory::OperandCategory category>
void SPIRVInstPrinter::printSymbolicOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) { raw_ostream &O) {
if (OpNo < MI->getNumOperands()) { if (OpNo < MI->getNumOperands()) {
SPIRV::KernelProfilingInfo e = O << getSymbolicOperandMnemonic(category, MI->getOperand(OpNo).getImm());
static_cast<SPIRV::KernelProfilingInfo>(MI->getOperand(OpNo).getImm());
O << SPIRV::getKernelProfilingInfoName(e);
} }
} }

llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp

Show First 20 Lines • Show All 58 Lines • ▼ Show 20 Linespublic:
void outputModuleSection(SPIRV::ModuleSectionType MSType); void outputModuleSection(SPIRV::ModuleSectionType MSType);
void outputEntryPoints(); void outputEntryPoints();
void outputDebugSourceAndStrings(const Module &M); void outputDebugSourceAndStrings(const Module &M);
void outputOpExtInstImports(const Module &M); void outputOpExtInstImports(const Module &M);
void outputOpMemoryModel(); void outputOpMemoryModel();
void outputOpFunctionEnd(); void outputOpFunctionEnd();
void outputExtFuncDecls(); void outputExtFuncDecls();
void outputExecutionModeFromMDNode(Register Reg, MDNode *Node, void outputExecutionModeFromMDNode(Register Reg, MDNode *Node,
SPIRV::ExecutionMode EM); SPIRV::ExecutionMode::ExecutionMode EM);
void outputExecutionMode(const Module &M); void outputExecutionMode(const Module &M);
void outputAnnotations(const Module &M); void outputAnnotations(const Module &M);
void outputModuleSections(); void outputModuleSections();
void emitInstruction(const MachineInstr *MI) override; void emitInstruction(const MachineInstr *MI) override;
void emitFunctionEntryLabel() override {} void emitFunctionEntryLabel() override {}
void emitFunctionHeader() override; void emitFunctionHeader() override;
void emitFunctionBodyStart() override {} void emitFunctionBodyStart() override {}
▲ Show 20 Lines • Show All 210 Lines • ▼ Show 20 Lines
// interfaces. The interface is a list of IDs of global OpVariable instructions. // interfaces. The interface is a list of IDs of global OpVariable instructions.
// These declare the set of global variables from a module that form // These declare the set of global variables from a module that form
// the interface of this entry point. // the interface of this entry point.
void SPIRVAsmPrinter::outputEntryPoints() { void SPIRVAsmPrinter::outputEntryPoints() {
// Find all OpVariable IDs with required StorageClass. // Find all OpVariable IDs with required StorageClass.
DenseSet<Register> InterfaceIDs; DenseSet<Register> InterfaceIDs;
for (MachineInstr *MI : MAI->GlobalVarList) { for (MachineInstr *MI : MAI->GlobalVarList) {
assert(MI->getOpcode() == SPIRV::OpVariable); assert(MI->getOpcode() == SPIRV::OpVariable);
auto SC = static_cast<SPIRV::StorageClass>(MI->getOperand(2).getImm()); auto SC = static_cast<SPIRV::StorageClass::StorageClass>(
MI->getOperand(2).getImm());
// Before version 1.4, the interface's storage classes are limited to // Before version 1.4, the interface's storage classes are limited to
// the Input and Output storage classes. Starting with version 1.4, // the Input and Output storage classes. Starting with version 1.4,
// the interface's storage classes are all storage classes used in // the interface's storage classes are all storage classes used in
// declaring all global variables referenced by the entry point call tree. // declaring all global variables referenced by the entry point call tree.
if (ST->getSPIRVVersion() >= 14 || SC == SPIRV::StorageClass::Input || if (ST->getSPIRVVersion() >= 14 || SC == SPIRV::StorageClass::Input ||
SC == SPIRV::StorageClass::Output) { SC == SPIRV::StorageClass::Output) {
MachineFunction *MF = MI->getMF(); MachineFunction *MF = MI->getMF();
Register Reg = MAI->getRegisterAlias(MF, MI->getOperand(0).getReg()); Register Reg = MAI->getRegisterAlias(MF, MI->getOperand(0).getReg());
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines if (auto *CMeta = dyn_cast<ConstantAsMetadata>(MDOp)) {
Register FuncReg = MAI->getFuncReg(CE->getName().str()); Register FuncReg = MAI->getFuncReg(CE->getName().str());
assert(FuncReg.isValid()); assert(FuncReg.isValid());
Inst.addOperand(MCOperand::createReg(FuncReg)); Inst.addOperand(MCOperand::createReg(FuncReg));
} }
} }
} }
} }
void SPIRVAsmPrinter::outputExecutionModeFromMDNode(Register Reg, MDNode *Node, void SPIRVAsmPrinter::outputExecutionModeFromMDNode(
SPIRV::ExecutionMode EM) { Register Reg, MDNode *Node, SPIRV::ExecutionMode::ExecutionMode EM) {
MCInst Inst; MCInst Inst;
Inst.setOpcode(SPIRV::OpExecutionMode); Inst.setOpcode(SPIRV::OpExecutionMode);
Inst.addOperand(MCOperand::createReg(Reg)); Inst.addOperand(MCOperand::createReg(Reg));
Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM))); Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM)));
addOpsFromMDNode(Node, Inst, MAI); addOpsFromMDNode(Node, Inst, MAI);
outputMCInst(Inst); outputMCInst(Inst);
} }
▲ Show 20 Lines • Show All 122 Lines • Show Last 20 Lines

llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp

Show First 20 Lines • Show All 126 Lines • ▼ Show 20 Linesbool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
if (VRegs.size() > 0) { if (VRegs.size() > 0) {
unsigned i = 0; unsigned i = 0;
for (const auto &Arg : F.args()) { for (const auto &Arg : F.args()) {
// Currently formal args should use single registers. // Currently formal args should use single registers.
// TODO: handle the case of multiple registers. // TODO: handle the case of multiple registers.
if (VRegs[i].size() > 1) if (VRegs[i].size() > 1)
return false; return false;
Type *ArgTy = FTy->getParamType(i); Type *ArgTy = FTy->getParamType(i);
SPIRV::AccessQualifier AQ = SPIRV::AccessQualifier::ReadWrite; SPIRV::AccessQualifier::AccessQualifier AQ =
SPIRV::AccessQualifier::ReadWrite;
MDNode *Node = F.getMetadata("kernel_arg_access_qual"); MDNode *Node = F.getMetadata("kernel_arg_access_qual");
if (Node && i < Node->getNumOperands()) { if (Node && i < Node->getNumOperands()) {
StringRef AQString = cast<MDString>(Node->getOperand(i))->getString(); StringRef AQString = cast<MDString>(Node->getOperand(i))->getString();
if (AQString.compare("read_only") == 0) if (AQString.compare("read_only") == 0)
AQ = SPIRV::AccessQualifier::ReadOnly; AQ = SPIRV::AccessQualifier::ReadOnly;
else if (AQString.compare("write_only") == 0) else if (AQString.compare("write_only") == 0)
AQ = SPIRV::AccessQualifier::WriteOnly; AQ = SPIRV::AccessQualifier::WriteOnly;
} }
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines for (const auto &Arg : F.args()) {
if (Node && i < Node->getNumOperands() && if (Node && i < Node->getNumOperands() &&
isa<MDNode>(Node->getOperand(i))) { isa<MDNode>(Node->getOperand(i))) {
MDNode *MD = cast<MDNode>(Node->getOperand(i)); MDNode *MD = cast<MDNode>(Node->getOperand(i));
for (const MDOperand &MDOp : MD->operands()) { for (const MDOperand &MDOp : MD->operands()) {
MDNode *MD2 = dyn_cast<MDNode>(MDOp); MDNode *MD2 = dyn_cast<MDNode>(MDOp);
assert(MD2 && "Metadata operand is expected"); assert(MD2 && "Metadata operand is expected");
ConstantInt *Const = getConstInt(MD2, 0); ConstantInt *Const = getConstInt(MD2, 0);
assert(Const && "MDOperand should be ConstantInt"); assert(Const && "MDOperand should be ConstantInt");
auto Dec = static_cast<SPIRV::Decoration>(Const->getZExtValue()); auto Dec =
static_cast<SPIRV::Decoration::Decoration>(Const->getZExtValue());
std::vector<uint32_t> DecVec; std::vector<uint32_t> DecVec;
for (unsigned j = 1; j < MD2->getNumOperands(); j++) { for (unsigned j = 1; j < MD2->getNumOperands(); j++) {
ConstantInt *Const = getConstInt(MD2, j); ConstantInt *Const = getConstInt(MD2, j);
assert(Const && "MDOperand should be ConstantInt"); assert(Const && "MDOperand should be ConstantInt");
DecVec.push_back(static_cast<uint32_t>(Const->getZExtValue())); DecVec.push_back(static_cast<uint32_t>(Const->getZExtValue()));
} }
buildOpDecorate(VRegs[i][0], MIRBuilder, Dec, DecVec); buildOpDecorate(VRegs[i][0], MIRBuilder, Dec, DecVec);
} }
▲ Show 20 Lines • Show All 125 Lines • Show Last 20 Lines

llvm/lib/Target/SPIRV/SPIRVEnums.td

  • This file was deleted.
//===-- SPIRVEnums.td - Describe SPIRV Enum Operands -------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// All SPIRV enums defined in SPIRVBaseInfo.h should have a corresponding enum
// operand here. This enables the correct PrintMethod to be defined so
// its name or mask bits can be automatically printed in SPIRVInstPrinter
// when referred to in SPIRVInstrInfo.td.
//
//===----------------------------------------------------------------------===//
class EnumOperand<string Name> : Operand<i32>{
let PrintMethod = "print"#Name;
}
def ExtInst : EnumOperand<"ExtInst">;
def Capability : EnumOperand<"Capability">;
def SourceLanguage : EnumOperand<"SourceLanguage">;
def ExecutionModel : EnumOperand<"ExecutionModel">;
def AddressingModel : EnumOperand<"AddressingModel">;
def MemoryModel : EnumOperand<"MemoryModel">;
def ExecutionMode : EnumOperand<"ExecutionMode">;
def StorageClass : EnumOperand<"StorageClass">;
def Dim : EnumOperand<"Dim">;
def SamplerAddressingMode : EnumOperand<"SamplerAddressingMode">;
def SamplerFilterMode : EnumOperand<"SamplerFilterMode">;
def ImageFormat : EnumOperand<"ImageFormat">;
def ImageChannelOrder : EnumOperand<"ImageChannelOrder">;
def ImageChannelDataType : EnumOperand<"ImageChannelDataType">;
def ImageOperand : EnumOperand<"ImageOperand">;
def FPFastMathMode : EnumOperand<"FPFastMathMode">;
def FProundingMode : EnumOperand<"FPRoundingMode">;
def LinkageType : EnumOperand<"LinkageType">;
def AccessQualifier : EnumOperand<"AccessQualifier">;
def FunctionParameterAttribute : EnumOperand<"FunctionParameterAttribute">;
def Decoration : EnumOperand<"Decoration">;
def Builtin : EnumOperand<"Builtin">;
def SelectionControl: EnumOperand<"SelectionControl">;
def LoopControl: EnumOperand<"LoopControl">;
def FunctionControl : EnumOperand<"FunctionControl">;
def MemorySemantics : EnumOperand<"MemorySemantics">;
def MemoryOperand : EnumOperand<"MemoryOperand">;
def Scope : EnumOperand<"Scope">;
def GroupOperation : EnumOperand<"GroupOperation">;
def KernelEnqueueFlags : EnumOperand<"KernelEnqueueFlags">;
def KernelProfilingInfo : EnumOperand<"KernelProfilingInfo">;

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h

Show All 39 Linesclass SPIRVGlobalRegistry {
SmallPtrSet<const Type *, 4> TypesInProcessing; SmallPtrSet<const Type *, 4> TypesInProcessing;
DenseMap<const Type *, SPIRVType *> ForwardPointerTypes; DenseMap<const Type *, SPIRVType *> ForwardPointerTypes;
// Number of bits pointers and size_t integers require. // Number of bits pointers and size_t integers require.
const unsigned PointerSize; const unsigned PointerSize;
// Add a new OpTypeXXX instruction without checking for duplicates. // Add a new OpTypeXXX instruction without checking for duplicates.
SPIRVType * SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ =
SPIRV::AccessQualifier AQ = SPIRV::AccessQualifier::ReadWrite, SPIRV::AccessQualifier::ReadWrite,
bool EmitIR = true); bool EmitIR = true);
SPIRVType *findSPIRVType( SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
const Type *Ty, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier accessQual =
SPIRV::AccessQualifier accessQual = SPIRV::AccessQualifier::ReadWrite, SPIRV::AccessQualifier::ReadWrite,
bool EmitIR = true); bool EmitIR = true);
SPIRVType *restOfCreateSPIRVType(const Type *Type, SPIRVType *
MachineIRBuilder &MIRBuilder, restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AccessQual, SPIRV::AccessQualifier::AccessQualifier AccessQual,
bool EmitIR); bool EmitIR);
public: public:
SPIRVGlobalRegistry(unsigned PointerSize); SPIRVGlobalRegistry(unsigned PointerSize);
MachineFunction *CurMF; MachineFunction *CurMF;
void add(const Constant *C, MachineFunction *MF, Register R) { void add(const Constant *C, MachineFunction *MF, Register R) {
DT.add(C, MF, R); DT.add(C, MF, R);
Show All 25 Linespublic:
void buildDepsGraph(std::vector<SPIRV::DTSortableEntry *> &Graph, void buildDepsGraph(std::vector<SPIRV::DTSortableEntry *> &Graph,
MachineModuleInfo *MMI = nullptr) { MachineModuleInfo *MMI = nullptr) {
DT.buildDepsGraph(Graph, MMI); DT.buildDepsGraph(Graph, MMI);
} }
// Get or create a SPIR-V type corresponding the given LLVM IR type, // Get or create a SPIR-V type corresponding the given LLVM IR type,
// and map it to the given VReg by creating an ASSIGN_TYPE instruction. // and map it to the given VReg by creating an ASSIGN_TYPE instruction.
SPIRVType *assignTypeToVReg( SPIRVType *assignTypeToVReg(const Type *Type, Register VReg,
const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AQ = SPIRV::AccessQualifier::ReadWrite, SPIRV::AccessQualifier::AccessQualifier AQ =
SPIRV::AccessQualifier::ReadWrite,
bool EmitIR = true); bool EmitIR = true);
SPIRVType *assignIntTypeToVReg(unsigned BitWidth, Register VReg, SPIRVType *assignIntTypeToVReg(unsigned BitWidth, Register VReg,
MachineInstr &I, const SPIRVInstrInfo &TII); MachineInstr &I, const SPIRVInstrInfo &TII);
SPIRVType *assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements, SPIRVType *assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements,
Register VReg, MachineInstr &I, Register VReg, MachineInstr &I,
const SPIRVInstrInfo &TII); const SPIRVInstrInfo &TII);
// In cases where the SPIR-V type is already known, this function can be // In cases where the SPIR-V type is already known, this function can be
// used to map it to the given VReg via an ASSIGN_TYPE instruction. // used to map it to the given VReg via an ASSIGN_TYPE instruction.
void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg, void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg,
MachineFunction &MF); MachineFunction &MF);
// Either generate a new OpTypeXXX instruction or return an existing one // Either generate a new OpTypeXXX instruction or return an existing one
// corresponding to the given LLVM IR type. // corresponding to the given LLVM IR type.
// EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes) // EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes)
// because this method may be called from InstructionSelector and we don't // because this method may be called from InstructionSelector and we don't
// want to emit extra IR instructions there. // want to emit extra IR instructions there.
SPIRVType *getOrCreateSPIRVType( SPIRVType *getOrCreateSPIRVType(const Type *Type,
const Type *Type, MachineIRBuilder &MIRBuilder, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AQ = SPIRV::AccessQualifier::ReadWrite, SPIRV::AccessQualifier::AccessQualifier AQ =
SPIRV::AccessQualifier::ReadWrite,
bool EmitIR = true); bool EmitIR = true);
const Type *getTypeForSPIRVType(const SPIRVType *Ty) const { const Type *getTypeForSPIRVType(const SPIRVType *Ty) const {
auto Res = SPIRVToLLVMType.find(Ty); auto Res = SPIRVToLLVMType.find(Ty);
assert(Res != SPIRVToLLVMType.end()); assert(Res != SPIRVToLLVMType.end());
return Res->second; return Res->second;
} }
// Return the SPIR-V type instruction corresponding to the given VReg, or // Return the SPIR-V type instruction corresponding to the given VReg, or
Show All 21 Linespublic:
// For vectors or scalars of ints/floats, return the scalar type's bitwidth. // For vectors or scalars of ints/floats, return the scalar type's bitwidth.
unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const; unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const;
// For integer vectors or scalars, return whether the integers are signed. // For integer vectors or scalars, return whether the integers are signed.
bool isScalarOrVectorSigned(const SPIRVType *Type) const; bool isScalarOrVectorSigned(const SPIRVType *Type) const;
// Gets the storage class of the pointer type assigned to this vreg. // Gets the storage class of the pointer type assigned to this vreg.
SPIRV::StorageClass getPointerStorageClass(Register VReg) const; SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const;
// Return the number of bits SPIR-V pointers and size_t variables require. // Return the number of bits SPIR-V pointers and size_t variables require.
unsigned getPointerSize() const { return PointerSize; } unsigned getPointerSize() const { return PointerSize; }
private: private:
SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder); SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
SPIRVType *getOpTypeInt(uint32_t Width, MachineIRBuilder &MIRBuilder, SPIRVType *getOpTypeInt(uint32_t Width, MachineIRBuilder &MIRBuilder,
Show All 10 Lines SPIRVType *getOpTypeArray(uint32_t NumElems, SPIRVType *ElemType,
MachineIRBuilder &MIRBuilder, bool EmitIR = true); MachineIRBuilder &MIRBuilder, bool EmitIR = true);
SPIRVType *getOpTypeOpaque(const StructType *Ty, SPIRVType *getOpTypeOpaque(const StructType *Ty,
MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
SPIRVType *getOpTypeStruct(const StructType *Ty, MachineIRBuilder &MIRBuilder, SPIRVType *getOpTypeStruct(const StructType *Ty, MachineIRBuilder &MIRBuilder,
bool EmitIR = true); bool EmitIR = true);
SPIRVType *getOpTypePointer(SPIRV::StorageClass SC, SPIRVType *ElemType, SPIRVType *getOpTypePointer(SPIRV::StorageClass::StorageClass SC,
MachineIRBuilder &MIRBuilder, Register Reg); SPIRVType *ElemType, MachineIRBuilder &MIRBuilder,
Register Reg);
SPIRVType *getOpTypeForwardPointer(SPIRV::StorageClass SC, SPIRVType *getOpTypeForwardPointer(SPIRV::StorageClass::StorageClass SC,
MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
SPIRVType *getOpTypeFunction(SPIRVType *RetType, SPIRVType *getOpTypeFunction(SPIRVType *RetType,
const SmallVectorImpl<SPIRVType *> &ArgTypes, const SmallVectorImpl<SPIRVType *> &ArgTypes,
MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
std::tuple<Register, ConstantInt *, bool> getOrCreateConstIntReg( std::tuple<Register, ConstantInt *, bool> getOrCreateConstIntReg(
uint64_t Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder, uint64_t Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr); MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
SPIRVType *finishCreatingSPIRVType(const Type *LLVMTy, SPIRVType *SpirvType); SPIRVType *finishCreatingSPIRVType(const Type *LLVMTy, SPIRVType *SpirvType);
public: public:
Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder, Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder,
SPIRVType *SpvType = nullptr, bool EmitIR = true); SPIRVType *SpvType = nullptr, bool EmitIR = true);
Register getOrCreateConstInt(uint64_t Val, MachineInstr &I, Register getOrCreateConstInt(uint64_t Val, MachineInstr &I,
SPIRVType *SpvType, const SPIRVInstrInfo &TII); SPIRVType *SpvType, const SPIRVInstrInfo &TII);
Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder, Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder,
SPIRVType *SpvType = nullptr); SPIRVType *SpvType = nullptr);
Register getOrCreateConsIntVector(uint64_t Val, MachineInstr &I, Register getOrCreateConsIntVector(uint64_t Val, MachineInstr &I,
SPIRVType *SpvType, SPIRVType *SpvType,
const SPIRVInstrInfo &TII); const SPIRVInstrInfo &TII);
Register getOrCreateUndef(MachineInstr &I, SPIRVType *SpvType, Register getOrCreateUndef(MachineInstr &I, SPIRVType *SpvType,
const SPIRVInstrInfo &TII); const SPIRVInstrInfo &TII);
Register Register buildGlobalVariable(Register Reg, SPIRVType *BaseType,
buildGlobalVariable(Register Reg, SPIRVType *BaseType, StringRef Name, StringRef Name, const GlobalValue *GV,
const GlobalValue *GV, SPIRV::StorageClass Storage, SPIRV::StorageClass::StorageClass Storage,
const MachineInstr *Init, bool IsConst, bool HasLinkageTy, const MachineInstr *Init, bool IsConst,
SPIRV::LinkageType LinkageType, bool HasLinkageTy,
MachineIRBuilder &MIRBuilder, bool IsInstSelector); SPIRV::LinkageType::LinkageType LinkageType,
MachineIRBuilder &MIRBuilder,
bool IsInstSelector);
// Convenient helpers for getting types with check for duplicates. // Convenient helpers for getting types with check for duplicates.
SPIRVType *getOrCreateSPIRVIntegerType(unsigned BitWidth, SPIRVType *getOrCreateSPIRVIntegerType(unsigned BitWidth,
MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
SPIRVType *getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineInstr &I, SPIRVType *getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineInstr &I,
const SPIRVInstrInfo &TII); const SPIRVInstrInfo &TII);
SPIRVType *getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder); SPIRVType *getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder);
SPIRVType *getOrCreateSPIRVBoolType(MachineInstr &I, SPIRVType *getOrCreateSPIRVBoolType(MachineInstr &I,
const SPIRVInstrInfo &TII); const SPIRVInstrInfo &TII);
SPIRVType *getOrCreateSPIRVVectorType(SPIRVType *BaseType, SPIRVType *getOrCreateSPIRVVectorType(SPIRVType *BaseType,
unsigned NumElements, unsigned NumElements,
MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
SPIRVType *getOrCreateSPIRVVectorType(SPIRVType *BaseType, SPIRVType *getOrCreateSPIRVVectorType(SPIRVType *BaseType,
unsigned NumElements, MachineInstr &I, unsigned NumElements, MachineInstr &I,
const SPIRVInstrInfo &TII); const SPIRVInstrInfo &TII);
SPIRVType *getOrCreateSPIRVPointerType( SPIRVType *getOrCreateSPIRVPointerType(
SPIRVType *BaseType, MachineIRBuilder &MIRBuilder, SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
SPIRV::StorageClass SClass = SPIRV::StorageClass::Function); SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
SPIRVType *getOrCreateSPIRVPointerType( SPIRVType *getOrCreateSPIRVPointerType(
SPIRVType *BaseType, MachineInstr &I, const SPIRVInstrInfo &TII, SPIRVType *BaseType, MachineInstr &I, const SPIRVInstrInfo &TII,
SPIRV::StorageClass SClass = SPIRV::StorageClass::Function); SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
SPIRVType *getOrCreateOpTypeFunctionWithArgs( SPIRVType *getOrCreateOpTypeFunctionWithArgs(
const Type *Ty, SPIRVType *RetType, const Type *Ty, SPIRVType *RetType,
const SmallVectorImpl<SPIRVType *> &ArgTypes, const SmallVectorImpl<SPIRVType *> &ArgTypes,
MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
}; };
} // end namespace llvm } // end namespace llvm
#endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H #endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

Show All 38 LinesSPIRVType *SPIRVGlobalRegistry::assignVectTypeToVReg(
SPIRVType *SpirvType = SPIRVType *SpirvType =
getOrCreateSPIRVVectorType(BaseType, NumElements, I, TII); getOrCreateSPIRVVectorType(BaseType, NumElements, I, TII);
assignSPIRVTypeToVReg(SpirvType, VReg, *CurMF); assignSPIRVTypeToVReg(SpirvType, VReg, *CurMF);
return SpirvType; return SpirvType;
} }
SPIRVType *SPIRVGlobalRegistry::assignTypeToVReg( SPIRVType *SPIRVGlobalRegistry::assignTypeToVReg(
const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AccessQual, bool EmitIR) { SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
SPIRVType *SpirvType = SPIRVType *SpirvType =
getOrCreateSPIRVType(Type, MIRBuilder, AccessQual, EmitIR); getOrCreateSPIRVType(Type, MIRBuilder, AccessQual, EmitIR);
assignSPIRVTypeToVReg(SpirvType, VReg, MIRBuilder.getMF()); assignSPIRVTypeToVReg(SpirvType, VReg, MIRBuilder.getMF());
return SpirvType; return SpirvType;
} }
void SPIRVGlobalRegistry::assignSPIRVTypeToVReg(SPIRVType *SpirvType, void SPIRVGlobalRegistry::assignSPIRVTypeToVReg(SPIRVType *SpirvType,
▲ Show 20 Lines • Show All 235 Lines • ▼ Show 20 Lines constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
*Subtarget.getRegBankInfo()); *Subtarget.getRegBankInfo());
return SpvVecConst; return SpvVecConst;
} }
return Res; return Res;
} }
Register SPIRVGlobalRegistry::buildGlobalVariable( Register SPIRVGlobalRegistry::buildGlobalVariable(
Register ResVReg, SPIRVType *BaseType, StringRef Name, Register ResVReg, SPIRVType *BaseType, StringRef Name,
const GlobalValue *GV, SPIRV::StorageClass Storage, const GlobalValue *GV, SPIRV::StorageClass::StorageClass Storage,
const MachineInstr *Init, bool IsConst, bool HasLinkageTy, const MachineInstr *Init, bool IsConst, bool HasLinkageTy,
SPIRV::LinkageType LinkageType, MachineIRBuilder &MIRBuilder, SPIRV::LinkageType::LinkageType LinkageType, MachineIRBuilder &MIRBuilder,
bool IsInstSelector) { bool IsInstSelector) {
const GlobalVariable *GVar = nullptr; const GlobalVariable *GVar = nullptr;
if (GV) if (GV)
GVar = cast<const GlobalVariable>(GV); GVar = cast<const GlobalVariable>(GV);
else { else {
// If GV is not passed explicitly, use the name to find or construct // If GV is not passed explicitly, use the name to find or construct
// the global variable. // the global variable.
Module *M = MIRBuilder.getMF().getFunction().getParent(); Module *M = MIRBuilder.getMF().getFunction().getParent();
▲ Show 20 Lines • Show All 124 Lines • ▼ Show 20 Lines if (auto PType = dyn_cast<PointerType>(Ty)) {
if (!PType->isOpaque()) if (!PType->isOpaque())
Ty = PType->getNonOpaquePointerElementType(); Ty = PType->getNonOpaquePointerElementType();
} }
if (auto SType = dyn_cast<StructType>(Ty)) if (auto SType = dyn_cast<StructType>(Ty))
return isOpenCLBuiltinType(SType) || isSPIRVBuiltinType(SType); return isOpenCLBuiltinType(SType) || isSPIRVBuiltinType(SType);
return false; return false;
} }
SPIRVType *SPIRVGlobalRegistry::getOpTypePointer(SPIRV::StorageClass SC, SPIRVType *SPIRVGlobalRegistry::getOpTypePointer(
SPIRVType *ElemType, SPIRV::StorageClass::StorageClass SC, SPIRVType *ElemType,
MachineIRBuilder &MIRBuilder, MachineIRBuilder &MIRBuilder, Register Reg) {
Register Reg) {
if (!Reg.isValid()) if (!Reg.isValid())
Reg = createTypeVReg(MIRBuilder); Reg = createTypeVReg(MIRBuilder);
return MIRBuilder.buildInstr(SPIRV::OpTypePointer) return MIRBuilder.buildInstr(SPIRV::OpTypePointer)
.addDef(Reg) .addDef(Reg)
.addImm(static_cast<uint32_t>(SC)) .addImm(static_cast<uint32_t>(SC))
.addUse(getSPIRVTypeID(ElemType)); .addUse(getSPIRVTypeID(ElemType));
} }
SPIRVType * SPIRVType *SPIRVGlobalRegistry::getOpTypeForwardPointer(
SPIRVGlobalRegistry::getOpTypeForwardPointer(SPIRV::StorageClass SC, SPIRV::StorageClass::StorageClass SC, MachineIRBuilder &MIRBuilder) {
MachineIRBuilder &MIRBuilder) {
return MIRBuilder.buildInstr(SPIRV::OpTypeForwardPointer) return MIRBuilder.buildInstr(SPIRV::OpTypeForwardPointer)
.addUse(createTypeVReg(MIRBuilder)) .addUse(createTypeVReg(MIRBuilder))
.addImm(static_cast<uint32_t>(SC)); .addImm(static_cast<uint32_t>(SC));
} }
SPIRVType *SPIRVGlobalRegistry::getOpTypeFunction( SPIRVType *SPIRVGlobalRegistry::getOpTypeFunction(
SPIRVType *RetType, const SmallVectorImpl<SPIRVType *> &ArgTypes, SPIRVType *RetType, const SmallVectorImpl<SPIRVType *> &ArgTypes,
MachineIRBuilder &MIRBuilder) { MachineIRBuilder &MIRBuilder) {
Show All 11 LinesSPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeFunctionWithArgs(
MachineIRBuilder &MIRBuilder) { MachineIRBuilder &MIRBuilder) {
Register Reg = DT.find(Ty, &MIRBuilder.getMF()); Register Reg = DT.find(Ty, &MIRBuilder.getMF());
if (Reg.isValid()) if (Reg.isValid())
return getSPIRVTypeForVReg(Reg); return getSPIRVTypeForVReg(Reg);
SPIRVType *SpirvType = getOpTypeFunction(RetType, ArgTypes, MIRBuilder); SPIRVType *SpirvType = getOpTypeFunction(RetType, ArgTypes, MIRBuilder);
return finishCreatingSPIRVType(Ty, SpirvType); return finishCreatingSPIRVType(Ty, SpirvType);
} }
SPIRVType *SPIRVGlobalRegistry::findSPIRVType(const Type *Ty, SPIRVType *SPIRVGlobalRegistry::findSPIRVType(
MachineIRBuilder &MIRBuilder, const Type *Ty, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AccQual, SPIRV::AccessQualifier::AccessQualifier AccQual, bool EmitIR) {
bool EmitIR) {
Register Reg = DT.find(Ty, &MIRBuilder.getMF()); Register Reg = DT.find(Ty, &MIRBuilder.getMF());
if (Reg.isValid()) if (Reg.isValid())
return getSPIRVTypeForVReg(Reg); return getSPIRVTypeForVReg(Reg);
if (ForwardPointerTypes.find(Ty) != ForwardPointerTypes.end()) if (ForwardPointerTypes.find(Ty) != ForwardPointerTypes.end())
return ForwardPointerTypes[Ty]; return ForwardPointerTypes[Ty];
return restOfCreateSPIRVType(Ty, MIRBuilder, AccQual, EmitIR); return restOfCreateSPIRVType(Ty, MIRBuilder, AccQual, EmitIR);
} }
Register SPIRVGlobalRegistry::getSPIRVTypeID(const SPIRVType *SpirvType) const { Register SPIRVGlobalRegistry::getSPIRVTypeID(const SPIRVType *SpirvType) const {
assert(SpirvType && "Attempting to get type id for nullptr type."); assert(SpirvType && "Attempting to get type id for nullptr type.");
if (SpirvType->getOpcode() == SPIRV::OpTypeForwardPointer) if (SpirvType->getOpcode() == SPIRV::OpTypeForwardPointer)
return SpirvType->uses().begin()->getReg(); return SpirvType->uses().begin()->getReg();
return SpirvType->defs().begin()->getReg(); return SpirvType->defs().begin()->getReg();
} }
SPIRVType *SPIRVGlobalRegistry::createSPIRVType(const Type *Ty, SPIRVType *SPIRVGlobalRegistry::createSPIRVType(
MachineIRBuilder &MIRBuilder, const Type *Ty, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AccQual, SPIRV::AccessQualifier::AccessQualifier AccQual, bool EmitIR) {
bool EmitIR) {
assert(!isSpecialType(Ty)); assert(!isSpecialType(Ty));
auto &TypeToSPIRVTypeMap = DT.getTypes()->getAllUses(); auto &TypeToSPIRVTypeMap = DT.getTypes()->getAllUses();
auto t = TypeToSPIRVTypeMap.find(Ty); auto t = TypeToSPIRVTypeMap.find(Ty);
if (t != TypeToSPIRVTypeMap.end()) { if (t != TypeToSPIRVTypeMap.end()) {
auto tt = t->second.find(&MIRBuilder.getMF()); auto tt = t->second.find(&MIRBuilder.getMF());
if (tt != t->second.end()) if (tt != t->second.end())
return getSPIRVTypeForVReg(tt->second); return getSPIRVTypeForVReg(tt->second);
} }
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines if (auto PType = dyn_cast<PointerType>(Ty)) {
return getOpTypePointer(SC, SpvElementType, MIRBuilder, Reg); return getOpTypePointer(SC, SpvElementType, MIRBuilder, Reg);
} }
llvm_unreachable("Unable to convert LLVM type to SPIRVType"); llvm_unreachable("Unable to convert LLVM type to SPIRVType");
} }
SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType( SPIRVType *SPIRVGlobalRegistry::restOfCreateSPIRVType(
const Type *Ty, MachineIRBuilder &MIRBuilder, const Type *Ty, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AccessQual, bool EmitIR) { SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
if (TypesInProcessing.count(Ty) && !Ty->isPointerTy()) if (TypesInProcessing.count(Ty) && !Ty->isPointerTy())
return nullptr; return nullptr;
TypesInProcessing.insert(Ty); TypesInProcessing.insert(Ty);
SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual, EmitIR); SPIRVType *SpirvType = createSPIRVType(Ty, MIRBuilder, AccessQual, EmitIR);
TypesInProcessing.erase(Ty); TypesInProcessing.erase(Ty);
VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType; VRegToTypeMap[&MIRBuilder.getMF()][getSPIRVTypeID(SpirvType)] = SpirvType;
SPIRVToLLVMType[SpirvType] = Ty; SPIRVToLLVMType[SpirvType] = Ty;
Register Reg = DT.find(Ty, &MIRBuilder.getMF()); Register Reg = DT.find(Ty, &MIRBuilder.getMF());
Show All 13 Lines if (t != VRegToTypeMap.end()) {
if (tt != t->second.end()) if (tt != t->second.end())
return tt->second; return tt->second;
} }
return nullptr; return nullptr;
} }
SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVType( SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVType(
const Type *Ty, MachineIRBuilder &MIRBuilder, const Type *Ty, MachineIRBuilder &MIRBuilder,
SPIRV::AccessQualifier AccessQual, bool EmitIR) { SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
Register Reg = DT.find(Ty, &MIRBuilder.getMF()); Register Reg = DT.find(Ty, &MIRBuilder.getMF());
if (Reg.isValid()) if (Reg.isValid())
return getSPIRVTypeForVReg(Reg); return getSPIRVTypeForVReg(Reg);
TypesInProcessing.clear(); TypesInProcessing.clear();
SPIRVType *STy = restOfCreateSPIRVType(Ty, MIRBuilder, AccessQual, EmitIR); SPIRVType *STy = restOfCreateSPIRVType(Ty, MIRBuilder, AccessQual, EmitIR);
// Create normal pointer types for the corresponding OpTypeForwardPointers. // Create normal pointer types for the corresponding OpTypeForwardPointers.
for (auto &CU : ForwardPointerTypes) { for (auto &CU : ForwardPointerTypes) {
const Type *Ty2 = CU.first; const Type *Ty2 = CU.first;
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines if (Type->getOpcode() == SPIRV::OpTypeVector) {
auto EleTypeReg = Type->getOperand(1).getReg(); auto EleTypeReg = Type->getOperand(1).getReg();
Type = getSPIRVTypeForVReg(EleTypeReg); Type = getSPIRVTypeForVReg(EleTypeReg);
} }
if (Type->getOpcode() == SPIRV::OpTypeInt) if (Type->getOpcode() == SPIRV::OpTypeInt)
return Type->getOperand(2).getImm() != 0; return Type->getOperand(2).getImm() != 0;
llvm_unreachable("Attempting to get sign of non-integer type."); llvm_unreachable("Attempting to get sign of non-integer type.");
} }
SPIRV::StorageClass SPIRV::StorageClass::StorageClass
SPIRVGlobalRegistry::getPointerStorageClass(Register VReg) const { SPIRVGlobalRegistry::getPointerStorageClass(Register VReg) const {
SPIRVType *Type = getSPIRVTypeForVReg(VReg); SPIRVType *Type = getSPIRVTypeForVReg(VReg);
assert(Type && Type->getOpcode() == SPIRV::OpTypePointer && assert(Type && Type->getOpcode() == SPIRV::OpTypePointer &&
Type->getOperand(1).isImm() && "Pointer type is expected"); Type->getOperand(1).isImm() && "Pointer type is expected");
return static_cast<SPIRV::StorageClass>(Type->getOperand(1).getImm()); return static_cast<SPIRV::StorageClass::StorageClass>(
Type->getOperand(1).getImm());
} }
SPIRVType * SPIRVType *
SPIRVGlobalRegistry::getOrCreateSPIRVIntegerType(unsigned BitWidth, SPIRVGlobalRegistry::getOrCreateSPIRVIntegerType(unsigned BitWidth,
MachineIRBuilder &MIRBuilder) { MachineIRBuilder &MIRBuilder) {
return getOrCreateSPIRVType( return getOrCreateSPIRVType(
IntegerType::get(MIRBuilder.getMF().getFunction().getContext(), BitWidth), IntegerType::get(MIRBuilder.getMF().getFunction().getContext(), BitWidth),
MIRBuilder); MIRBuilder);
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 LinesSPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVVectorType(
MachineBasicBlock &BB = *I.getParent(); MachineBasicBlock &BB = *I.getParent();
auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeVector)) auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeVector))
.addDef(createTypeVReg(CurMF->getRegInfo())) .addDef(createTypeVReg(CurMF->getRegInfo()))
.addUse(getSPIRVTypeID(BaseType)) .addUse(getSPIRVTypeID(BaseType))
.addImm(NumElements); .addImm(NumElements);
return finishCreatingSPIRVType(LLVMTy, MIB); return finishCreatingSPIRVType(LLVMTy, MIB);
} }
SPIRVType * SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(
SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(SPIRVType *BaseType, SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
MachineIRBuilder &MIRBuilder, SPIRV::StorageClass::StorageClass SClass) {
SPIRV::StorageClass SClass) {
return getOrCreateSPIRVType( return getOrCreateSPIRVType(
PointerType::get(const_cast<Type *>(getTypeForSPIRVType(BaseType)), PointerType::get(const_cast<Type *>(getTypeForSPIRVType(BaseType)),
storageClassToAddressSpace(SClass)), storageClassToAddressSpace(SClass)),
MIRBuilder); MIRBuilder);
} }
SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVPointerType( SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(
SPIRVType *BaseType, MachineInstr &I, const SPIRVInstrInfo &TII, SPIRVType *BaseType, MachineInstr &I, const SPIRVInstrInfo &TII,
SPIRV::StorageClass SC) { SPIRV::StorageClass::StorageClass SC) {
Type *LLVMTy = Type *LLVMTy =
PointerType::get(const_cast<Type *>(getTypeForSPIRVType(BaseType)), PointerType::get(const_cast<Type *>(getTypeForSPIRVType(BaseType)),
storageClassToAddressSpace(SC)); storageClassToAddressSpace(SC));
Register Reg = DT.find(LLVMTy, CurMF); Register Reg = DT.find(LLVMTy, CurMF);
if (Reg.isValid()) if (Reg.isValid())
return getSPIRVTypeForVReg(Reg); return getSPIRVTypeForVReg(Reg);
MachineBasicBlock &BB = *I.getParent(); MachineBasicBlock &BB = *I.getParent();
auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypePointer)) auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypePointer))
Show All 31 Lines

llvm/lib/Target/SPIRV/SPIRVInstrInfo.td

//===-- SPIRVInstrInfo.td - Target Description for SPIR-V Target ----------===// //===-- SPIRVInstrInfo.td - Target Description for SPIR-V Target ----------===//
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// This file describes the SPIR-V instructions in TableGen format. // This file describes the SPIR-V instructions in TableGen format.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
include "SPIRVInstrFormats.td" include "SPIRVInstrFormats.td"
include "SPIRVEnums.td" include "SPIRVSymbolicOperands.td"
// Codegen only metadata instructions // Codegen only metadata instructions
let isCodeGenOnly=1 in { let isCodeGenOnly=1 in {
def ASSIGN_TYPE: Pseudo<(outs ANYID:$dst_id), (ins ANYID:$src_id, TYPE:$src_ty)>; def ASSIGN_TYPE: Pseudo<(outs ANYID:$dst_id), (ins ANYID:$src_id, TYPE:$src_ty)>;
def DECL_TYPE: Pseudo<(outs ANYID:$dst_id), (ins ANYID:$src_id, TYPE:$src_ty)>; def DECL_TYPE: Pseudo<(outs ANYID:$dst_id), (ins ANYID:$src_id, TYPE:$src_ty)>;
def GET_ID: Pseudo<(outs ID:$dst_id), (ins ANYID:$src)>; def GET_ID: Pseudo<(outs ID:$dst_id), (ins ANYID:$src)>;
def GET_fID: Pseudo<(outs fID:$dst_id), (ins ANYID:$src)>; def GET_fID: Pseudo<(outs fID:$dst_id), (ins ANYID:$src)>;
def GET_pID: Pseudo<(outs pID:$dst_id), (ins ANYID:$src)>; def GET_pID: Pseudo<(outs pID:$dst_id), (ins ANYID:$src)>;
▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Linesdef OpMemberDecorateString: Op<5633, (outs),
(ins TYPE:$ty, i32imm:$mem, Decoration:$dec, StringImm:$str, variable_ops), (ins TYPE:$ty, i32imm:$mem, Decoration:$dec, StringImm:$str, variable_ops),
"OpMemberDecorateString $ty $mem $dec $str">; "OpMemberDecorateString $ty $mem $dec $str">;
// 3.42.4 Extension Instructions // 3.42.4 Extension Instructions
def OpExtension: Op<10, (outs), (ins StringImm:$name, variable_ops), "OpExtension $name">; def OpExtension: Op<10, (outs), (ins StringImm:$name, variable_ops), "OpExtension $name">;
def OpExtInstImport: Op<11, (outs ID:$res), (ins StringImm:$extInstsName, variable_ops), def OpExtInstImport: Op<11, (outs ID:$res), (ins StringImm:$extInstsName, variable_ops),
"$res = OpExtInstImport $extInstsName">; "$res = OpExtInstImport $extInstsName">;
def OpExtInst: Op<12, (outs ID:$res), (ins TYPE:$ty, ID:$set, ExtInst:$inst, variable_ops), def OpExtInst: Op<12, (outs ID:$res), (ins TYPE:$ty, ID:$set, Extension:$inst, variable_ops),
"$res = OpExtInst $ty $set $inst">; "$res = OpExtInst $ty $set $inst">;
// 3.42.5 Mode-Setting Instructions // 3.42.5 Mode-Setting Instructions
def OpMemoryModel: Op<14, (outs), (ins AddressingModel:$addr, MemoryModel:$mem), def OpMemoryModel: Op<14, (outs), (ins AddressingModel:$addr, MemoryModel:$mem),
"OpMemoryModel $addr $mem">; "OpMemoryModel $addr $mem">;
def OpEntryPoint: Op<15, (outs), def OpEntryPoint: Op<15, (outs),
(ins ExecutionModel:$model, ID:$entry, StringImm:$name, variable_ops), (ins ExecutionModel:$model, ID:$entry, StringImm:$name, variable_ops),
▲ Show 20 Lines • Show All 610 Lines • Show Last 20 Lines

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Show First 20 Lines • Show All 407 Lines • ▼ Show 20 Lines
bool SPIRVInstructionSelector::selectUnOp(Register ResVReg, bool SPIRVInstructionSelector::selectUnOp(Register ResVReg,
const SPIRVType *ResType, const SPIRVType *ResType,
MachineInstr &I, MachineInstr &I,
unsigned Opcode) const { unsigned Opcode) const {
return selectUnOpWithSrc(ResVReg, ResType, I, I.getOperand(1).getReg(), return selectUnOpWithSrc(ResVReg, ResType, I, I.getOperand(1).getReg(),
Opcode); Opcode);
} }
static SPIRV::Scope getScope(SyncScope::ID Ord) { static SPIRV::Scope::Scope getScope(SyncScope::ID Ord) {
switch (Ord) { switch (Ord) {
case SyncScope::SingleThread: case SyncScope::SingleThread:
return SPIRV::Scope::Invocation; return SPIRV::Scope::Invocation;
case SyncScope::System: case SyncScope::System:
return SPIRV::Scope::Device; return SPIRV::Scope::Device;
default: default:
llvm_unreachable("Unsupported synchronization Scope ID."); llvm_unreachable("Unsupported synchronization Scope ID.");
} }
▲ Show 20 Lines • Show All 186 Lines • ▼ Show 20 Lines Result |= BuildMI(*I.getParent(), I, DL, TII.get(SPIRV::OpCompositeInsert))
.addUse(GR.getSPIRVTypeID(ResType)) .addUse(GR.getSPIRVTypeID(ResType))
.addUse(CmpSuccReg) .addUse(CmpSuccReg)
.addUse(TmpReg) .addUse(TmpReg)
.addImm(1) .addImm(1)
.constrainAllUses(TII, TRI, RBI); .constrainAllUses(TII, TRI, RBI);
return Result; return Result;
} }
static bool isGenericCastablePtr(SPIRV::StorageClass SC) { static bool isGenericCastablePtr(SPIRV::StorageClass::StorageClass SC) {
switch (SC) { switch (SC) {
case SPIRV::StorageClass::Workgroup: case SPIRV::StorageClass::Workgroup:
case SPIRV::StorageClass::CrossWorkgroup: case SPIRV::StorageClass::CrossWorkgroup:
case SPIRV::StorageClass::Function: case SPIRV::StorageClass::Function:
return true; return true;
default: default:
return false; return false;
} }
Show All 25 Lines bool Result =
.addUse(GR.getSPIRVTypeID(ResType)) .addUse(GR.getSPIRVTypeID(ResType))
.addImm(static_cast<uint32_t>(SPIRV::Opcode::PtrCastToGeneric)) .addImm(static_cast<uint32_t>(SPIRV::Opcode::PtrCastToGeneric))
.addUse(NewReg) .addUse(NewReg)
.constrainAllUses(TII, TRI, RBI); .constrainAllUses(TII, TRI, RBI);
return Result; return Result;
} }
Register SrcPtr = I.getOperand(1).getReg(); Register SrcPtr = I.getOperand(1).getReg();
SPIRVType *SrcPtrTy = GR.getSPIRVTypeForVReg(SrcPtr); SPIRVType *SrcPtrTy = GR.getSPIRVTypeForVReg(SrcPtr);
SPIRV::StorageClass SrcSC = GR.getPointerStorageClass(SrcPtr); SPIRV::StorageClass::StorageClass SrcSC = GR.getPointerStorageClass(SrcPtr);
SPIRV::StorageClass DstSC = GR.getPointerStorageClass(ResVReg); SPIRV::StorageClass::StorageClass DstSC = GR.getPointerStorageClass(ResVReg);
// Casting from an eligable pointer to Generic. // Casting from an eligable pointer to Generic.
if (DstSC == SPIRV::StorageClass::Generic && isGenericCastablePtr(SrcSC)) if (DstSC == SPIRV::StorageClass::Generic && isGenericCastablePtr(SrcSC))
return selectUnOp(ResVReg, ResType, I, SPIRV::OpPtrCastToGeneric); return selectUnOp(ResVReg, ResType, I, SPIRV::OpPtrCastToGeneric);
// Casting from Generic to an eligable pointer. // Casting from Generic to an eligable pointer.
if (SrcSC == SPIRV::StorageClass::Generic && isGenericCastablePtr(DstSC)) if (SrcSC == SPIRV::StorageClass::Generic && isGenericCastablePtr(DstSC))
return selectUnOp(ResVReg, ResType, I, SPIRV::OpGenericCastToPtr); return selectUnOp(ResVReg, ResType, I, SPIRV::OpGenericCastToPtr);
// Casting between 2 eligable pointers using Generic as an intermediary. // Casting between 2 eligable pointers using Generic as an intermediary.
▲ Show 20 Lines • Show All 666 Lines • ▼ Show 20 Linesbool SPIRVInstructionSelector::selectGlobalValue(
bool HasInit = GlobalVar->hasInitializer() && bool HasInit = GlobalVar->hasInitializer() &&
!isa<UndefValue>(GlobalVar->getInitializer()); !isa<UndefValue>(GlobalVar->getInitializer());
// Skip empty declaration for GVs with initilaizers till we get the decl with // Skip empty declaration for GVs with initilaizers till we get the decl with
// passed initializer. // passed initializer.
if (HasInit && !Init) if (HasInit && !Init)
return true; return true;
unsigned AddrSpace = GV->getAddressSpace(); unsigned AddrSpace = GV->getAddressSpace();
SPIRV::StorageClass Storage = addressSpaceToStorageClass(AddrSpace); SPIRV::StorageClass::StorageClass Storage =
addressSpaceToStorageClass(AddrSpace);
bool HasLnkTy = GV->getLinkage() != GlobalValue::InternalLinkage && bool HasLnkTy = GV->getLinkage() != GlobalValue::InternalLinkage &&
Storage != SPIRV::StorageClass::Function; Storage != SPIRV::StorageClass::Function;
SPIRV::LinkageType LnkType = SPIRV::LinkageType::LinkageType LnkType =
(GV->isDeclaration() || GV->hasAvailableExternallyLinkage()) (GV->isDeclaration() || GV->hasAvailableExternallyLinkage())
? SPIRV::LinkageType::Import ? SPIRV::LinkageType::Import
: SPIRV::LinkageType::Export; : SPIRV::LinkageType::Export;
Register Reg = GR.buildGlobalVariable(ResVReg, ResType, GlobalIdent, GV, Register Reg = GR.buildGlobalVariable(ResVReg, ResType, GlobalIdent, GV,
Storage, Init, GlobalVar->isConstant(), Storage, Init, GlobalVar->isConstant(),
HasLnkTy, LnkType, MIRBuilder, true); HasLnkTy, LnkType, MIRBuilder, true);
return Reg.isValid(); return Reg.isValid();
Show All 10 Lines

llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h

Show First 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
// Maps a local register to the corresponding global alias. // Maps a local register to the corresponding global alias.
using LocalToGlobalRegTable = std::map<Register, Register>; using LocalToGlobalRegTable = std::map<Register, Register>;
using RegisterAliasMapTy = using RegisterAliasMapTy =
std::map<const MachineFunction *, LocalToGlobalRegTable>; std::map<const MachineFunction *, LocalToGlobalRegTable>;
// The struct contains results of the module analysis and methods // The struct contains results of the module analysis and methods
// to access them. // to access them.
struct ModuleAnalysisInfo { struct ModuleAnalysisInfo {
SPIRV::MemoryModel Mem; SPIRV::MemoryModel::MemoryModel Mem;
SPIRV::AddressingModel Addr; SPIRV::AddressingModel::AddressingModel Addr;
SPIRV::SourceLanguage SrcLang; SPIRV::SourceLanguage::SourceLanguage SrcLang;
unsigned SrcLangVersion; unsigned SrcLangVersion;
StringSet<> SrcExt; StringSet<> SrcExt;
// Maps ExtInstSet to corresponding ID register. // Maps ExtInstSet to corresponding ID register.
DenseMap<unsigned, Register> ExtInstSetMap; DenseMap<unsigned, Register> ExtInstSetMap;
// Contains the list of all global OpVariables in the module. // Contains the list of all global OpVariables in the module.
SmallVector<MachineInstr *, 4> GlobalVarList; SmallVector<MachineInstr *, 4> GlobalVarList;
// Maps function names to coresponding function ID registers. // Maps function names to coresponding function ID registers.
StringMap<Register> FuncNameMap; StringMap<Register> FuncNameMap;
▲ Show 20 Lines • Show All 88 Lines • Show Last 20 Lines

llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

Show First 20 Lines • Show All 59 Lines • ▼ Show 20 Linesvoid SPIRVModuleAnalysis::setBaseInfo(const Module &M) {
MAI.InstrsToDelete.clear(); MAI.InstrsToDelete.clear();
MAI.FuncNameMap.clear(); MAI.FuncNameMap.clear();
MAI.GlobalVarList.clear(); MAI.GlobalVarList.clear();
MAI.ExtInstSetMap.clear(); MAI.ExtInstSetMap.clear();
// TODO: determine memory model and source language from the configuratoin. // TODO: determine memory model and source language from the configuratoin.
if (auto MemModel = M.getNamedMetadata("spirv.MemoryModel")) { if (auto MemModel = M.getNamedMetadata("spirv.MemoryModel")) {
auto MemMD = MemModel->getOperand(0); auto MemMD = MemModel->getOperand(0);
MAI.Addr = static_cast<SPIRV::AddressingModel>(getMetadataUInt(MemMD, 0)); MAI.Addr = static_cast<SPIRV::AddressingModel::AddressingModel>(
MAI.Mem = static_cast<SPIRV::MemoryModel>(getMetadataUInt(MemMD, 1)); getMetadataUInt(MemMD, 0));
MAI.Mem =
static_cast<SPIRV::MemoryModel::MemoryModel>(getMetadataUInt(MemMD, 1));
} else { } else {
MAI.Mem = SPIRV::MemoryModel::OpenCL; MAI.Mem = SPIRV::MemoryModel::OpenCL;
unsigned PtrSize = ST->getPointerSize(); unsigned PtrSize = ST->getPointerSize();
MAI.Addr = PtrSize == 32 ? SPIRV::AddressingModel::Physical32 MAI.Addr = PtrSize == 32 ? SPIRV::AddressingModel::Physical32
: PtrSize == 64 ? SPIRV::AddressingModel::Physical64 : PtrSize == 64 ? SPIRV::AddressingModel::Physical64
: SPIRV::AddressingModel::Logical; : SPIRV::AddressingModel::Logical;
} }
// Get the OpenCL version number from metadata. // Get the OpenCL version number from metadata.
▲ Show 20 Lines • Show All 310 Lines • Show Last 20 Lines

llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td

  • This file was added.
//===- SPIRVSymbolicOperands.td ----------------------------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines symbolic/named operands for various SPIR-V instructions.
//
//===----------------------------------------------------------------------===//
include "llvm/TableGen/SearchableTable.td"
//===----------------------------------------------------------------------===//
// Lookup table containing symbolic operands with the following columns:
// - Category (Extension/Capability/BuiltIn/etc.)
// - Value (32-bit representation for binary emission)
// - Mnemonic (String representation for textual emission)
// - MinVersion
// - MaxVersion
//===----------------------------------------------------------------------===//
// Forward-declare classes used in SymbolicOperand
class OperandCategory;
class SymbolicOperand<OperandCategory category, bits<32> value, string mnemonic, bits<32> minVersion, bits<32> maxVersion> {
OperandCategory Category = category;
bits<32> Value = value;
string Mnemonic = mnemonic;
bits<32> MinVersion = minVersion;
bits<32> MaxVersion = maxVersion;
}
def SymbolicOperands : GenericTable {
let FilterClass = "SymbolicOperand";
let Fields = ["Category", "Value", "Mnemonic", "MinVersion", "MaxVersion"];
string TypeOf_Category = "OperandCategory";
let PrimaryKey = ["Category", "Value"];
// Function for looking up symbolic operands based on category and value.
let PrimaryKeyName = "lookupSymbolicOperandByCategoryAndValue";
}
// Function for looking up symbolic operands based on just category.
def lookupSymbolicOperandByCategory : SearchIndex {
let Table = SymbolicOperands;
let Key = ["Category"];
}
// Function for looking up symbolic operands based on category and mnemonic.
def lookupSymbolicOperandByCategoryAndMnemonic : SearchIndex {
let Table = SymbolicOperands;
let Key = ["Category", "Mnemonic"];
}
//===----------------------------------------------------------------------===//
// Lookup table for matching symbolic operands (category + 32-bit value) to
// a SPIR-V extension.
//===----------------------------------------------------------------------===//
// Forward-declare classes used in ExtensionEntry
class Extension;
class ExtensionEntry<OperandCategory category, bits<32> value, Extension reqExtension> {
OperandCategory Category = category;
bits<32> Value = value;
Extension ReqExtension = reqExtension;
}
def ExtensionEntries : GenericTable {
let FilterClass = "ExtensionEntry";
let Fields = ["Category", "Value", "ReqExtension"];
string TypeOf_Category = "OperandCategory";
string TypeOf_ReqExtension = "Extension";
let PrimaryKey = ["Category", "Value"];
// Function for looking up the extension by category + value.
let PrimaryKeyName = "lookupExtensionByCategoryAndValue";
}
//===----------------------------------------------------------------------===//
// Lookup table for matching symbolic operands (category + 32-bit value) to
// SPIR-V capabilities. If an operand requires more than one capability, there
// will be multiple consecutive entries present in the table.
//===----------------------------------------------------------------------===//
// Forward-declare classes used in ExtensionEntry
class Capability;
class CapabilityEntry<OperandCategory category, bits<32> value, Capability reqCabaility> {
OperandCategory Category = category;
bits<32> Value = value;
Capability ReqCapability = reqCabaility;
}
def CapabilityEntries : GenericTable {
let FilterClass = "CapabilityEntry";
let Fields = ["Category", "Value", "ReqCapability"];
string TypeOf_Category = "OperandCategory";
string TypeOf_ReqCapability = "Capability";
let PrimaryKey = ["Category", "Value"];
// Function for looking up a (the first) capability by category + value. Next
// capabilities should be consecutive.
let PrimaryKeyName = "lookupCapabilityByCategoryAndValue";
}
//===----------------------------------------------------------------------===//
// Multiclass used to define a SymbolicOperand and at the same time declare
// required extension and capabilities.
//===----------------------------------------------------------------------===//
multiclass SymbolicOperandWithRequirements<OperandCategory category, bits<32> value, string mnemonic, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
assert !ge(!size(mnemonic), 1), "No mnemonic/string representation provided for symbolic operand with value " # value;
def : SymbolicOperand<category, value, mnemonic, minVersion, maxVersion>;
assert !le(!size(reqExtensions), 1), "Too many required extensions for a symbolic/named operand: " # mnemonic;
if !eq(!size(reqExtensions), 1) then {
def : ExtensionEntry<category, value, reqExtensions[0]>;
}
foreach capability = reqCapabilities in {
def : CapabilityEntry<category, value, capability>;
}
}
//===----------------------------------------------------------------------===//
// Enum defining different categories of symbolic/named operands.
//===----------------------------------------------------------------------===//
def OperandCategory : GenericEnum {
let FilterClass = "OperandCategory";
}
class OperandCategory;
def ExtensionOperand : OperandCategory;
def CapabilityOperand : OperandCategory;
def SourceLanguageOperand : OperandCategory;
def AddressingModelOperand : OperandCategory;
def ExecutionModelOperand : OperandCategory;
def MemoryModelOperand : OperandCategory;
def ExecutionModeOperand : OperandCategory;
def StorageClassOperand : OperandCategory;
def DimOperand : OperandCategory;
def SamplerAddressingModeOperand : OperandCategory;
def SamplerFilterModeOperand : OperandCategory;
def ImageFormatOperand : OperandCategory;
def ImageChannelOrderOperand : OperandCategory;
def ImageChannelDataTypeOperand : OperandCategory;
def ImageOperandOperand : OperandCategory;
def FPFastMathModeOperand : OperandCategory;
def FPRoundingModeOperand : OperandCategory;
def LinkageTypeOperand : OperandCategory;
def AccessQualifierOperand : OperandCategory;
def FunctionParameterAttributeOperand : OperandCategory;
def DecorationOperand : OperandCategory;
def BuiltInOperand : OperandCategory;
def SelectionControlOperand : OperandCategory;
def LoopControlOperand : OperandCategory;
def FunctionControlOperand : OperandCategory;
def MemorySemanticsOperand : OperandCategory;
def MemoryOperandOperand : OperandCategory;
def ScopeOperand : OperandCategory;
def GroupOperationOperand : OperandCategory;
def KernelEnqueueFlagsOperand : OperandCategory;
def KernelProfilingInfoOperand : OperandCategory;
def OpcodeOperand : OperandCategory;
//===----------------------------------------------------------------------===//
// Multiclass used to define Extesions enum values and at the same time
// SymbolicOperand entries.
//===----------------------------------------------------------------------===//
def Extension : GenericEnum, Operand<i32> {
let FilterClass = "Extension";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = "printExtension";
}
class Extension<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ExtensionOperand<bits<32> value> {
def NAME : Extension<NAME, value>;
defm : SymbolicOperandWithRequirements<ExtensionOperand, value, NAME, 0, 0, [], []>;
}
defm SPV_AMD_shader_explicit_vertex_parameter : ExtensionOperand<1>;
defm SPV_AMD_shader_trinary_minmax_extension : ExtensionOperand<2>;
defm SPV_AMD_gcn_shader : ExtensionOperand<3>;
defm SPV_KHR_shader_ballot : ExtensionOperand<4>;
defm SPV_AMD_shader_ballot : ExtensionOperand<5>;
defm SPV_AMD_gpu_shader_half_float : ExtensionOperand<6>;
defm SPV_KHR_shader_draw_parameters : ExtensionOperand<7>;
defm SPV_KHR_subgroup_vote : ExtensionOperand<8>;
defm SPV_KHR_16bit_storeage : ExtensionOperand<9>;
defm SPV_KHR_device_group : ExtensionOperand<10>;
defm SPV_KHR_multiview : ExtensionOperand<11>;
defm SPV_NVX_multiview_per_view_attributes : ExtensionOperand<12>;
defm SPV_NV_viewport_array2 : ExtensionOperand<13>;
defm SPV_NV_stereo_view_rendering : ExtensionOperand<14>;
defm SPV_NV_sample_mask_override_coverage : ExtensionOperand<15>;
defm SPV_NV_geometry_shader_passthrough : ExtensionOperand<16>;
defm SPV_AMD_texture_gather_bias_lod : ExtensionOperand<17>;
defm SPV_KHR_storage_buffer_storage_class : ExtensionOperand<18>;
defm SPV_KHR_variable_pointers : ExtensionOperand<19>;
defm SPV_AMD_gpu_shader_int16 : ExtensionOperand<20>;
defm SPV_KHR_post_depth_coverage : ExtensionOperand<21>;
defm SPV_KHR_shader_atomic_counter_ops : ExtensionOperand<22>;
defm SPV_EXT_shader_stencil_export : ExtensionOperand<23>;
defm SPV_EXT_shader_viewport_index_layer : ExtensionOperand<24>;
defm SPV_AMD_shader_image_load_store_lod : ExtensionOperand<25>;
defm SPV_AMD_shader_fragment_mask : ExtensionOperand<26>;
defm SPV_EXT_fragment_fully_covered : ExtensionOperand<27>;
defm SPV_AMD_gpu_shader_half_float_fetch : ExtensionOperand<28>;
defm SPV_GOOGLE_decorate_string : ExtensionOperand<29>;
defm SPV_GOOGLE_hlsl_functionality1 : ExtensionOperand<30>;
defm SPV_NV_shader_subgroup_partitioned : ExtensionOperand<31>;
defm SPV_EXT_descriptor_indexing : ExtensionOperand<32>;
defm SPV_KHR_8bit_storage : ExtensionOperand<33>;
defm SPV_KHR_vulkan_memory_model : ExtensionOperand<34>;
defm SPV_NV_ray_tracing : ExtensionOperand<35>;
defm SPV_NV_compute_shader_derivatives : ExtensionOperand<36>;
defm SPV_NV_fragment_shader_barycentric : ExtensionOperand<37>;
defm SPV_NV_mesh_shader : ExtensionOperand<38>;
defm SPV_NV_shader_image_footprint : ExtensionOperand<39>;
defm SPV_NV_shading_rate : ExtensionOperand<40>;
defm SPV_INTEL_subgroups : ExtensionOperand<41>;
defm SPV_INTEL_media_block_io : ExtensionOperand<42>;
defm SPV_EXT_fragment_invocation_density : ExtensionOperand<44>;
defm SPV_KHR_no_integer_wrap_decoration : ExtensionOperand<45>;
defm SPV_KHR_float_controls : ExtensionOperand<46>;
defm SPV_EXT_physical_storage_buffer : ExtensionOperand<47>;
defm SPV_INTEL_fpga_memory_attributes : ExtensionOperand<48>;
defm SPV_NV_cooperative_matrix : ExtensionOperand<49>;
defm SPV_INTEL_shader_integer_functions2 : ExtensionOperand<50>;
defm SPV_INTEL_fpga_loop_controls : ExtensionOperand<51>;
defm SPV_EXT_fragment_shader_interlock : ExtensionOperand<52>;
defm SPV_NV_shader_sm_builtins : ExtensionOperand<53>;
defm SPV_KHR_shader_clock : ExtensionOperand<54>;
defm SPV_INTEL_unstructured_loop_controls : ExtensionOperand<55>;
defm SPV_EXT_demote_to_helper_invocation : ExtensionOperand<56>;
defm SPV_INTEL_fpga_reg : ExtensionOperand<57>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Capabilities enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions, and
// capabilities.
//===----------------------------------------------------------------------===//
def Capability : GenericEnum, Operand<i32> {
let FilterClass = "Capability";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class Capability<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass CapabilityOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def NAME : Capability<NAME, value>;
defm : SymbolicOperandWithRequirements<CapabilityOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm Matrix : CapabilityOperand<0, 0, 0, [], []>;
defm Shader : CapabilityOperand<1, 0, 0, [], [Matrix]>;
defm Geometry : CapabilityOperand<2, 0, 0, [], [Shader]>;
defm Tessellation : CapabilityOperand<3, 0, 0, [], [Shader]>;
defm Addresses : CapabilityOperand<4, 0, 0, [], []>;
defm Linkage : CapabilityOperand<5, 0, 0, [], []>;
defm Kernel : CapabilityOperand<6, 0, 0, [], []>;
defm Vector16 : CapabilityOperand<7, 0, 0, [], [Kernel]>;
defm Float16Buffer : CapabilityOperand<8, 0, 0, [], [Kernel]>;
defm Float16 : CapabilityOperand<9, 0, 0, [], []>;
defm Float64 : CapabilityOperand<10, 0, 0, [], []>;
defm Int64 : CapabilityOperand<11, 0, 0, [], []>;
defm Int64Atomics : CapabilityOperand<12, 0, 0, [], [Int64]>;
defm ImageBasic : CapabilityOperand<13, 0, 0, [], [Kernel]>;
defm ImageReadWrite : CapabilityOperand<14, 0, 0, [], [ImageBasic]>;
defm ImageMipmap : CapabilityOperand<15, 0, 0, [], [ImageBasic]>;
defm Pipes : CapabilityOperand<17, 0, 0, [], [Kernel]>;
defm Groups : CapabilityOperand<18, 0, 0, [], []>;
defm DeviceEnqueue : CapabilityOperand<19, 0, 0, [], []>;
defm LiteralSampler : CapabilityOperand<20, 0, 0, [], [Kernel]>;
defm AtomicStorage : CapabilityOperand<21, 0, 0, [], [Shader]>;
defm Int16 : CapabilityOperand<22, 0, 0, [], []>;
defm TessellationPointSize : CapabilityOperand<23, 0, 0, [], [Tessellation]>;
defm GeometryPointSize : CapabilityOperand<24, 0, 0, [], [Geometry]>;
defm ImageGatherExtended : CapabilityOperand<25, 0, 0, [], [Shader]>;
defm StorageImageMultisample : CapabilityOperand<27, 0, 0, [], [Shader]>;
defm UniformBufferArrayDynamicIndexing : CapabilityOperand<28, 0, 0, [], [Shader]>;
defm SampledImageArrayDymnamicIndexing : CapabilityOperand<29, 0, 0, [], [Shader]>;
defm ClipDistance : CapabilityOperand<32, 0, 0, [], [Shader]>;
defm CullDistance : CapabilityOperand<33, 0, 0, [], [Shader]>;
defm SampleRateShading : CapabilityOperand<35, 0, 0, [], [Shader]>;
defm SampledRect : CapabilityOperand<37, 0, 0, [], [Shader]>;
defm ImageRect : CapabilityOperand<36, 0, 0, [], [SampledRect]>;
defm GenericPointer : CapabilityOperand<38, 0, 0, [], [Addresses]>;
defm Int8 : CapabilityOperand<39, 0, 0, [], []>;
defm InputAttachment : CapabilityOperand<40, 0, 0, [], [Shader]>;
defm SparseResidency : CapabilityOperand<41, 0, 0, [], [Shader]>;
defm MinLod : CapabilityOperand<42, 0, 0, [], [Shader]>;
defm Sampled1D : CapabilityOperand<43, 0, 0, [], []>;
defm Image1D : CapabilityOperand<44, 0, 0, [], [Sampled1D]>;
defm SampledCubeArray : CapabilityOperand<45, 0, 0, [], [Shader]>;
defm ImageCubeArray : CapabilityOperand<34, 0, 0, [], [SampledCubeArray]>;
defm SampledBuffer : CapabilityOperand<46, 0, 0, [], []>;
defm ImageBuffer : CapabilityOperand<47, 0, 0, [], [SampledBuffer]>;
defm ImageMSArray : CapabilityOperand<48, 0, 0, [], [Shader]>;
defm StorageImageExtendedFormats : CapabilityOperand<49, 0, 0, [], [Shader]>;
defm ImageQuery : CapabilityOperand<50, 0, 0, [], [Shader]>;
defm DerivativeControl : CapabilityOperand<51, 0, 0, [], [Shader]>;
defm InterpolationFunction : CapabilityOperand<52, 0, 0, [], [Shader]>;
defm TransformFeedback : CapabilityOperand<53, 0, 0, [], [Shader]>;
defm GeometryStreams : CapabilityOperand<54, 0, 0, [], [Geometry]>;
defm StorageImageReadWithoutFormat : CapabilityOperand<55, 0, 0, [], [Shader]>;
defm StorageImageWriteWithoutFormat : CapabilityOperand<56, 0, 0, [], [Shader]>;
defm MultiViewport : CapabilityOperand<57, 0, 0, [], [Geometry]>;
defm SubgroupDispatch : CapabilityOperand<58, 0x10100, 0, [], [DeviceEnqueue]>;
defm NamedBarrier : CapabilityOperand<59, 0x10100, 0, [], [Kernel]>;
defm PipeStorage : CapabilityOperand<60, 0x10100, 0, [], [Pipes]>;
defm GroupNonUniform : CapabilityOperand<61, 0x10300, 0, [], []>;
defm GroupNonUniformVote : CapabilityOperand<62, 0x10300, 0, [], [GroupNonUniform]>;
defm GroupNonUniformArithmetic : CapabilityOperand<63, 0x10300, 0, [], [GroupNonUniform]>;
defm GroupNonUniformBallot : CapabilityOperand<64, 0x10300, 0, [], [GroupNonUniform]>;
defm GroupNonUniformShuffle : CapabilityOperand<65, 0x10300, 0, [], [GroupNonUniform]>;
defm GroupNonUniformShuffleRelative : CapabilityOperand<66, 0x10300, 0, [], [GroupNonUniform]>;
defm GroupNonUniformClustered : CapabilityOperand<67, 0x10300, 0, [], [GroupNonUniform]>;
defm GroupNonUniformQuad : CapabilityOperand<68, 0x10300, 0, [], [GroupNonUniform]>;
defm SubgroupBallotKHR : CapabilityOperand<4423, 0, 0, [SPV_KHR_shader_ballot], []>;
defm DrawParameters : CapabilityOperand<4427, 0x10300, 0, [SPV_KHR_shader_draw_parameters], [Shader]>;
defm SubgroupVoteKHR : CapabilityOperand<4431, 0, 0, [SPV_KHR_subgroup_vote], []>;
defm StorageBuffer16BitAccess : CapabilityOperand<4433, 0x10300, 0, [SPV_KHR_16bit_storeage], []>;
defm StorageUniform16 : CapabilityOperand<4434, 0x10300, 0, [SPV_KHR_16bit_storeage], [StorageBuffer16BitAccess]>;
defm StoragePushConstant16 : CapabilityOperand<4435, 0x10300, 0, [SPV_KHR_16bit_storeage], []>;
defm StorageInputOutput16 : CapabilityOperand<4436, 0x10300, 0, [SPV_KHR_16bit_storeage], []>;
defm DeviceGroup : CapabilityOperand<4437, 0x10300, 0, [SPV_KHR_device_group], []>;
defm MultiView : CapabilityOperand<4439, 0x10300, 0, [SPV_KHR_multiview], [Shader]>;
defm VariablePointersStorageBuffer : CapabilityOperand<4441, 0x10300, 0, [SPV_KHR_variable_pointers], [Shader]>;
defm VariablePointers : CapabilityOperand<4442, 0x10300, 0, [SPV_KHR_variable_pointers], [VariablePointersStorageBuffer]>;
defm AtomicStorageOps : CapabilityOperand<4445, 0, 0, [SPV_KHR_shader_atomic_counter_ops], []>;
defm SampleMaskPostDepthCoverage : CapabilityOperand<4447, 0, 0, [SPV_KHR_post_depth_coverage], []>;
defm StorageBuffer8BitAccess : CapabilityOperand<4448, 0, 0, [SPV_KHR_8bit_storage], []>;
defm UniformAndStorageBuffer8BitAccess : CapabilityOperand<4449, 0, 0, [SPV_KHR_8bit_storage], [StorageBuffer8BitAccess]>;
defm StoragePushConstant8 : CapabilityOperand<4450, 0, 0, [SPV_KHR_8bit_storage], []>;
defm DenormPreserve : CapabilityOperand<4464, 0x10400, 0, [SPV_KHR_float_controls], []>;
defm DenormFlushToZero : CapabilityOperand<4465, 0x10400, 0, [SPV_KHR_float_controls], []>;
defm SignedZeroInfNanPreserve : CapabilityOperand<4466, 0x10400, 0, [SPV_KHR_float_controls], []>;
defm RoundingModeRTE : CapabilityOperand<4467, 0x10400, 0, [SPV_KHR_float_controls], []>;
defm RoundingModeRTZ : CapabilityOperand<4468, 0x10400, 0, [SPV_KHR_float_controls], []>;
defm Float16ImageAMD : CapabilityOperand<5008, 0, 0, [], [Shader]>;
defm ImageGatherBiasLodAMD : CapabilityOperand<5009, 0, 0, [], [Shader]>;
defm FragmentMaskAMD : CapabilityOperand<5010, 0, 0, [], [Shader]>;
defm StencilExportEXT : CapabilityOperand<5013, 0, 0, [], [Shader]>;
defm ImageReadWriteLodAMD : CapabilityOperand<5015, 0, 0, [], [Shader]>;
defm SampleMaskOverrideCoverageNV : CapabilityOperand<5249, 0, 0, [], [SampleRateShading]>;
defm GeometryShaderPassthroughNV : CapabilityOperand<5251, 0, 0, [], [Geometry]>;
defm ShaderViewportIndexLayerEXT : CapabilityOperand<5254, 0, 0, [], [MultiViewport]>;
defm ShaderViewportMaskNV : CapabilityOperand<5255, 0, 0, [], [ShaderViewportIndexLayerEXT]>;
defm ShaderStereoViewNV : CapabilityOperand<5259, 0, 0, [], [ShaderViewportMaskNV]>;
defm PerViewAttributesNV : CapabilityOperand<5260, 0, 0, [], [MultiView]>;
defm FragmentFullyCoveredEXT : CapabilityOperand<5265, 0, 0, [], [Shader]>;
defm MeshShadingNV : CapabilityOperand<5266, 0, 0, [], [Shader]>;
defm ShaderNonUniformEXT : CapabilityOperand<5301, 0, 0, [], [Shader]>;
defm RuntimeDescriptorArrayEXT : CapabilityOperand<5302, 0, 0, [], [Shader]>;
defm InputAttachmentArrayDynamicIndexingEXT : CapabilityOperand<5303, 0, 0, [], [InputAttachment]>;
defm UniformTexelBufferArrayDynamicIndexingEXT : CapabilityOperand<5304, 0, 0, [], [SampledBuffer]>;
defm StorageTexelBufferArrayDynamicIndexingEXT : CapabilityOperand<5305, 0, 0, [], [ImageBuffer]>;
defm UniformBufferArrayNonUniformIndexingEXT : CapabilityOperand<5306, 0, 0, [], [ShaderNonUniformEXT]>;
defm SampledImageArrayNonUniformIndexingEXT : CapabilityOperand<5307, 0, 0, [], [ShaderNonUniformEXT]>;
defm StorageBufferArrayNonUniformIndexingEXT : CapabilityOperand<5308, 0, 0, [], [ShaderNonUniformEXT]>;
defm StorageImageArrayNonUniformIndexingEXT : CapabilityOperand<5309, 0, 0, [], [ShaderNonUniformEXT]>;
defm InputAttachmentArrayNonUniformIndexingEXT : CapabilityOperand<5310, 0, 0, [], [InputAttachment, ShaderNonUniformEXT]>;
defm UniformTexelBufferArrayNonUniformIndexingEXT : CapabilityOperand<5311, 0, 0, [], [SampledBuffer, ShaderNonUniformEXT]>;
defm StorageTexelBufferArrayNonUniformIndexingEXT : CapabilityOperand<5312, 0, 0, [], [ImageBuffer, ShaderNonUniformEXT]>;
defm RayTracingNV : CapabilityOperand<5340, 0, 0, [], [Shader]>;
defm SubgroupShuffleINTEL : CapabilityOperand<5568, 0, 0, [], []>;
defm SubgroupBufferBlockIOINTEL : CapabilityOperand<5569, 0, 0, [], []>;
defm SubgroupImageBlockIOINTEL : CapabilityOperand<5570, 0, 0, [], []>;
defm SubgroupImageMediaBlockIOINTEL : CapabilityOperand<5579, 0, 0, [], []>;
defm SubgroupAvcMotionEstimationINTEL : CapabilityOperand<5696, 0, 0, [], []>;
defm SubgroupAvcMotionEstimationIntraINTEL : CapabilityOperand<5697, 0, 0, [], []>;
defm SubgroupAvcMotionEstimationChromaINTEL : CapabilityOperand<5698, 0, 0, [], []>;
defm GroupNonUniformPartitionedNV : CapabilityOperand<5297, 0, 0, [], []>;
defm VulkanMemoryModelKHR : CapabilityOperand<5345, 0, 0, [], []>;
defm VulkanMemoryModelDeviceScopeKHR : CapabilityOperand<5346, 0, 0, [], []>;
defm ImageFootprintNV : CapabilityOperand<5282, 0, 0, [], []>;
defm FragmentBarycentricNV : CapabilityOperand<5284, 0, 0, [], []>;
defm ComputeDerivativeGroupQuadsNV : CapabilityOperand<5288, 0, 0, [], []>;
defm ComputeDerivativeGroupLinearNV : CapabilityOperand<5350, 0, 0, [], []>;
defm FragmentDensityEXT : CapabilityOperand<5291, 0, 0, [], [Shader]>;
defm PhysicalStorageBufferAddressesEXT : CapabilityOperand<5347, 0, 0, [], [Shader]>;
defm CooperativeMatrixNV : CapabilityOperand<5357, 0, 0, [], [Shader]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define SourceLanguage enum values and at the same time
// SymbolicOperand entries.
//===----------------------------------------------------------------------===//
def SourceLanguage : GenericEnum, Operand<i32> {
let FilterClass = "SourceLanguage";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class SourceLanguage<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass SourceLanguageOperand<bits<32> value> {
def : SourceLanguage<NAME, value>;
defm : SymbolicOperandWithRequirements<SourceLanguageOperand, value, NAME, 0, 0, [], []>;
}
defm Unknown : SourceLanguageOperand<0>;
defm ESSL : SourceLanguageOperand<1>;
defm GLSL : SourceLanguageOperand<2>;
defm OpenCL_C : SourceLanguageOperand<3>;
defm OpenCL_CPP : SourceLanguageOperand<4>;
defm HLSL : SourceLanguageOperand<5>;
//===----------------------------------------------------------------------===//
// Multiclass used to define AddressingModel enum values and at the same time
// SymbolicOperand entries with string mnemonics, and capabilities.
//===----------------------------------------------------------------------===//
def AddressingModel : GenericEnum, Operand<i32> {
let FilterClass = "AddressingModel";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class AddressingModel<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass AddressingModelOperand<bits<32> value, list<Capability> reqCapabilities> {
def : AddressingModel<NAME, value>;
defm : SymbolicOperandWithRequirements<AddressingModelOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Logical : AddressingModelOperand<0, []>;
defm Physical32 : AddressingModelOperand<1, [Addresses]>;
defm Physical64 : AddressingModelOperand<2, [Addresses]>;
defm PhysicalStorageBuffer64EXT : AddressingModelOperand<5348, [PhysicalStorageBufferAddressesEXT]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define ExecutionModel enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def ExecutionModel : GenericEnum, Operand<i32> {
let FilterClass = "ExecutionModel";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class ExecutionModel<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ExecutionModelOperand<bits<32> value, list<Capability> reqCapabilities> {
def : ExecutionModel<NAME, value>;
defm : SymbolicOperandWithRequirements<ExecutionModelOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Vertex : ExecutionModelOperand<0, [Shader]>;
defm TessellationControl: ExecutionModelOperand<1, [Tessellation]>;
defm TessellationEvaluation: ExecutionModelOperand<2, [Tessellation]>;
defm Geometry: ExecutionModelOperand<3, [Geometry]>;
defm Fragment: ExecutionModelOperand<4, [Shader]>;
defm GLCompute: ExecutionModelOperand<5, [Shader]>;
defm Kernel: ExecutionModelOperand<6, [Kernel]>;
defm TaskNV: ExecutionModelOperand<5267, [MeshShadingNV]>;
defm MeshNV: ExecutionModelOperand<5268, [MeshShadingNV]>;
defm RayGenerationNV: ExecutionModelOperand<5313, [RayTracingNV]>;
defm IntersectionNV: ExecutionModelOperand<5314, [RayTracingNV]>;
defm AnyHitNV: ExecutionModelOperand<5315, [RayTracingNV]>;
defm ClosestHitNV: ExecutionModelOperand<5316, [RayTracingNV]>;
defm MissNV: ExecutionModelOperand<5317, [RayTracingNV]>;
defm CallableNV: ExecutionModelOperand<5318, [RayTracingNV]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define MemoryModel enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def MemoryModel : GenericEnum, Operand<i32> {
let FilterClass = "MemoryModel";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class MemoryModel<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass MemoryModelOperand<bits<32> value, list<Capability> reqCapabilities> {
def : MemoryModel<NAME, value>;
defm : SymbolicOperandWithRequirements<MemoryModelOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Simple : MemoryModelOperand<0, [Shader]>;
defm GLSL450 : MemoryModelOperand<1, [Shader]>;
defm OpenCL : MemoryModelOperand<2, [Kernel]>;
defm VulkanKHR : MemoryModelOperand<3, [VulkanMemoryModelKHR]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define ExecutionMode enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def ExecutionMode : GenericEnum, Operand<i32> {
let FilterClass = "ExecutionMode";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class ExecutionMode<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ExecutionModeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : ExecutionMode<NAME, value>;
defm : SymbolicOperandWithRequirements<ExecutionModeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Invocations : ExecutionModeOperand<0, [Geometry]>;
defm SpacingEqual : ExecutionModeOperand<1, [Tessellation]>;
defm SpacingFractionalEven : ExecutionModeOperand<2, [Tessellation]>;
defm SpacingFractionalOdd : ExecutionModeOperand<3, [Tessellation]>;
defm VertexOrderCw : ExecutionModeOperand<4, [Tessellation]>;
defm VertexOrderCcw : ExecutionModeOperand<5, [Tessellation]>;
defm PixelCenterInteger : ExecutionModeOperand<6, [Shader]>;
defm OriginUpperLeft : ExecutionModeOperand<7, [Shader]>;
defm OriginLowerLeft : ExecutionModeOperand<8, [Shader]>;
defm EarlyFragmentTests : ExecutionModeOperand<9, [Shader]>;
defm PointMode : ExecutionModeOperand<10, [Tessellation]>;
defm Xfb : ExecutionModeOperand<11, [TransformFeedback]>;
defm DepthReplacing : ExecutionModeOperand<12, [Shader]>;
defm DepthGreater : ExecutionModeOperand<14, [Shader]>;
defm DepthLess : ExecutionModeOperand<15, [Shader]>;
defm DepthUnchanged : ExecutionModeOperand<16, [Shader]>;
defm LocalSize : ExecutionModeOperand<17, []>;
defm LocalSizeHint : ExecutionModeOperand<18, [Kernel]>;
defm InputPoints : ExecutionModeOperand<19, [Geometry]>;
defm InputLines : ExecutionModeOperand<20, [Geometry]>;
defm InputLinesAdjacency : ExecutionModeOperand<21, [Geometry]>;
defm Triangles : ExecutionModeOperand<22, [Geometry]>;
defm InputTrianglesAdjacency : ExecutionModeOperand<23, [Geometry]>;
defm Quads : ExecutionModeOperand<24, [Tessellation]>;
defm Isolines : ExecutionModeOperand<25, [Tessellation]>;
defm OutputVertices : ExecutionModeOperand<26, [Geometry]>;
defm OutputPoints : ExecutionModeOperand<27, [Geometry]>;
defm OutputLineStrip : ExecutionModeOperand<28, [Geometry]>;
defm OutputTriangleStrip : ExecutionModeOperand<29, [Geometry]>;
defm VecTypeHint : ExecutionModeOperand<30, [Kernel]>;
defm ContractionOff : ExecutionModeOperand<31, [Kernel]>;
defm Initializer : ExecutionModeOperand<33, [Kernel]>;
defm Finalizer : ExecutionModeOperand<34, [Kernel]>;
defm SubgroupSize : ExecutionModeOperand<35, [SubgroupDispatch]>;
defm SubgroupsPerWorkgroup : ExecutionModeOperand<36, [SubgroupDispatch]>;
defm SubgroupsPerWorkgroupId : ExecutionModeOperand<37, [SubgroupDispatch]>;
defm LocalSizeId : ExecutionModeOperand<38, []>;
defm LocalSizeHintId : ExecutionModeOperand<39, [Kernel]>;
defm PostDepthCoverage : ExecutionModeOperand<4446, [SampleMaskPostDepthCoverage]>;
defm DenormPreserve : ExecutionModeOperand<4459, [DenormPreserve]>;
defm DenormFlushToZero : ExecutionModeOperand<4460, [DenormFlushToZero]>;
defm SignedZeroInfNanPreserve : ExecutionModeOperand<4461, [SignedZeroInfNanPreserve]>;
defm RoundingModeRTE : ExecutionModeOperand<4462, [RoundingModeRTE]>;
defm RoundingModeRTZ : ExecutionModeOperand<4463, [RoundingModeRTZ]>;
defm StencilRefReplacingEXT : ExecutionModeOperand<5027, [StencilExportEXT]>;
defm OutputLinesNV : ExecutionModeOperand<5269, [MeshShadingNV]>;
defm DerivativeGroupQuadsNV : ExecutionModeOperand<5289, [ComputeDerivativeGroupQuadsNV]>;
defm DerivativeGroupLinearNV : ExecutionModeOperand<5290, [ComputeDerivativeGroupLinearNV]>;
defm OutputTrianglesNV : ExecutionModeOperand<5298, [MeshShadingNV]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define StorageClass enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def StorageClass : GenericEnum, Operand<i32> {
let FilterClass = "StorageClass";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class StorageClass<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass StorageClassOperand<bits<32> value, list<Capability> reqCapabilities> {
def : StorageClass<NAME, value>;
defm : SymbolicOperandWithRequirements<StorageClassOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm UniformConstant : StorageClassOperand<0, []>;
defm Input : StorageClassOperand<1, []>;
defm Uniform : StorageClassOperand<2, [Shader]>;
defm Output : StorageClassOperand<3, [Shader]>;
defm Workgroup : StorageClassOperand<4, []>;
defm CrossWorkgroup : StorageClassOperand<5, []>;
defm Private : StorageClassOperand<6, [Shader]>;
defm Function : StorageClassOperand<7, []>;
defm Generic : StorageClassOperand<8, [GenericPointer]>;
defm PushConstant : StorageClassOperand<9, [Shader]>;
defm AtomicCounter : StorageClassOperand<10, [AtomicStorage]>;
defm Image : StorageClassOperand<11, []>;
defm StorageBuffer : StorageClassOperand<12, [Shader]>;
defm CallableDataNV : StorageClassOperand<5328, [RayTracingNV]>;
defm IncomingCallableDataNV : StorageClassOperand<5329, [RayTracingNV]>;
defm RayPayloadNV : StorageClassOperand<5338, [RayTracingNV]>;
defm HitAttributeNV : StorageClassOperand<5339, [RayTracingNV]>;
defm IncomingRayPayloadNV : StorageClassOperand<5342, [RayTracingNV]>;
defm ShaderRecordBufferNV : StorageClassOperand<5343, [RayTracingNV]>;
defm PhysicalStorageBufferEXT : StorageClassOperand<5349, [PhysicalStorageBufferAddressesEXT]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Dim enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def Dim : GenericEnum, Operand<i32> {
let FilterClass = "Dim";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class Dim<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass DimOperand<bits<32> value, string mnemonic, list<Capability> reqCapabilities> {
def NAME : Dim<NAME, value>;
defm : SymbolicOperandWithRequirements<DimOperand, value, mnemonic, 0, 0, [], reqCapabilities>;
}
defm DIM_1D : DimOperand<0, "1D", [Sampled1D, Image1D]>;
defm DIM_2D : DimOperand<1, "2D", [Shader, Kernel, ImageMSArray]>;
defm DIM_3D : DimOperand<2, "3D", []>;
defm DIM_Cube : DimOperand<3, "Cube", [Shader, ImageCubeArray]>;
defm DIM_Rect : DimOperand<4, "Rect", [SampledRect, ImageRect]>;
defm DIM_Buffer : DimOperand<5, "Buffer", [SampledBuffer, ImageBuffer]>;
defm DIM_SubpassData : DimOperand<6, "SubpassData", [InputAttachment]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define SamplerAddressingMode enum values and at the same
// time SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def SamplerAddressingMode : GenericEnum, Operand<i32> {
let FilterClass = "SamplerAddressingMode";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class SamplerAddressingMode<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass SamplerAddressingModeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : SamplerAddressingMode<NAME, value>;
defm : SymbolicOperandWithRequirements<SamplerAddressingModeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm None : SamplerAddressingModeOperand<0, [Kernel]>;
defm ClampToEdge : SamplerAddressingModeOperand<1, [Kernel]>;
defm Clamp : SamplerAddressingModeOperand<2, [Kernel]>;
defm Repeat : SamplerAddressingModeOperand<3, [Kernel]>;
defm RepeatMirrored : SamplerAddressingModeOperand<4, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define SamplerFilterMode enum values and at the same
// time SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def SamplerFilterMode : GenericEnum, Operand<i32> {
let FilterClass = "SamplerFilterMode";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class SamplerFilterMode<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass SamplerFilterModeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : SamplerFilterMode<NAME, value>;
defm : SymbolicOperandWithRequirements<SamplerFilterModeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Nearest : SamplerFilterModeOperand<0, [Kernel]>;
defm Linear : SamplerFilterModeOperand<1, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define ImageFormat enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def ImageFormat : GenericEnum, Operand<i32> {
let FilterClass = "ImageFormat";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class ImageFormat<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ImageFormatOperand<bits<32> value, list<Capability> reqCapabilities> {
def : ImageFormat<NAME, value>;
defm : SymbolicOperandWithRequirements<ImageFormatOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Unknown : ImageFormatOperand<0, []>;
defm Rgba32f : ImageFormatOperand<1, [Shader]>;
defm Rgba16f : ImageFormatOperand<2, [Shader]>;
defm R32f : ImageFormatOperand<3, [Shader]>;
defm Rgba8 : ImageFormatOperand<4, [Shader]>;
defm Rgba8Snorm : ImageFormatOperand<5, [Shader]>;
defm Rg32f : ImageFormatOperand<6, [StorageImageExtendedFormats]>;
defm Rg16f : ImageFormatOperand<7, [StorageImageExtendedFormats]>;
defm R11fG11fB10f : ImageFormatOperand<8, [StorageImageExtendedFormats]>;
defm R16f : ImageFormatOperand<9, [StorageImageExtendedFormats]>;
defm Rgba16 : ImageFormatOperand<10, [StorageImageExtendedFormats]>;
defm Rgb10A2 : ImageFormatOperand<11, [StorageImageExtendedFormats]>;
defm Rg16 : ImageFormatOperand<12, [StorageImageExtendedFormats]>;
defm Rg8 : ImageFormatOperand<13, [StorageImageExtendedFormats]>;
defm R16 : ImageFormatOperand<14, [StorageImageExtendedFormats]>;
defm R8 : ImageFormatOperand<15, [StorageImageExtendedFormats]>;
defm Rgba16Snorm : ImageFormatOperand<16, [StorageImageExtendedFormats]>;
defm Rg16Snorm : ImageFormatOperand<17, [StorageImageExtendedFormats]>;
defm Rg8Snorm : ImageFormatOperand<18, [StorageImageExtendedFormats]>;
defm R16Snorm : ImageFormatOperand<19, [StorageImageExtendedFormats]>;
defm R8Snorm : ImageFormatOperand<20, [StorageImageExtendedFormats]>;
defm Rgba32i : ImageFormatOperand<21, [Shader]>;
defm Rgba16i : ImageFormatOperand<22, [Shader]>;
defm Rgba8i : ImageFormatOperand<23, [Shader]>;
defm R32i : ImageFormatOperand<24, [Shader]>;
defm Rg32i : ImageFormatOperand<25, [StorageImageExtendedFormats]>;
defm Rg16i : ImageFormatOperand<26, [StorageImageExtendedFormats]>;
defm Rg8i : ImageFormatOperand<27, [StorageImageExtendedFormats]>;
defm R16i : ImageFormatOperand<28, [StorageImageExtendedFormats]>;
defm R8i : ImageFormatOperand<29, [StorageImageExtendedFormats]>;
defm Rgba32ui : ImageFormatOperand<30, [Shader]>;
defm Rgba16ui : ImageFormatOperand<31, [Shader]>;
defm Rgba8ui : ImageFormatOperand<32, [Shader]>;
defm R32ui : ImageFormatOperand<33, [Shader]>;
defm Rgb10a2ui : ImageFormatOperand<34, [StorageImageExtendedFormats]>;
defm Rg32ui : ImageFormatOperand<35, [StorageImageExtendedFormats]>;
defm Rg16ui : ImageFormatOperand<36, [StorageImageExtendedFormats]>;
defm Rg8ui : ImageFormatOperand<37, [StorageImageExtendedFormats]>;
defm R16ui : ImageFormatOperand<38, [StorageImageExtendedFormats]>;
defm R8ui : ImageFormatOperand<39, [StorageImageExtendedFormats]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define ImageChannelOrder enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def ImageChannelOrder : GenericEnum, Operand<i32> {
let FilterClass = "ImageChannelOrder";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class ImageChannelOrder<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ImageChannelOrderOperand<bits<32> value, list<Capability> reqCapabilities> {
def : ImageChannelOrder<NAME, value>;
defm : SymbolicOperandWithRequirements<ImageChannelOrderOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm R : ImageChannelOrderOperand<0, [Kernel]>;
defm A : ImageChannelOrderOperand<1, [Kernel]>;
defm RG : ImageChannelOrderOperand<2, [Kernel]>;
defm RA : ImageChannelOrderOperand<3, [Kernel]>;
defm RGB : ImageChannelOrderOperand<4, [Kernel]>;
defm RGBA : ImageChannelOrderOperand<5, [Kernel]>;
defm BGRA : ImageChannelOrderOperand<6, [Kernel]>;
defm ARGB : ImageChannelOrderOperand<7, [Kernel]>;
defm Intensity : ImageChannelOrderOperand<8, [Kernel]>;
defm Luminance : ImageChannelOrderOperand<9, [Kernel]>;
defm Rx : ImageChannelOrderOperand<10, [Kernel]>;
defm RGx : ImageChannelOrderOperand<11, [Kernel]>;
defm RGBx : ImageChannelOrderOperand<12, [Kernel]>;
defm Depth : ImageChannelOrderOperand<13, [Kernel]>;
defm DepthStencil : ImageChannelOrderOperand<14, [Kernel]>;
defm sRGB : ImageChannelOrderOperand<15, [Kernel]>;
defm sRGBx : ImageChannelOrderOperand<16, [Kernel]>;
defm sRGBA : ImageChannelOrderOperand<17, [Kernel]>;
defm sBGRA : ImageChannelOrderOperand<18, [Kernel]>;
defm ABGR : ImageChannelOrderOperand<19, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define ImageChannelDataType enum values and at the same
// time SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def ImageChannelDataType : GenericEnum, Operand<i32> {
let FilterClass = "ImageChannelDataType";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class ImageChannelDataType<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ImageChannelDataTypeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : ImageChannelDataType<NAME, value>;
defm : SymbolicOperandWithRequirements<ImageChannelDataTypeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm SnormInt8 : ImageChannelDataTypeOperand<0, []>;
defm SnormInt16 : ImageChannelDataTypeOperand<1, []>;
defm UnormInt8 : ImageChannelDataTypeOperand<2, [Kernel]>;
defm UnormInt16 : ImageChannelDataTypeOperand<3, [Kernel]>;
defm UnormShort565 : ImageChannelDataTypeOperand<4, [Kernel]>;
defm UnormShort555 : ImageChannelDataTypeOperand<5, [Kernel]>;
defm UnormInt101010 : ImageChannelDataTypeOperand<6, [Kernel]>;
defm SignedInt8 : ImageChannelDataTypeOperand<7, [Kernel]>;
defm SignedInt16 : ImageChannelDataTypeOperand<8, [Kernel]>;
defm SignedInt32 : ImageChannelDataTypeOperand<9, [Kernel]>;
defm UnsignedInt8 : ImageChannelDataTypeOperand<10, [Kernel]>;
defm UnsignedInt16 : ImageChannelDataTypeOperand<11, [Kernel]>;
defm UnsigendInt32 : ImageChannelDataTypeOperand<12, [Kernel]>;
defm HalfFloat : ImageChannelDataTypeOperand<13, [Kernel]>;
defm Float : ImageChannelDataTypeOperand<14, [Kernel]>;
defm UnormInt24 : ImageChannelDataTypeOperand<15, [Kernel]>;
defm UnormInt101010_2 : ImageChannelDataTypeOperand<16, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define ImageOperand enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def ImageOperand : GenericEnum, Operand<i32> {
let FilterClass = "ImageOperand";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class ImageOperand<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ImageOperandOperand<bits<32> value, list<Capability> reqCapabilities> {
def : ImageOperand<NAME, value>;
defm : SymbolicOperandWithRequirements<ImageOperandOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm None : ImageOperandOperand<0x0, []>;
defm Bias : ImageOperandOperand<0x1, [Shader]>;
defm Lod : ImageOperandOperand<0x2, []>;
defm Grad : ImageOperandOperand<0x4, []>;
defm ConstOffset : ImageOperandOperand<0x8, []>;
defm Offset : ImageOperandOperand<0x10, [ImageGatherExtended]>;
defm ConstOffsets : ImageOperandOperand<0x20, [ImageGatherExtended]>;
defm Sample : ImageOperandOperand<0x40, []>;
defm MinLod : ImageOperandOperand<0x80, [MinLod]>;
defm MakeTexelAvailableKHR : ImageOperandOperand<0x100, [VulkanMemoryModelKHR]>;
defm MakeTexelVisibleKHR : ImageOperandOperand<0x200, [VulkanMemoryModelKHR]>;
defm NonPrivateTexelKHR : ImageOperandOperand<0x400, [VulkanMemoryModelKHR]>;
defm VolatileTexelKHR : ImageOperandOperand<0x800, [VulkanMemoryModelKHR]>;
defm SignExtend : ImageOperandOperand<0x1000, []>;
defm ZeroExtend : ImageOperandOperand<0x2000, []>;
//===----------------------------------------------------------------------===//
// Multiclass used to define FPFastMathMode enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def FPFastMathMode : GenericEnum, Operand<i32> {
let FilterClass = "FPFastMathMode";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class FPFastMathMode<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass FPFastMathModeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : FPFastMathMode<NAME, value>;
defm : SymbolicOperandWithRequirements<FPFastMathModeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm None : FPFastMathModeOperand<0x0, []>;
defm NotNaN : FPFastMathModeOperand<0x1, [Kernel]>;
defm NotInf : FPFastMathModeOperand<0x2, [Kernel]>;
defm NSZ : FPFastMathModeOperand<0x4, [Kernel]>;
defm AllowRecip : FPFastMathModeOperand<0x8, [Kernel]>;
defm Fast : FPFastMathModeOperand<0x10, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define FPRoundingMode enum values and at the same time
// SymbolicOperand entries with string mnemonics.
//===----------------------------------------------------------------------===//
def FPRoundingMode : GenericEnum, Operand<i32> {
let FilterClass = "FPRoundingMode";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class FPRoundingMode<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass FPRoundingModeOperand<bits<32> value> {
def NAME : FPRoundingMode<NAME, value>;
defm : SymbolicOperandWithRequirements<FPRoundingModeOperand, value, NAME, 0, 0, [], []>;
}
defm RTE : FPRoundingModeOperand<0>;
defm RTZ : FPRoundingModeOperand<1>;
defm RTP : FPRoundingModeOperand<2>;
defm RTN : FPRoundingModeOperand<3>;
//===----------------------------------------------------------------------===//
// Multiclass used to define LinkageType enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def LinkageType : GenericEnum, Operand<i32> {
let FilterClass = "LinkageType";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class LinkageType<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass LinkageTypeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : LinkageType<NAME, value>;
defm : SymbolicOperandWithRequirements<LinkageTypeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Export : LinkageTypeOperand<0, [Linkage]>;
defm Import : LinkageTypeOperand<1, [Linkage]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define AccessQualifier enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def AccessQualifier : GenericEnum, Operand<i32> {
let FilterClass = "AccessQualifier";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class AccessQualifier<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass AccessQualifierOperand<bits<32> value, list<Capability> reqCapabilities> {
def NAME : AccessQualifier<NAME, value>;
defm : SymbolicOperandWithRequirements<AccessQualifierOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm ReadOnly : AccessQualifierOperand<0, [Kernel]>;
defm WriteOnly : AccessQualifierOperand<1, [Kernel]>;
defm ReadWrite : AccessQualifierOperand<2, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define FunctionParameterAttribute enum values and at the
// same time SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def FunctionParameterAttribute : GenericEnum, Operand<i32> {
let FilterClass = "FunctionParameterAttribute";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class FunctionParameterAttribute<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass FunctionParameterAttributeOperand<bits<32> value, list<Capability> reqCapabilities> {
def : FunctionParameterAttribute<NAME, value>;
defm : SymbolicOperandWithRequirements<FunctionParameterAttributeOperand, value, NAME, 0, 0, [], reqCapabilities>;
}
defm Zext : FunctionParameterAttributeOperand<0, [Kernel]>;
defm Sext : FunctionParameterAttributeOperand<1, [Kernel]>;
defm ByVal : FunctionParameterAttributeOperand<2, [Kernel]>;
defm Sret : FunctionParameterAttributeOperand<3, [Kernel]>;
defm NoAlias : FunctionParameterAttributeOperand<4, [Kernel]>;
defm NoCapture : FunctionParameterAttributeOperand<5, [Kernel]>;
defm NoWrite : FunctionParameterAttributeOperand<6, [Kernel]>;
defm NoReadWrite : FunctionParameterAttributeOperand<7, [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Decoration enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def Decoration : GenericEnum, Operand<i32> {
let FilterClass = "Decoration";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class Decoration<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass DecorationOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def : Decoration<NAME, value>;
defm : SymbolicOperandWithRequirements<DecorationOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm RelaxedPrecision : DecorationOperand<0, 0, 0, [], [Shader]>;
defm SpecId : DecorationOperand<1, 0, 0, [], [Shader, Kernel]>;
defm Block : DecorationOperand<2, 0, 0, [], [Shader]>;
defm BufferBlock : DecorationOperand<3, 0, 0, [], [Shader]>;
defm RowMajor : DecorationOperand<4, 0, 0, [], [Matrix]>;
defm ColMajor : DecorationOperand<5, 0, 0, [], [Matrix]>;
defm ArrayStride : DecorationOperand<6, 0, 0, [], [Shader]>;
defm MatrixStride : DecorationOperand<7, 0, 0, [], [Matrix]>;
defm GLSLShared : DecorationOperand<8, 0, 0, [], [Shader]>;
defm GLSLPacked : DecorationOperand<9, 0, 0, [], [Shader]>;
defm CPacked : DecorationOperand<10, 0, 0, [], [Kernel]>;
defm BuiltIn : DecorationOperand<11, 0, 0, [], []>;
defm NoPerspective : DecorationOperand<13, 0, 0, [], [Shader]>;
defm Flat : DecorationOperand<14, 0, 0, [], [Shader]>;
defm Patch : DecorationOperand<15, 0, 0, [], [Tessellation]>;
defm Centroid : DecorationOperand<16, 0, 0, [], [Shader]>;
defm Sample : DecorationOperand<17, 0, 0, [], [SampleRateShading]>;
defm Invariant : DecorationOperand<18, 0, 0, [], [Shader]>;
defm Restrict : DecorationOperand<19, 0, 0, [], []>;
defm Aliased : DecorationOperand<20, 0, 0, [], []>;
defm Volatile : DecorationOperand<21, 0, 0, [], []>;
defm Constant : DecorationOperand<22, 0, 0, [], [Kernel]>;
defm Coherent : DecorationOperand<23, 0, 0, [], []>;
defm NonWritable : DecorationOperand<24, 0, 0, [], []>;
defm NonReadable : DecorationOperand<25, 0, 0, [], []>;
defm Uniform : DecorationOperand<26, 0, 0, [], [Shader]>;
defm UniformId : DecorationOperand<27, 0, 0, [], [Shader]>;
defm SaturatedConversion : DecorationOperand<28, 0, 0, [], [Kernel]>;
defm Stream : DecorationOperand<29, 0, 0, [], [GeometryStreams]>;
defm Location : DecorationOperand<30, 0, 0, [], [Shader]>;
defm Component : DecorationOperand<31, 0, 0, [], [Shader]>;
defm Index : DecorationOperand<32, 0, 0, [], [Shader]>;
defm Binding : DecorationOperand<33, 0, 0, [], [Shader]>;
defm DescriptorSet : DecorationOperand<34, 0, 0, [], [Shader]>;
defm Offset : DecorationOperand<35, 0, 0, [], [Shader]>;
defm XfbBuffer : DecorationOperand<36, 0, 0, [], [TransformFeedback]>;
defm XfbStride : DecorationOperand<37, 0, 0, [], [TransformFeedback]>;
defm FuncParamAttr : DecorationOperand<38, 0, 0, [], [Kernel]>;
defm FPRoundingMode : DecorationOperand<39, 0, 0, [], []>;
defm FPFastMathMode : DecorationOperand<40, 0, 0, [], [Kernel]>;
defm LinkageAttributes : DecorationOperand<41, 0, 0, [], [Linkage]>;
defm NoContraction : DecorationOperand<42, 0, 0, [], [Shader]>;
defm InputAttachmentIndex : DecorationOperand<43, 0, 0, [], [InputAttachment]>;
defm Alignment : DecorationOperand<44, 0, 0, [], [Kernel]>;
defm MaxByteOffset : DecorationOperand<45, 0, 0, [], [Addresses]>;
defm AlignmentId : DecorationOperand<46, 0, 0, [], [Kernel]>;
defm MaxByteOffsetId : DecorationOperand<47, 0, 0, [], [Addresses]>;
defm NoSignedWrap : DecorationOperand<4469, 0x10400, 0, [SPV_KHR_no_integer_wrap_decoration], []>;
defm NoUnsignedWrap : DecorationOperand<4470, 0x10400, 0, [SPV_KHR_no_integer_wrap_decoration], []>;
defm ExplicitInterpAMD : DecorationOperand<4999, 0, 0, [], []>;
defm OverrideCoverageNV : DecorationOperand<5248, 0, 0, [], [SampleMaskOverrideCoverageNV]>;
defm PassthroughNV : DecorationOperand<5250, 0, 0, [], [GeometryShaderPassthroughNV]>;
defm ViewportRelativeNV : DecorationOperand<5252, 0, 0, [], [ShaderViewportMaskNV]>;
defm SecondaryViewportRelativeNV : DecorationOperand<5256, 0, 0, [], [ShaderStereoViewNV]>;
defm PerPrimitiveNV : DecorationOperand<5271, 0, 0, [], [MeshShadingNV]>;
defm PerViewNV : DecorationOperand<5272, 0, 0, [], [MeshShadingNV]>;
defm PerVertexNV : DecorationOperand<5273, 0, 0, [], [FragmentBarycentricNV]>;
defm NonUniformEXT : DecorationOperand<5300, 0, 0, [], [ShaderNonUniformEXT]>;
defm CountBuffer : DecorationOperand<5634, 0, 0, [], []>;
defm UserSemantic : DecorationOperand<5635, 0, 0, [], []>;
defm RestrictPointerEXT : DecorationOperand<5355, 0, 0, [], [PhysicalStorageBufferAddressesEXT]>;
defm AliasedPointerEXT : DecorationOperand<5356, 0, 0, [], [PhysicalStorageBufferAddressesEXT]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define BuiltIn enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def BuiltIn : GenericEnum, Operand<i32> {
let FilterClass = "BuiltIn";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class BuiltIn<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass BuiltInOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def NAME : BuiltIn<NAME, value>;
defm : SymbolicOperandWithRequirements<BuiltInOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm Position : BuiltInOperand<0, 0, 0, [], [Shader]>;
defm PointSize : BuiltInOperand<1, 0, 0, [], [Shader]>;
defm ClipDistanceVariable : BuiltInOperand<3, 0, 0, [], [ClipDistance]>;
defm CullDistanceVariable : BuiltInOperand<4, 0, 0, [], [CullDistance]>;
defm VertexId : BuiltInOperand<5, 0, 0, [], [Shader]>;
defm InstanceId : BuiltInOperand<6, 0, 0, [], [Shader]>;
defm PrimitiveId : BuiltInOperand<7, 0, 0, [], [Geometry, Tessellation, RayTracingNV]>;
defm InvocationId : BuiltInOperand<8, 0, 0, [], [Geometry, Tessellation]>;
defm Layer : BuiltInOperand<9, 0, 0, [], [Geometry]>;
defm ViewportIndex : BuiltInOperand<10, 0, 0, [], [MultiViewport]>;
defm TessLevelOuter : BuiltInOperand<11, 0, 0, [], [Tessellation]>;
defm TessLevelInner : BuiltInOperand<12, 0, 0, [], [Tessellation]>;
defm TessCoord : BuiltInOperand<13, 0, 0, [], [Tessellation]>;
defm PatchVertices : BuiltInOperand<14, 0, 0, [], [Tessellation]>;
defm FragCoord : BuiltInOperand<15, 0, 0, [], [Shader]>;
defm PointCoord : BuiltInOperand<16, 0, 0, [], [Shader]>;
defm FrontFacing : BuiltInOperand<17, 0, 0, [], [Shader]>;
defm SampleId : BuiltInOperand<18, 0, 0, [], [SampleRateShading]>;
defm SamplePosition : BuiltInOperand<19, 0, 0, [], [SampleRateShading]>;
defm SampleMask : BuiltInOperand<20, 0, 0, [], [Shader]>;
defm FragDepth : BuiltInOperand<22, 0, 0, [], [Shader]>;
defm HelperInvocation : BuiltInOperand<23, 0, 0, [], [Shader]>;
defm NumWorkgroups : BuiltInOperand<24, 0, 0, [], []>;
defm WorkgroupSize : BuiltInOperand<25, 0, 0, [], []>;
defm WorkgroupId : BuiltInOperand<26, 0, 0, [], []>;
defm LocalInvocationId : BuiltInOperand<27, 0, 0, [], []>;
defm GlobalInvocationId : BuiltInOperand<28, 0, 0, [], []>;
defm LocalInvocationIndex : BuiltInOperand<29, 0, 0, [], []>;
defm WorkDim : BuiltInOperand<30, 0, 0, [], [Kernel]>;
defm GlobalSize : BuiltInOperand<31, 0, 0, [], [Kernel]>;
defm EnqueuedWorkgroupSize : BuiltInOperand<32, 0, 0, [], [Kernel]>;
defm GlobalOffset : BuiltInOperand<33, 0, 0, [], [Kernel]>;
defm GlobalLinearId : BuiltInOperand<34, 0, 0, [], [Kernel]>;
defm SubgroupSize : BuiltInOperand<36, 0, 0, [], [Kernel, GroupNonUniform, SubgroupBallotKHR]>;
defm SubgroupMaxSize : BuiltInOperand<37, 0, 0, [], [Kernel]>;
defm NumSubgroups : BuiltInOperand<38, 0, 0, [], [Kernel, GroupNonUniform]>;
defm NumEnqueuedSubgroups : BuiltInOperand<39, 0, 0, [], [Kernel]>;
defm SubgroupId : BuiltInOperand<40, 0, 0, [], [Kernel, GroupNonUniform]>;
defm SubgroupLocalInvocationId : BuiltInOperand<41, 0, 0, [], [Kernel, GroupNonUniform, SubgroupBallotKHR]>;
defm VertexIndex : BuiltInOperand<42, 0, 0, [], [Shader]>;
defm InstanceIndex : BuiltInOperand<43, 0, 0, [], [Shader]>;
defm SubgroupEqMask : BuiltInOperand<4416, 0, 0, [], [SubgroupBallotKHR, GroupNonUniformBallot]>;
defm SubgroupGeMask : BuiltInOperand<4417, 0, 0, [], [SubgroupBallotKHR, GroupNonUniformBallot]>;
defm SubgroupGtMask : BuiltInOperand<4418, 0, 0, [], [SubgroupBallotKHR, GroupNonUniformBallot]>;
defm SubgroupLeMask : BuiltInOperand<4419, 0, 0, [], [SubgroupBallotKHR, GroupNonUniformBallot]>;
defm SubgroupLtMask : BuiltInOperand<4420, 0, 0, [], [SubgroupBallotKHR, GroupNonUniformBallot]>;
defm BaseVertex : BuiltInOperand<4424, 0, 0, [], [DrawParameters]>;
defm BaseInstance : BuiltInOperand<4425, 0, 0, [], [DrawParameters]>;
defm DrawIndex : BuiltInOperand<4426, 0, 0, [], [DrawParameters, MeshShadingNV]>;
defm DeviceIndex : BuiltInOperand<4438, 0, 0, [], [DeviceGroup]>;
defm ViewIndex : BuiltInOperand<4440, 0, 0, [], [MultiView]>;
defm BaryCoordNoPerspAMD : BuiltInOperand<4492, 0, 0, [], []>;
defm BaryCoordNoPerspCentroidAMD : BuiltInOperand<4493, 0, 0, [], []>;
defm BaryCoordNoPerspSampleAMD : BuiltInOperand<4494, 0, 0, [], []>;
defm BaryCoordSmoothAMD : BuiltInOperand<4495, 0, 0, [], []>;
defm BaryCoordSmoothCentroid : BuiltInOperand<4496, 0, 0, [], []>;
defm BaryCoordSmoothSample : BuiltInOperand<4497, 0, 0, [], []>;
defm BaryCoordPullModel : BuiltInOperand<4498, 0, 0, [], []>;
defm FragStencilRefEXT : BuiltInOperand<5014, 0, 0, [], [StencilExportEXT]>;
defm ViewportMaskNV : BuiltInOperand<5253, 0, 0, [], [ShaderViewportMaskNV, MeshShadingNV]>;
defm SecondaryPositionNV : BuiltInOperand<5257, 0, 0, [], [ShaderStereoViewNV]>;
defm SecondaryViewportMaskNV : BuiltInOperand<5258, 0, 0, [], [ShaderStereoViewNV]>;
defm PositionPerViewNV : BuiltInOperand<5261, 0, 0, [], [PerViewAttributesNV, MeshShadingNV]>;
defm ViewportMaskPerViewNV : BuiltInOperand<5262, 0, 0, [], [PerViewAttributesNV, MeshShadingNV]>;
defm FullyCoveredEXT : BuiltInOperand<5264, 0, 0, [], [FragmentFullyCoveredEXT]>;
defm TaskCountNV : BuiltInOperand<5274, 0, 0, [], [MeshShadingNV]>;
defm PrimitiveCountNV : BuiltInOperand<5275, 0, 0, [], [MeshShadingNV]>;
defm PrimitiveIndicesNV : BuiltInOperand<5276, 0, 0, [], [MeshShadingNV]>;
defm ClipDistancePerViewNV : BuiltInOperand<5277, 0, 0, [], [MeshShadingNV]>;
defm CullDistancePerViewNV : BuiltInOperand<5278, 0, 0, [], [MeshShadingNV]>;
defm LayerPerViewNV : BuiltInOperand<5279, 0, 0, [], [MeshShadingNV]>;
defm MeshViewCountNV : BuiltInOperand<5280, 0, 0, [], [MeshShadingNV]>;
defm MeshViewIndices : BuiltInOperand<5281, 0, 0, [], [MeshShadingNV]>;
defm BaryCoordNV : BuiltInOperand<5286, 0, 0, [], [FragmentBarycentricNV]>;
defm BaryCoordNoPerspNV : BuiltInOperand<5287, 0, 0, [], [FragmentBarycentricNV]>;
defm FragSizeEXT : BuiltInOperand<5292, 0, 0, [], [FragmentDensityEXT]>;
defm FragInvocationCountEXT : BuiltInOperand<5293, 0, 0, [], [FragmentDensityEXT]>;
defm LaunchIdNV : BuiltInOperand<5319, 0, 0, [], [RayTracingNV]>;
defm LaunchSizeNV : BuiltInOperand<5320, 0, 0, [], [RayTracingNV]>;
defm WorldRayOriginNV : BuiltInOperand<5321, 0, 0, [], [RayTracingNV]>;
defm WorldRayDirectionNV : BuiltInOperand<5322, 0, 0, [], [RayTracingNV]>;
defm ObjectRayOriginNV : BuiltInOperand<5323, 0, 0, [], [RayTracingNV]>;
defm ObjectRayDirectionNV : BuiltInOperand<5324, 0, 0, [], [RayTracingNV]>;
defm RayTminNV : BuiltInOperand<5325, 0, 0, [], [RayTracingNV]>;
defm RayTmaxNV : BuiltInOperand<5326, 0, 0, [], [RayTracingNV]>;
defm InstanceCustomIndexNV : BuiltInOperand<5327, 0, 0, [], [RayTracingNV]>;
defm ObjectToWorldNV : BuiltInOperand<5330, 0, 0, [], [RayTracingNV]>;
defm WorldToObjectNV : BuiltInOperand<5331, 0, 0, [], [RayTracingNV]>;
defm HitTNV : BuiltInOperand<5332, 0, 0, [], [RayTracingNV]>;
defm HitKindNV : BuiltInOperand<5333, 0, 0, [], [RayTracingNV]>;
defm IncomingRayFlagsNV : BuiltInOperand<5351, 0, 0, [], [RayTracingNV]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define SelectionControl enum values and at the same time
// SymbolicOperand entries with string mnemonics.
//===----------------------------------------------------------------------===//
def SelectionControl : GenericEnum, Operand<i32> {
let FilterClass = "SelectionControl";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class SelectionControl<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass SelectionControlOperand<bits<32> value> {
def : SelectionControl<NAME, value>;
defm : SymbolicOperandWithRequirements<SelectionControlOperand, value, NAME, 0, 0, [], []>;
}
defm None : SelectionControlOperand<0x0>;
defm Flatten : SelectionControlOperand<0x1>;
defm DontFlatten : SelectionControlOperand<0x2>;
//===----------------------------------------------------------------------===//
// Multiclass used to define LoopControl enum values and at the same time
// SymbolicOperand entries with string mnemonics.
//===----------------------------------------------------------------------===//
def LoopControl : GenericEnum, Operand<i32> {
let FilterClass = "LoopControl";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class LoopControl<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass LoopControlOperand<bits<32> value> {
def : LoopControl<NAME, value>;
defm : SymbolicOperandWithRequirements<LoopControlOperand, value, NAME, 0, 0, [], []>;
}
defm None : LoopControlOperand<0x0>;
defm Unroll : LoopControlOperand<0x1>;
defm DontUnroll : LoopControlOperand<0x2>;
defm DependencyInfinite : LoopControlOperand<0x4>;
defm DependencyLength : LoopControlOperand<0x8>;
defm MinIterations : LoopControlOperand<0x10>;
defm MaxIterations : LoopControlOperand<0x20>;
defm IterationMultiple : LoopControlOperand<0x40>;
defm PeelCount : LoopControlOperand<0x80>;
defm PartialCount : LoopControlOperand<0x100>;
//===----------------------------------------------------------------------===//
// Multiclass used to define FunctionControl enum values and at the same time
// SymbolicOperand entries with string mnemonics.
//===----------------------------------------------------------------------===//
def FunctionControl : GenericEnum, Operand<i32> {
let FilterClass = "FunctionControl";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class FunctionControl<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass FunctionControlOperand<bits<32> value> {
def : FunctionControl<NAME, value>;
defm : SymbolicOperandWithRequirements<FunctionControlOperand, value, NAME, 0, 0, [], []>;
}
defm None : FunctionControlOperand<0x0>;
defm Inline : FunctionControlOperand<0x1>;
defm DontInline : FunctionControlOperand<0x2>;
defm Pure : FunctionControlOperand<0x4>;
defm Const : FunctionControlOperand<0x8>;
//===----------------------------------------------------------------------===//
// Multiclass used to define MemorySemantics enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def MemorySemantics : GenericEnum, Operand<i32> {
let FilterClass = "MemorySemantics";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class MemorySemantics<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass MemorySemanticsOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def : MemorySemantics<NAME, value>;
defm : SymbolicOperandWithRequirements<MemorySemanticsOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm None : MemorySemanticsOperand<0x0, 0, 0, [], []>;
defm Acquire : MemorySemanticsOperand<0x2, 0, 0, [], []>;
defm Release : MemorySemanticsOperand<0x4, 0, 0, [], []>;
defm AcquireRelease : MemorySemanticsOperand<0x8, 0, 0, [], []>;
defm SequentiallyConsistent : MemorySemanticsOperand<0x10, 0, 0, [], []>;
defm UniformMemory : MemorySemanticsOperand<0x40, 0, 0, [], [Shader]>;
defm SubgroupMemory : MemorySemanticsOperand<0x80, 0, 0, [], []>;
defm WorkgroupMemory : MemorySemanticsOperand<0x100, 0, 0, [], []>;
defm CrossWorkgroupMemory : MemorySemanticsOperand<0x200, 0, 0, [], []>;
defm AtomicCounterMemory : MemorySemanticsOperand<0x400, 0, 0, [], [AtomicStorage]>;
defm ImageMemory : MemorySemanticsOperand<0x800, 0, 0, [], []>;
defm OutputMemoryKHR : MemorySemanticsOperand<0x1000, 0, 0, [], [VulkanMemoryModelKHR]>;
defm MakeAvailableKHR : MemorySemanticsOperand<0x2000, 0, 0, [], [VulkanMemoryModelKHR]>;
defm MakeVisibleKHR : MemorySemanticsOperand<0x4000, 0, 0, [], [VulkanMemoryModelKHR]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define MemoryOperand enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def MemoryOperand : GenericEnum, Operand<i32> {
let FilterClass = "MemoryOperand";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class MemoryOperand<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass MemoryOperandOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def : MemoryOperand<NAME, value>;
defm : SymbolicOperandWithRequirements<MemoryOperandOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm None : MemoryOperandOperand<0x0, 0, 0, [], []>;
defm Volatile : MemoryOperandOperand<0x1, 0, 0, [], []>;
defm Aligned : MemoryOperandOperand<0x2, 0, 0, [], []>;
defm Nontemporal : MemoryOperandOperand<0x4, 0, 0, [], []>;
defm MakePointerAvailableKHR : MemoryOperandOperand<0x8, 0, 0, [], [VulkanMemoryModelKHR]>;
defm MakePointerVisibleKHR : MemoryOperandOperand<0x10, 0, 0, [], [VulkanMemoryModelKHR]>;
defm NonPrivatePointerKHR : MemoryOperandOperand<0x20, 0, 0, [], [VulkanMemoryModelKHR]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Scope enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def Scope : GenericEnum, Operand<i32> {
let FilterClass = "Scope";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class Scope<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass ScopeOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def : Scope<NAME, value>;
defm : SymbolicOperandWithRequirements<ScopeOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm CrossDevice : ScopeOperand<0, 0, 0, [], []>;
defm Device : ScopeOperand<1, 0, 0, [], []>;
defm Workgroup : ScopeOperand<2, 0, 0, [], []>;
defm Subgroup : ScopeOperand<3, 0, 0, [], []>;
defm Invocation : ScopeOperand<4, 0, 0, [], []>;
defm QueueFamilyKHR : ScopeOperand<5, 0, 0, [], [VulkanMemoryModelKHR]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define GroupOperation enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def GroupOperation : GenericEnum, Operand<i32> {
let FilterClass = "GroupOperation";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class GroupOperation<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass GroupOperationOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def NAME : GroupOperation<NAME, value>;
defm : SymbolicOperandWithRequirements<GroupOperationOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm Reduce : GroupOperationOperand<0, 0, 0, [], [Kernel, GroupNonUniformArithmetic, GroupNonUniformBallot]>;
defm InclusiveScan : GroupOperationOperand<1, 0, 0, [], [Kernel, GroupNonUniformArithmetic, GroupNonUniformBallot]>;
defm ExclusiveScan : GroupOperationOperand<2, 0, 0, [], [Kernel, GroupNonUniformArithmetic, GroupNonUniformBallot]>;
defm ClusteredReduce : GroupOperationOperand<3, 0, 0, [], [GroupNonUniformClustered]>;
defm PartitionedReduceNV : GroupOperationOperand<6, 0, 0, [], [GroupNonUniformPartitionedNV]>;
defm PartitionedInclusiveScanNV : GroupOperationOperand<7, 0, 0, [], [GroupNonUniformPartitionedNV]>;
defm PartitionedExclusiveScanNV : GroupOperationOperand<8, 0, 0, [], [GroupNonUniformPartitionedNV]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define KernelEnqueueFlags enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def KernelEnqueueFlags : GenericEnum, Operand<i32> {
let FilterClass = "KernelEnqueueFlags";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class KernelEnqueueFlags<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass KernelEnqueueFlagsOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def : KernelEnqueueFlags<NAME, value>;
defm : SymbolicOperandWithRequirements<KernelEnqueueFlagsOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm NoWait : KernelEnqueueFlagsOperand<0, 0, 0, [], [Kernel]>;
defm WaitKernel : KernelEnqueueFlagsOperand<1, 0, 0, [], [Kernel]>;
defm WaitWorkGroup : KernelEnqueueFlagsOperand<2, 0, 0, [], [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define KernelProfilingInfo enum values and at the same time
// SymbolicOperand entries with string mnemonics, versioning, extensions and
// capabilities.
//===----------------------------------------------------------------------===//
def KernelProfilingInfo : GenericEnum, Operand<i32> {
let FilterClass = "KernelProfilingInfo";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class KernelProfilingInfo<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass KernelProfilingInfoOperand<bits<32> value, bits<32> minVersion, bits<32> maxVersion, list<Extension> reqExtensions, list<Capability> reqCapabilities> {
def : KernelProfilingInfo<NAME, value>;
defm : SymbolicOperandWithRequirements<KernelProfilingInfoOperand, value, NAME, minVersion, maxVersion, reqExtensions, reqCapabilities>;
}
defm None : KernelProfilingInfoOperand<0x0, 0, 0, [], []>;
defm CmdExecTime : KernelProfilingInfoOperand<0x1, 0, 0, [], [Kernel]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Opcode enum values and at the same time
// SymbolicOperand entries with string mnemonics and capabilities.
//===----------------------------------------------------------------------===//
def Opcode : GenericEnum, Operand<i32> {
let FilterClass = "Opcode";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}
class Opcode<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}
multiclass OpcodeOperand<bits<32> value> {
def : Opcode<NAME, value>;
defm : SymbolicOperandWithRequirements<OpcodeOperand, value, NAME, 0, 0, [], []>;
}
// TODO: implement other mnemonics.
defm InBoundsPtrAccessChain : OpcodeOperand<70>;
defm PtrCastToGeneric : OpcodeOperand<121>;

llvm/lib/Target/SPIRV/SPIRVUtils.h

Show All 21 Lines
class MachineFunction; class MachineFunction;
class MachineInstr; class MachineInstr;
class MachineInstrBuilder; class MachineInstrBuilder;
class MachineIRBuilder; class MachineIRBuilder;
class MachineRegisterInfo; class MachineRegisterInfo;
class Register; class Register;
class StringRef; class StringRef;
class SPIRVInstrInfo; class SPIRVInstrInfo;
} // namespace llvm
// Add the given string as a series of integer operand, inserting null // Add the given string as a series of integer operand, inserting null
// terminators and padding to make sure the operands all have 32-bit // terminators and padding to make sure the operands all have 32-bit
// little-endian words. // little-endian words.
void addStringImm(const llvm::StringRef &Str, llvm::MCInst &Inst); void addStringImm(const StringRef &Str, MCInst &Inst);
void addStringImm(const llvm::StringRef &Str, llvm::MachineInstrBuilder &MIB); void addStringImm(const StringRef &Str, MachineInstrBuilder &MIB);
void addStringImm(const llvm::StringRef &Str, llvm::IRBuilder<> &B, void addStringImm(const StringRef &Str, IRBuilder<> &B,
std::vector<llvm::Value *> &Args); std::vector<Value *> &Args);
// Read the series of integer operands back as a null-terminated string using // Read the series of integer operands back as a null-terminated string using
// the reverse of the logic in addStringImm. // the reverse of the logic in addStringImm.
std::string getStringImm(const llvm::MachineInstr &MI, unsigned StartIndex); std::string getStringImm(const MachineInstr &MI, unsigned StartIndex);
// Add the given numerical immediate to MIB. // Add the given numerical immediate to MIB.
void addNumImm(const llvm::APInt &Imm, llvm::MachineInstrBuilder &MIB); void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB);
// Add an OpName instruction for the given target register. // Add an OpName instruction for the given target register.
void buildOpName(llvm::Register Target, const llvm::StringRef &Name, void buildOpName(Register Target, const StringRef &Name,
llvm::MachineIRBuilder &MIRBuilder); MachineIRBuilder &MIRBuilder);
// Add an OpDecorate instruction for the given Reg. // Add an OpDecorate instruction for the given Reg.
void buildOpDecorate(llvm::Register Reg, llvm::MachineIRBuilder &MIRBuilder, void buildOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder,
llvm::SPIRV::Decoration Dec, SPIRV::Decoration::Decoration Dec,
const std::vector<uint32_t> &DecArgs, const std::vector<uint32_t> &DecArgs,
llvm::StringRef StrImm = ""); StringRef StrImm = "");
void buildOpDecorate(llvm::Register Reg, llvm::MachineInstr &I, void buildOpDecorate(Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII,
const llvm::SPIRVInstrInfo &TII, SPIRV::Decoration::Decoration Dec,
llvm::SPIRV::Decoration Dec,
const std::vector<uint32_t> &DecArgs, const std::vector<uint32_t> &DecArgs,
llvm::StringRef StrImm = ""); StringRef StrImm = "");
// Convert a SPIR-V storage class to the corresponding LLVM IR address space. // Convert a SPIR-V storage class to the corresponding LLVM IR address space.
unsigned storageClassToAddressSpace(llvm::SPIRV::StorageClass SC); unsigned storageClassToAddressSpace(SPIRV::StorageClass::StorageClass SC);
// Convert an LLVM IR address space to a SPIR-V storage class. // Convert an LLVM IR address space to a SPIR-V storage class.
llvm::SPIRV::StorageClass addressSpaceToStorageClass(unsigned AddrSpace); SPIRV::StorageClass::StorageClass
addressSpaceToStorageClass(unsigned AddrSpace);
llvm::SPIRV::MemorySemantics SPIRV::MemorySemantics::MemorySemantics
getMemSemanticsForStorageClass(llvm::SPIRV::StorageClass SC); getMemSemanticsForStorageClass(SPIRV::StorageClass::StorageClass SC);
llvm::SPIRV::MemorySemantics getMemSemantics(llvm::AtomicOrdering Ord); SPIRV::MemorySemantics::MemorySemantics getMemSemantics(AtomicOrdering Ord);
// Find def instruction for the given ConstReg, walking through // Find def instruction for the given ConstReg, walking through
// spv_track_constant and ASSIGN_TYPE instructions. Updates ConstReg by def // spv_track_constant and ASSIGN_TYPE instructions. Updates ConstReg by def
// of OpConstant instruction. // of OpConstant instruction.
llvm::MachineInstr * MachineInstr *getDefInstrMaybeConstant(Register &ConstReg,
getDefInstrMaybeConstant(llvm::Register &ConstReg, const MachineRegisterInfo *MRI);
const llvm::MachineRegisterInfo *MRI);
// Get constant integer value of the given ConstReg. // Get constant integer value of the given ConstReg.
uint64_t getIConstVal(llvm::Register ConstReg, uint64_t getIConstVal(Register ConstReg, const MachineRegisterInfo *MRI);
const llvm::MachineRegisterInfo *MRI);
// Check if MI is a SPIR-V specific intrinsic call. // Check if MI is a SPIR-V specific intrinsic call.
bool isSpvIntrinsic(llvm::MachineInstr &MI, llvm::Intrinsic::ID IntrinsicID); bool isSpvIntrinsic(MachineInstr &MI, Intrinsic::ID IntrinsicID);
// Get type of i-th operand of the metadata node. // Get type of i-th operand of the metadata node.
llvm::Type *getMDOperandAsType(const llvm::MDNode *N, unsigned I); Type *getMDOperandAsType(const MDNode *N, unsigned I);
} // namespace llvm
#endif // LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H #endif // LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H

llvm/lib/Target/SPIRV/SPIRVUtils.cpp

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#include "SPIRV.h" #include "SPIRV.h"
#include "SPIRVInstrInfo.h" #include "SPIRVInstrInfo.h"
#include "llvm/ADT/StringRef.h" #include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/IR/IntrinsicsSPIRV.h" #include "llvm/IR/IntrinsicsSPIRV.h"
using namespace llvm; namespace llvm {
// The following functions are used to add these string literals as a series of // The following functions are used to add these string literals as a series of
// 32-bit integer operands with the correct format, and unpack them if necessary // 32-bit integer operands with the correct format, and unpack them if necessary
// when making string comparisons in compiler passes. // when making string comparisons in compiler passes.
// SPIR-V requires null-terminated UTF-8 strings padded to 32-bit alignment. // SPIR-V requires null-terminated UTF-8 strings padded to 32-bit alignment.
static uint32_t convertCharsToWord(const StringRef &Str, unsigned i) { static uint32_t convertCharsToWord(const StringRef &Str, unsigned i) {
uint32_t Word = 0u; // Build up this 32-bit word from 4 8-bit chars. uint32_t Word = 0u; // Build up this 32-bit word from 4 8-bit chars.
for (unsigned WordIndex = 0; WordIndex < 4; ++WordIndex) { for (unsigned WordIndex = 0; WordIndex < 4; ++WordIndex) {
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Linesstatic void finishBuildOpDecorate(MachineInstrBuilder &MIB,
StringRef StrImm) { StringRef StrImm) {
if (!StrImm.empty()) if (!StrImm.empty())
addStringImm(StrImm, MIB); addStringImm(StrImm, MIB);
for (const auto &DecArg : DecArgs) for (const auto &DecArg : DecArgs)
MIB.addImm(DecArg); MIB.addImm(DecArg);
} }
void buildOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder, void buildOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder,
llvm::SPIRV::Decoration Dec, SPIRV::Decoration::Decoration Dec,
const std::vector<uint32_t> &DecArgs, StringRef StrImm) { const std::vector<uint32_t> &DecArgs, StringRef StrImm) {
auto MIB = MIRBuilder.buildInstr(SPIRV::OpDecorate) auto MIB = MIRBuilder.buildInstr(SPIRV::OpDecorate)
.addUse(Reg) .addUse(Reg)
.addImm(static_cast<uint32_t>(Dec)); .addImm(static_cast<uint32_t>(Dec));
finishBuildOpDecorate(MIB, DecArgs, StrImm); finishBuildOpDecorate(MIB, DecArgs, StrImm);
} }
void buildOpDecorate(Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII, void buildOpDecorate(Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII,
llvm::SPIRV::Decoration Dec, SPIRV::Decoration::Decoration Dec,
const std::vector<uint32_t> &DecArgs, StringRef StrImm) { const std::vector<uint32_t> &DecArgs, StringRef StrImm) {
MachineBasicBlock &MBB = *I.getParent(); MachineBasicBlock &MBB = *I.getParent();
auto MIB = BuildMI(MBB, I, I.getDebugLoc(), TII.get(SPIRV::OpDecorate)) auto MIB = BuildMI(MBB, I, I.getDebugLoc(), TII.get(SPIRV::OpDecorate))
.addUse(Reg) .addUse(Reg)
.addImm(static_cast<uint32_t>(Dec)); .addImm(static_cast<uint32_t>(Dec));
finishBuildOpDecorate(MIB, DecArgs, StrImm); finishBuildOpDecorate(MIB, DecArgs, StrImm);
} }
// TODO: maybe the following two functions should be handled in the subtarget // TODO: maybe the following two functions should be handled in the subtarget
// to allow for different OpenCL vs Vulkan handling. // to allow for different OpenCL vs Vulkan handling.
unsigned storageClassToAddressSpace(SPIRV::StorageClass SC) { unsigned storageClassToAddressSpace(SPIRV::StorageClass::StorageClass SC) {
switch (SC) { switch (SC) {
case SPIRV::StorageClass::Function: case SPIRV::StorageClass::Function:
return 0; return 0;
case SPIRV::StorageClass::CrossWorkgroup: case SPIRV::StorageClass::CrossWorkgroup:
return 1; return 1;
case SPIRV::StorageClass::UniformConstant: case SPIRV::StorageClass::UniformConstant:
return 2; return 2;
case SPIRV::StorageClass::Workgroup: case SPIRV::StorageClass::Workgroup:
return 3; return 3;
case SPIRV::StorageClass::Generic: case SPIRV::StorageClass::Generic:
return 4; return 4;
case SPIRV::StorageClass::Input: case SPIRV::StorageClass::Input:
return 7; return 7;
default: default:
llvm_unreachable("Unable to get address space id"); llvm_unreachable("Unable to get address space id");
} }
} }
SPIRV::StorageClass addressSpaceToStorageClass(unsigned AddrSpace) { SPIRV::StorageClass::StorageClass
addressSpaceToStorageClass(unsigned AddrSpace) {
switch (AddrSpace) { switch (AddrSpace) {
case 0: case 0:
return SPIRV::StorageClass::Function; return SPIRV::StorageClass::Function;
case 1: case 1:
return SPIRV::StorageClass::CrossWorkgroup; return SPIRV::StorageClass::CrossWorkgroup;
case 2: case 2:
return SPIRV::StorageClass::UniformConstant; return SPIRV::StorageClass::UniformConstant;
case 3: case 3:
return SPIRV::StorageClass::Workgroup; return SPIRV::StorageClass::Workgroup;
case 4: case 4:
return SPIRV::StorageClass::Generic; return SPIRV::StorageClass::Generic;
case 7: case 7:
return SPIRV::StorageClass::Input; return SPIRV::StorageClass::Input;
default: default:
llvm_unreachable("Unknown address space"); llvm_unreachable("Unknown address space");
} }
} }
SPIRV::MemorySemantics getMemSemanticsForStorageClass(SPIRV::StorageClass SC) { SPIRV::MemorySemantics::MemorySemantics
getMemSemanticsForStorageClass(SPIRV::StorageClass::StorageClass SC) {
switch (SC) { switch (SC) {
case SPIRV::StorageClass::StorageBuffer: case SPIRV::StorageClass::StorageBuffer:
case SPIRV::StorageClass::Uniform: case SPIRV::StorageClass::Uniform:
return SPIRV::MemorySemantics::UniformMemory; return SPIRV::MemorySemantics::UniformMemory;
case SPIRV::StorageClass::Workgroup: case SPIRV::StorageClass::Workgroup:
return SPIRV::MemorySemantics::WorkgroupMemory; return SPIRV::MemorySemantics::WorkgroupMemory;
case SPIRV::StorageClass::CrossWorkgroup: case SPIRV::StorageClass::CrossWorkgroup:
return SPIRV::MemorySemantics::CrossWorkgroupMemory; return SPIRV::MemorySemantics::CrossWorkgroupMemory;
case SPIRV::StorageClass::AtomicCounter: case SPIRV::StorageClass::AtomicCounter:
return SPIRV::MemorySemantics::AtomicCounterMemory; return SPIRV::MemorySemantics::AtomicCounterMemory;
case SPIRV::StorageClass::Image: case SPIRV::StorageClass::Image:
return SPIRV::MemorySemantics::ImageMemory; return SPIRV::MemorySemantics::ImageMemory;
default: default:
return SPIRV::MemorySemantics::None; return SPIRV::MemorySemantics::None;
} }
} }
SPIRV::MemorySemantics getMemSemantics(AtomicOrdering Ord) { SPIRV::MemorySemantics::MemorySemantics getMemSemantics(AtomicOrdering Ord) {
switch (Ord) { switch (Ord) {
case AtomicOrdering::Acquire: case AtomicOrdering::Acquire:
return SPIRV::MemorySemantics::Acquire; return SPIRV::MemorySemantics::Acquire;
case AtomicOrdering::Release: case AtomicOrdering::Release:
return SPIRV::MemorySemantics::Release; return SPIRV::MemorySemantics::Release;
case AtomicOrdering::AcquireRelease: case AtomicOrdering::AcquireRelease:
return SPIRV::MemorySemantics::AcquireRelease; return SPIRV::MemorySemantics::AcquireRelease;
case AtomicOrdering::SequentiallyConsistent: case AtomicOrdering::SequentiallyConsistent:
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bool isSpvIntrinsic(MachineInstr &MI, Intrinsic::ID IntrinsicID) { bool isSpvIntrinsic(MachineInstr &MI, Intrinsic::ID IntrinsicID) {
return MI.getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS && return MI.getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS &&
MI.getIntrinsicID() == IntrinsicID; MI.getIntrinsicID() == IntrinsicID;
} }
Type *getMDOperandAsType(const MDNode *N, unsigned I) { Type *getMDOperandAsType(const MDNode *N, unsigned I) {
return cast<ValueAsMetadata>(N->getOperand(I))->getType(); return cast<ValueAsMetadata>(N->getOperand(I))->getType();
} }
} // namespace llvm
llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp