We form VOPD instructions in the GCNCreateVOPD pass by combining
back-to-back component instructions. There are strict register
constraints for creating a legal VOPD, namely that the matching operands
(e.g. src0x and src0y, src1x and src1y) must be in different register
banks. We add a PostRA scheduler
mutation to put possible VOPD components back-to-back.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp | ||
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150 | Weird auto |
Comment Actions
changed auto to explicit type, changed print syntax in dbg statement, fixed bad DBG_VALUE in test
Comment Actions
combine cases in doReplace
llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp | ||
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172 | No. Macrofusion only pairs instructions which are already data dependent (see MacroFusion.cpp:176), while this mutator considers all pairs of instructions. |
Could merge this case with the previous.