Page MenuHomePhabricator

[AMDGPU] gfx11 CodeGen for new DPP instructions
ClosedPublic

Authored by Joe_Nash on Jun 27 2022, 2:07 PM.

Details

Summary

Modifies the GCNDPPCombine pass to enable DPP formation for the new DPP
instruction in gfx11, namely VOP3 encoded instructions with DPP and VOPC
with DPP.

Depends on D128656

Diff Detail

Event Timeline

Joe_Nash created this revision.Jun 27 2022, 2:07 PM
Herald added a project: Restricted Project. · View Herald TranscriptJun 27 2022, 2:07 PM
Joe_Nash requested review of this revision.Jun 27 2022, 2:07 PM
Herald added a project: Restricted Project. · View Herald TranscriptJun 27 2022, 2:07 PM
Joe_Nash added reviewers: Restricted Project, rampitec, vpykhtin, foad.Jun 27 2022, 2:08 PM
rampitec added inline comments.Jun 27 2022, 4:08 PM
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
145

No need to pass HasVOP3DPP, you have ST available here and it is a trivial getter.

147

You could search for DPP4 opcode only is HasVOP3DPP.

arsenm added inline comments.Jun 28 2022, 5:37 AM
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
146

Bad auto

Joe_Nash updated this revision to Diff 440615.Jun 28 2022, 7:13 AM
Joe_Nash marked 3 inline comments as done.

Removed HasVOP3DPP parameter. explicit type instead of auto. Check ST->hasVOP3DPP before calling getDPPOp64

rampitec added inline comments.Jun 28 2022, 12:35 PM
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
154

You can call getDPPOp64() here, after early exit for DPP32.

Joe_Nash updated this revision to Diff 440741.Jun 28 2022, 1:21 PM
Joe_Nash marked an inline comment as done.

call getDPPOp64 after early exit for DPP32

rampitec accepted this revision.Jun 28 2022, 1:25 PM
This revision is now accepted and ready to land.Jun 28 2022, 1:25 PM
This revision was landed with ongoing or failed builds.Jul 5 2022, 7:47 AM
This revision was automatically updated to reflect the committed changes.