[TableGen] Add a knob for MCOperandInfo expansion in gen-instr-info

[Amir]

Summary

Control the MCOperandInfo expansion with -instr-info-expand-mi-operand-info.
For X86, this would make it possible to see memory operand type e.g.:

/* MOV8rm */
GR8, i8mem,
/* MOV8rm_NOREX */
GR8_NOREX, i8mem_NOREX,

The intended use is a follow-up diff D126116 (getMemOperandSize).

[Amir]

Rebase

[Amir]

Update test; fix incorrect rebase

[skan]

llvm/test/TableGen/get-operand-type-no-expand.td

42

Do we need to test that -instr-info-expand-mi-operand-info=1 while -gen-instr-info is not enabled?

48

Question: i512complex is expanded to what above?

[Amir]

llvm/test/TableGen/get-operand-type-no-expand.td

42

I don't think so. -instr-info-expand-mi-operand-info=1 only has an effect when gen-instr-info is enabled.

48

i8complex and i512complex both expand into (ops i8imm, i32imm) according to ComplexOperand definition. Similar to X86MemOperand that expands into a fixed MIOperandInfo DAG.

[skan]

LGTM

[Amir]

@skan - thank you for looking at these changes.

llvm/test/TableGen/get-operand-type-no-expand.td

+// Test -instr-info-expand-mi-operand-info=0 mode which keeps complex operands
+// that contain a DAG of basic operands unexpanded (the default is to expand).
+
+include "llvm/Target/Target.td"
+
+def archInstrInfo : InstrInfo { }
+
+def arch : Target {
+  let InstructionSet = archInstrInfo;
+}
+
+def Reg : Register<"reg">;
+def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
+
+class ComplexOperand<int size> : Operand<iPTR> {
+  let MIOperandInfo = (ops i8imm, i32imm);
+  int Size = size;
+}
+
+def i8complex : ComplexOperand<8>;
+def i512complex: ComplexOperand<512>;
+
+def InstA : Instruction {
+  let Size = 1;
+  let OutOperandList = (outs i512complex:$a);
+  let InOperandList = (ins i8complex:$b, i32imm:$c);
+  field bits<8> Inst;
+  field bits<8> SoftFail = 0;
+  let Namespace = "MyNamespace";
+}
+
+// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s \
+// RUN:   -instr-info-expand-mi-operand-info=1 \
+// RUN:   | FileCheck %s --check-prefix=CHECK-EXPAND
+// CHECK-EXPAND: #ifdef GET_INSTRINFO_OPERAND_TYPE
+// CHECK-EXPAND: OpcodeOperandTypes[] = {
+// CHECK-EXPAND:        /* InstA */
+// CHECK-EXPAND-NEXT:   i8imm, i32imm, i8imm, i32imm, i32imm,
+// CHECK-EXPAND: #endif // GET_INSTRINFO_OPERAND_TYPE
+
+// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s \
+// RUN:   -instr-info-expand-mi-operand-info=0 \
+// RUN:   | FileCheck %s --check-prefix=CHECK-NOEXPAND
+// CHECK-NOEXPAND: #ifdef GET_INSTRINFO_OPERAND_TYPE
+// CHECK-NOEXPAND: OpcodeOperandTypes[] = {
+// CHECK-NOEXPAND:        /* InstA */
+// CHECK-NOEXPAND-NEXT:   i512complex, i8complex, i32imm,
+// CHECK-NOEXPAND: #endif // GET_INSTRINFO_OPERAND_TYPE

llvm/utils/TableGen/InstrInfoEmitter.cpp

 #include <iterator>
 #include <map>
 #include <string>
 #include <utility>
 #include <vector>
 
 using namespace llvm;
 
+cl::OptionCategory InstrInfoEmitterCat("Options for -gen-instr-info");
+static cl::opt<bool> ExpandMIOperandInfo(
+    "instr-info-expand-mi-operand-info",
+    cl::desc("Expand operand's MIOperandInfo DAG into suboperands"),
+    cl::cat(InstrInfoEmitterCat), cl::init(true));
+
 namespace {
 
 class InstrInfoEmitter {
   RecordKeeper &Records;
   CodeGenDAGPatterns CDP;
   const CodeGenSchedModels &SchedModels;
 
 public:
void InstrInfoEmitter::emitOperandTypeMappings(
   if (!NumberedInstructions.empty()) {
     std::vector<int> OperandOffsets;
     std::vector<Record *> OperandRecords;
     int CurrentOffset = 0;
     for (const CodeGenInstruction *Inst : NumberedInstructions) {
       OperandOffsets.push_back(CurrentOffset);
       for (const auto &Op : Inst->Operands) {
         const DagInit *MIOI = Op.MIOperandInfo;
-        if (!MIOI || MIOI->getNumArgs() == 0) {
+        if (!ExpandMIOperandInfo || !MIOI || MIOI->getNumArgs() == 0) {
           // Single, anonymous, operand.
           OperandRecords.push_back(Op.Rec);
           ++CurrentOffset;
         } else {
           for (Init *Arg : MIOI->getArgs()) {
             OperandRecords.push_back(cast<DefInit>(Arg)->getDef());
             ++CurrentOffset;
           }