[RISCV][NFC] Add load/store instructions in rv64*-invalid.s

[benshi001]

llvm/test/MC/RISCV/rv64zdinx-invalid.s

4

I guess you probably want fld and fsd ?

llvm/test/MC/RISCV/rv64zfh-invalid.s

12

also add invalid operand for fld/fsd along with fsw/flw ?

llvm/test/MC/RISCV/rv64zhinx-invalid.s

4

I guess you want flh/fsh ?

llvm/test/MC/RISCV/rv64zhinxmin-invalid.s

7

I guess you want flh/fsh ?

[sunshaoce]

llvm/test/MC/RISCV/rv64zdinx-invalid.s

4

In zdinx, you should use ld rather than fld or flw.

[benshi001]

llvm/test/MC/RISCV/rv64zdinx-invalid.s

4

Sure. So we need to test neither fld/fsd nor fsw/flw is valid.

[Pretty-box]

llvm/test/MC/RISCV/rv64zhinxmin-invalid.s

7

Modified RUN line -mattr

llvm/test/MC/RISCV/rv64zdinx-invalid.s

 # RUN: not llvm-mc -triple riscv64 -mattr=+zdinx %s 2>&1 | FileCheck %s
 
-# Invalid Instructions
+# Not support float registers
+fld fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'D' (Double-Precision Floating-Point)
+ld a0, -2049(a1) # CHECK: :[[@LINE]]:8: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
+
+# Invalid instructions
+fsd a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
+sd fa4, 64(sp) # CHECK: :[[@LINE]]:4: error: invalid operand for instruction
 fmv.x.d t2, a2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
 fmv.d.x a5, t5 # CHECK: :[[@LINE]]:9:  error: invalid operand for instruction
 
 # FP registers where integer regs are expected
 fcvt.d.l a3, ft3 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
 fcvt.d.lu a4, ft4 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction

llvm/test/MC/RISCV/rv64zfh-invalid.s

 # RUN: not llvm-mc -triple riscv64 -mattr=+zfh < %s 2>&1 | \
 # RUN:   FileCheck %s
 
+# Out of range immediates
+## simm12
+flh ft1, -2049(a0) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
+fsh ft2, 2048(a1) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
+
+# Memory operand not formatted correctly
+flw ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+fsw ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+fld ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+fsd ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+
 # Integer registers where FP regs are expected
 fcvt.l.h ft0, a0 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
 fcvt.lu.h ft1, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
 
 # FP registers where integer regs are expected
 fcvt.h.l a2, ft2 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
 fcvt.h.lu a3, ft3 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction

llvm/test/MC/RISCV/rv64zfinx-invalid.s

 # RUN: not llvm-mc -triple riscv64 -mattr=+zfinx %s 2>&1 | FileCheck %s
 
+# Not support float registers
+flw fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'F' (Single-Precision Floating-Point)
+
 # Invalid instructions
+fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
 fmv.x.w t2, a2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
 fmv.w.x a5, t5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
 
 # FP registers where integer regs are expected
 fcvt.s.l a2, ft2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
 fcvt.s.lu a3, ft3 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction

llvm/test/MC/RISCV/rv64zhinx-invalid.s

 # RUN: not llvm-mc -triple riscv64 -mattr=+zhinx %s 2>&1 | FileCheck %s
 
+# Not support float registers
+flh fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal)
+
 # Invalid instructions
+fsh a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
 fmv.x.h t2, a2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
 fmv.h.x a5, t5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
 
 # FP registers where integer regs are expected
 fcvt.h.l a2, ft2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
 fcvt.h.lu a3, ft3 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction

llvm/test/MC/RISCV/rv64zhinxmin-invalid.s

-# RUN: not llvm-mc -triple riscv64 -mattr=+zhinx %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv64 -mattr=+zhinxmin %s 2>&1 | FileCheck %s
+
+# Not support float registers
+flh fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal)
 
 # Invalid instructions
+fsh a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
 fmv.x.h t2, a2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
 fmv.h.x a5, t5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
 
 # FP registers where integer regs are expected
 fcvt.d.h a0, fa2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
 fcvt.h.d a0, fa2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction