[Greedy RegAlloc] Fix the handling of split register in last chance re-coloring.

[skatkov]

Summary

This is a fix for https://github.com/llvm/llvm-project/issues/55827.

When register we are trying to re-color is split the original register (we tried to recover)
has no uses after the split. However in rollback actions we assign back physical register to it.
Later it causes different assertions. One of them is in attached test.

This CL fixes this by avoiding assigning physical register back to register which has no usage
or its live interval now is empty.

There are alternative solution:

1. Disable split in last chance re-coloring as soon as it always leads to rollback.
2. Replace register we are re-coloring with registers it was split to.
3. Move even further, (2) plus try to color split registers again.

This solution was chosen is less intrusive and fixes functional bug.

[arsenm]

llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir

1

Why still redirect stderr?

3

This should get some actual checks, probably should just use update_mir_test_checks

llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll

8–11

This is the problem D122616 is trying to solve

[arsenm]

llvm/lib/CodeGen/RegAllocGreedy.cpp

1905–1906

The possibility for splitting during last chance recoloring confused me when I was last looking at this here. Is it a problem that the split was also not rolled back as well?

[skatkov]

llvm/lib/CodeGen/RegAllocGreedy.cpp

1905–1906

Exactly, the problems comes from the fact that register we are trying to recolor is split in splirOrSelect and split always results in no assignment to physical register, as a result register is not recolored and we should do a roll back.

Current rollback implementation just returns back register we wanted to recolor to original physical register however this register is split and has no uses now.

In an example:
We have register A to try last chance to color.
We take the physical register P and find all registers assigned to P and interfere with live interval of A. Let it be only one register R.
Then we unassign R from P and assign P to A. Fix the register P (do not use it in allocation) and try to recolor R.
As a result of selectOrSplit R is split into R1, R2, R3. R has no uses in machine instructions now, its uses are replaced with R1, R2, R3 and corresponding copy instructions are inserted to connect R1, R2, R3.
selectOrSplit always returns no assignment and R1, R2, R3 as new registers to be added again into queue and process them further on regular basis.
As soon as we are in last chance color, we get no assignment of R to physical register and states this as a failure of recoloring.
So we do a rollback. In this rollback we just return back an assignment of R to P. But R has no uses now and it leads to different assertions later when handling such registers (without uses but with assignment to physical registers).

This is a description of the problem.

Now how to solve this in rollback:

1. This patch just avoid assignment of P to R due to R has no uses. R1, R2, R3 will go to the queue finally and will processed on next iterations (it is actually change you did recently).
2. We can try to assign R1, R2, R3 to P. It has more complexity in implementation due to no easy way to detect that R is actually split into R1, R2, R3. So we need some preparation work.
3. We can reject split in selectOrSplit while we are doing last chance recoloring.
4. We can do even smarter: If we detect split R to R1, R2, R3 we can try to continue recolor R1, R2, R3 or only those Ri which still interfere with A.

May be there are other solutions. But just for bug fix I choose the less intrusive way. I hope it helps and not confuse :)

llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir

1

Yeah! No need for this more.

3

ok, I'll do it but the main idea here was that this does not crash anymore.

llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll

8–11

Thanks for pointing me to.

[skatkov]

Handled comments about tests.

To be honest update mir is overkill here. I've also needed to fix some places due to update mir does inaccurate mapping.
I would prefer just check that there is not crash actually.

[arsenm]

llvm/lib/CodeGen/RegAllocGreedy.cpp

1905–1906

Why are both checks necessary? Why isn't LI->empty sufficient?

llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir

2

Probably should also run virtregrewriter

[skatkov]

llvm/lib/CodeGen/RegAllocGreedy.cpp

1905–1906

Because after the split, the live interval of original virtual register does not become empty. It just remains as is.

[arsenm]

llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir

10–31

Can you drop this large IR section?

[qcolombet]

llvm/lib/CodeGen/RegAllocGreedy.cpp

1905–1906

The fact that last chance recoloring allows splitting is by design.
For split regs, we should leave them unassigned when the recoloring fails.

[skatkov]

Update test before landing.

[uabelho]

Awesome!

We've seen several different crashes related to splitting happening during tryLastChanceRecoloring for our out-of-tree target over the years, and I could close all such open downstream TRs now due to this patch.
Thanks @skatkov !

[skatkov]

In D127281#3671525, @uabelho wrote:

Awesome!

We've seen several different crashes related to splitting happening during tryLastChanceRecoloring for our out-of-tree target over the years, and I could close all such open downstream TRs now due to this patch.
Thanks @skatkov !

Nice to hear!

llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir

2

It helped.

llvm/lib/CodeGen/RegAllocGreedy.cpp

for (ssize_t I = RecolorStack.size() - 1; I >= EntryStackSize; --I) {
       if (VRM->hasPhys(LI->reg()))
         Matrix->unassign(*LI);
     }
 
     for (size_t I = EntryStackSize; I != RecolorStack.size(); ++I) {
       const LiveInterval *LI;
       MCRegister PhysReg;
       std::tie(LI, PhysReg) = RecolorStack[I];
+      if (!LI->empty() && !MRI->reg_nodbg_empty(LI->reg()))
         Matrix->assign(*LI, PhysReg);
     }
 
     // Pop the stack of recoloring attempts.
     RecolorStack.resize(EntryStackSize);
   }
 
   // Last chance recoloring did not worked either, give up.
   return ~0u;

llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mattr="+reserve-x28" --run-pass=greedy,virtregrewriter -verify-machineinstrs %s -o - | FileCheck %s
+
+# CHECK-LABEL: ham
+
+--- |
+  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+  target triple = "aarch64-none-linux-gnu"
+
+  define void @ham(i8 addrspace(1)* %arg) gc "statepoint-example" {
+  bb:
+    br i1 undef, label %bb27.preheader, label %bb23
+
+  bb27.preheader:                                   ; preds = %bb
+    br label %bb27
+
+  bb23:                                             ; preds = %bb
+    unreachable
+
+  bb27:                                             ; preds = %bb115, %bb27.preheader
+    br i1 undef, label %bb41, label %bb85
+
+  bb41:                                             ; preds = %bb27
+    br i1 undef, label %bb48, label %bb42
+
+  bb42:                                             ; preds = %bb41
+    br label %bb48
+
+  bb48:                                             ; preds = %bb42, %bb41
+    br label %bb79
+
+  bb79:                                             ; preds = %bb79, %bb48
+    br i1 undef, label %bb81, label %bb79
+
+  bb81:                                             ; preds = %bb79
+    br i1 undef, label %bb83, label %bb82
+
+  bb82:                                             ; preds = %bb81
+    br label %bb83
+
+  bb83:                                             ; preds = %bb82, %bb81
+    br i1 undef, label %bb105, label %bb96
+
+  bb85:                                             ; preds = %bb27
+    br i1 undef, label %bb86, label %bb90
+
+  bb86:                                             ; preds = %bb85
+    unreachable
+
+  bb90:                                             ; preds = %bb85
+    unreachable
+
+  bb94:                                             ; preds = %bb115
+    unreachable
+
+  bb96:                                             ; preds = %bb83
+    br label %bb105
+
+  bb105:                                            ; preds = %bb96, %bb83
+    br i1 undef, label %bb120, label %bb115
+
+  bb115:                                            ; preds = %bb105
+    br i1 undef, label %bb94, label %bb27
+
+  bb120:                                            ; preds = %bb105
+    unreachable
+  }
+
+  declare i8 addrspace(1)* @bar(i64, i64, i64, i32*)
+  declare void @wombat()
+  declare void @blam.1()
+  declare void @blam(i32)
+
+...
+---
+name:            ham
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+callsEHReturn:   false
+callsUnwindInit: false
+hasEHCatchret:   false
+hasEHScopes:     false
+hasEHFunclets:   false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+  - { id: 0, class: gpr32, preferred-register: '' }
+  - { id: 1, class: gpr64, preferred-register: '' }
+  - { id: 2, class: gpr32, preferred-register: '' }
+  - { id: 3, class: gpr32, preferred-register: '' }
+  - { id: 4, class: gpr64all, preferred-register: '' }
+  - { id: 5, class: gpr64sp, preferred-register: '' }
+  - { id: 6, class: gpr64all, preferred-register: '' }
+  - { id: 7, class: gpr64all, preferred-register: '' }
+  - { id: 8, class: gpr64all, preferred-register: '' }
+  - { id: 9, class: gpr64all, preferred-register: '' }
+  - { id: 10, class: gpr64sp, preferred-register: '' }
+  - { id: 11, class: gpr64sp, preferred-register: '' }
+  - { id: 12, class: gpr32sp, preferred-register: '' }
+  - { id: 13, class: gpr32, preferred-register: '' }
+  - { id: 14, class: gpr64sp, preferred-register: '' }
+  - { id: 15, class: gpr64sp, preferred-register: '' }
+  - { id: 16, class: gpr64all, preferred-register: '' }
+  - { id: 17, class: gpr64sp, preferred-register: '' }
+  - { id: 18, class: gpr64sp, preferred-register: '' }
+  - { id: 19, class: gpr64all, preferred-register: '' }
+  - { id: 20, class: gpr64all, preferred-register: '' }
+  - { id: 21, class: gpr64all, preferred-register: '' }
+  - { id: 22, class: gpr64all, preferred-register: '' }
+  - { id: 23, class: gpr64all, preferred-register: '' }
+  - { id: 24, class: gpr64all, preferred-register: '' }
+  - { id: 25, class: gpr64sp, preferred-register: '' }
+  - { id: 26, class: gpr64all, preferred-register: '' }
+  - { id: 27, class: gpr64sp, preferred-register: '' }
+  - { id: 28, class: gpr64sp, preferred-register: '' }
+  - { id: 29, class: gpr64sp, preferred-register: '' }
+  - { id: 30, class: gpr64all, preferred-register: '' }
+  - { id: 31, class: gpr64all, preferred-register: '' }
+  - { id: 32, class: gpr64sp, preferred-register: '' }
+  - { id: 33, class: gpr64sp, preferred-register: '' }
+  - { id: 34, class: gpr64, preferred-register: '' }
+  - { id: 35, class: gpr64all, preferred-register: '' }
+  - { id: 36, class: gpr64all, preferred-register: '' }
+  - { id: 37, class: gpr32common, preferred-register: '' }
+  - { id: 38, class: gpr64, preferred-register: '' }
+  - { id: 39, class: gpr32, preferred-register: '' }
+  - { id: 40, class: gpr64, preferred-register: '' }
+  - { id: 41, class: gpr32, preferred-register: '' }
+  - { id: 42, class: gpr64, preferred-register: '' }
+  - { id: 43, class: gpr64all, preferred-register: '' }
+  - { id: 44, class: gpr64all, preferred-register: '' }
+  - { id: 45, class: gpr64, preferred-register: '' }
+  - { id: 46, class: gpr64all, preferred-register: '' }
+  - { id: 47, class: gpr64all, preferred-register: '' }
+  - { id: 48, class: gpr64all, preferred-register: '' }
+  - { id: 49, class: gpr64, preferred-register: '' }
+  - { id: 50, class: gpr64all, preferred-register: '' }
+  - { id: 51, class: gpr64all, preferred-register: '' }
+  - { id: 52, class: gpr32, preferred-register: '' }
+  - { id: 53, class: gpr64all, preferred-register: '' }
+  - { id: 54, class: gpr64all, preferred-register: '' }
+  - { id: 55, class: gpr64, preferred-register: '' }
+  - { id: 56, class: gpr64all, preferred-register: '' }
+  - { id: 57, class: gpr32all, preferred-register: '' }
+  - { id: 58, class: gpr64all, preferred-register: '' }
+  - { id: 59, class: gpr32all, preferred-register: '' }
+  - { id: 60, class: gpr64all, preferred-register: '' }
+  - { id: 61, class: gpr64, preferred-register: '' }
+  - { id: 62, class: gpr64all, preferred-register: '' }
+  - { id: 63, class: gpr32all, preferred-register: '' }
+  - { id: 64, class: gpr64all, preferred-register: '' }
+  - { id: 65, class: gpr32all, preferred-register: '' }
+  - { id: 66, class: gpr64all, preferred-register: '' }
+  - { id: 67, class: gpr64, preferred-register: '' }
+  - { id: 68, class: gpr64all, preferred-register: '' }
+  - { id: 69, class: gpr32all, preferred-register: '' }
+  - { id: 70, class: gpr32, preferred-register: '' }
+  - { id: 71, class: gpr32all, preferred-register: '' }
+  - { id: 72, class: gpr64all, preferred-register: '' }
+  - { id: 73, class: gpr64all, preferred-register: '' }
+  - { id: 74, class: gpr64, preferred-register: '' }
+  - { id: 75, class: gpr64sp, preferred-register: '' }
+  - { id: 76, class: gpr32, preferred-register: '' }
+  - { id: 77, class: gpr64, preferred-register: '' }
+  - { id: 78, class: gpr64all, preferred-register: '' }
+  - { id: 79, class: gpr64all, preferred-register: '' }
+  - { id: 80, class: gpr64all, preferred-register: '' }
+  - { id: 81, class: gpr64all, preferred-register: '' }
+  - { id: 82, class: gpr64, preferred-register: '' }
+  - { id: 83, class: gpr32, preferred-register: '' }
+  - { id: 84, class: gpr32, preferred-register: '' }
+  - { id: 85, class: gpr32, preferred-register: '' }
+  - { id: 86, class: gpr32, preferred-register: '' }
+  - { id: 87, class: gpr32, preferred-register: '' }
+  - { id: 88, class: gpr64sp, preferred-register: '' }
+  - { id: 89, class: gpr32, preferred-register: '' }
+  - { id: 90, class: gpr32, preferred-register: '' }
+  - { id: 91, class: gpr32all, preferred-register: '' }
+  - { id: 92, class: gpr32, preferred-register: '' }
+  - { id: 93, class: gpr64, preferred-register: '' }
+  - { id: 94, class: gpr64all, preferred-register: '' }
+  - { id: 95, class: gpr64, preferred-register: '' }
+  - { id: 96, class: gpr32, preferred-register: '' }
+  - { id: 97, class: gpr32, preferred-register: '' }
+  - { id: 98, class: gpr64all, preferred-register: '' }
+  - { id: 99, class: gpr64all, preferred-register: '' }
+  - { id: 100, class: gpr64all, preferred-register: '' }
+  - { id: 101, class: gpr64all, preferred-register: '' }
+  - { id: 102, class: gpr64, preferred-register: '' }
+  - { id: 103, class: gpr64sp, preferred-register: '' }
+  - { id: 104, class: gpr64all, preferred-register: '' }
+  - { id: 105, class: gpr32, preferred-register: '' }
+  - { id: 106, class: gpr64, preferred-register: '' }
+  - { id: 107, class: gpr32, preferred-register: '' }
+  - { id: 108, class: gpr32, preferred-register: '' }
+  - { id: 109, class: gpr64all, preferred-register: '' }
+  - { id: 110, class: gpr64all, preferred-register: '' }
+  - { id: 111, class: gpr64, preferred-register: '' }
+  - { id: 112, class: gpr64sp, preferred-register: '' }
+  - { id: 113, class: gpr64sp, preferred-register: '' }
+  - { id: 114, class: gpr32, preferred-register: '' }
+  - { id: 115, class: gpr64sp, preferred-register: '' }
+  - { id: 116, class: gpr32, preferred-register: '' }
+  - { id: 117, class: gpr32, preferred-register: '' }
+  - { id: 118, class: gpr32common, preferred-register: '' }
+  - { id: 119, class: gpr64, preferred-register: '' }
+  - { id: 120, class: gpr32, preferred-register: '' }
+  - { id: 121, class: gpr32, preferred-register: '' }
+  - { id: 122, class: gpr64sp, preferred-register: '' }
+  - { id: 123, class: gpr64sp, preferred-register: '' }
+  - { id: 124, class: gpr64sp, preferred-register: '' }
+  - { id: 125, class: gpr64sp, preferred-register: '' }
+  - { id: 126, class: gpr64, preferred-register: '' }
+  - { id: 127, class: gpr64sp, preferred-register: '' }
+  - { id: 128, class: gpr64all, preferred-register: '' }
+  - { id: 129, class: gpr64common, preferred-register: '' }
+  - { id: 130, class: gpr32common, preferred-register: '' }
+  - { id: 131, class: gpr32all, preferred-register: '' }
+  - { id: 132, class: gpr64sp, preferred-register: '' }
+  - { id: 133, class: gpr64all, preferred-register: '' }
+  - { id: 134, class: gpr64all, preferred-register: '' }
+  - { id: 135, class: gpr64all, preferred-register: '' }
+  - { id: 136, class: gpr64all, preferred-register: '' }
+  - { id: 137, class: gpr64all, preferred-register: '' }
+  - { id: 138, class: gpr64all, preferred-register: '' }
+  - { id: 139, class: gpr64all, preferred-register: '' }
+  - { id: 140, class: gpr64all, preferred-register: '' }
+  - { id: 141, class: gpr64sp, preferred-register: '' }
+  - { id: 142, class: gpr64sp, preferred-register: '' }
+  - { id: 143, class: gpr64, preferred-register: '' }
+  - { id: 144, class: gpr64all, preferred-register: '' }
+  - { id: 145, class: gpr64all, preferred-register: '' }
+liveins:
+  - { reg: '$x0', virtual-reg: '%38' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    1
+  adjustsStack:    true
+  hasCalls:        true
+  stackProtector:  ''
+  functionContext: ''
+  maxCallFrameSize: 0
+  cvBytesOfCalleeSavedRegisters: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  hasTailCall:     false
+  localFrameSize:  0
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      []
+stack:           []
+callSites:       []
+debugValueSubstitutions: []
+constants:       []
+machineFunctionInfo: {}
+body:             |
+  ; CHECK-LABEL: name: ham
+  ; CHECK: bb.0.bb:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000), %bb.2(0x00000000)
+  ; CHECK-NEXT:   liveins: $x0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   renamable $x19 = COPY $x0
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   dead $w1 = MOVi32imm 526, implicit-def $x1
+  ; CHECK-NEXT:   dead $w2 = MOVi32imm 2, implicit-def $x2
+  ; CHECK-NEXT:   renamable $w21 = MOVi32imm 2, implicit-def $x21
+  ; CHECK-NEXT:   renamable $x19 = STATEPOINT 2882400000, 0, 4, @bar, undef $x0, $x1, $x2, undef $x3, 2, 0, 2, 4, 2, 39, 2, 0, 2, 1, 2, 0, 2, 42, 2, 2, 2, 14, 2, 0, 2, 3, 2, 400, 2, 3, 2, 400, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 3, 2, 95, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 7, 2, 0, 2, 7, 2, 0, 2, 1, renamable $x19(tied-def 0), 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def $x0, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x20 = COPY $x0
+  ; CHECK-NEXT:   DMB 11
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x20, renamable $x19 = STATEPOINT 2, 4, 1, undef renamable $x0, undef $x0, 2, 0, 2, 4, 2, 35, 2, 0, 2, 2, 2, 0, 2, 48, 2, 0, 2, 14, 2, 0, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 3, 2, 95, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, killed renamable $x20, 2, 7, 2, 0, 2, 2, renamable $x20(tied-def 0), renamable $x19(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $x0, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   $w1 = MOVi32imm 33333
+  ; CHECK-NEXT:   renamable $x20, renamable $x19 = STATEPOINT 2, 4, 2, undef renamable $x0, undef $x0, $w1, 2, 0, 2, 0, 2, 41, 2, 0, 2, 2, 2, 0, 2, 73, 2, 3, 2, 14, 2, 0, 2, 3, 2, 95, 2, 0, 2, 4278124286, 2, 0, 2, 4278124286, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 7, 2, 0, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, killed renamable $x20, 2, 7, 2, 0, 2, 3, renamable $x20(tied-def 0), renamable $x19(tied-def 1), 2, 4278124286, 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $w0, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x20, renamable $x19 = STATEPOINT 2, 4, 2, undef renamable $x0, undef $x0, undef $w1, 2, 0, 2, 0, 2, 39, 2, 0, 2, 2, 2, 0, 2, 78, 2, 2, 2, 14, 2, 0, 2, 3, 2, 95, 2, 0, 2, 4278124286, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 7, 2, 0, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, killed renamable $x20, 2, 7, 2, 0, 2, 3, renamable $x20(tied-def 0), renamable $x19(tied-def 1), 2, 4278124286, 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $w0, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x20, renamable $x19 = STATEPOINT 2, 4, 2, undef renamable $x0, undef $x0, undef $w1, 2, 0, 2, 0, 2, 37, 2, 0, 2, 2, 2, 0, 2, 83, 2, 1, 2, 14, 2, 0, 2, 3, 2, 95, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 7, 2, 0, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, killed renamable $x20, 2, 7, 2, 0, 2, 2, renamable $x20(tied-def 0), renamable $x19(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $w0, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x19, dead renamable $x20 = STATEPOINT 2, 4, 1, undef renamable $x0, undef $w0, 2, 0, 2, 0, 2, 35, 2, 0, 2, 2, 2, 0, 2, 95, 2, 0, 2, 14, 2, 0, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 3, 2, 95, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, killed renamable $x20, 2, 7, 2, 0, 2, 2, renamable $x19(tied-def 0), renamable $x20(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   STRXui killed renamable $x19, %stack.0, 0 :: (store (s64) into %stack.0)
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   CBNZW $wzr, %bb.2
+  ; CHECK-NEXT:   B %bb.1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1.bb27.preheader:
+  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   renamable $x24 = LDRXui undef renamable $x8, 0 :: (load unordered (s64) from `i64 addrspace(1)* undef`, addrspace 1)
+  ; CHECK-NEXT:   renamable $w21 = MOVi32imm -8280
+  ; CHECK-NEXT:   renamable $w23 = MOVi32imm -6
+  ; CHECK-NEXT:   renamable $w25 = MOVi32imm 3, implicit-def $x25
+  ; CHECK-NEXT:   renamable $w20 = MOVi32imm 2143289344
+  ; CHECK-NEXT:   renamable $x22 = IMPLICIT_DEF
+  ; CHECK-NEXT:   dead renamable $x8 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x26 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x19 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x27 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x8 = IMPLICIT_DEF
+  ; CHECK-NEXT:   KILL killed renamable $x8
+  ; CHECK-NEXT:   renamable $x8 = IMPLICIT_DEF
+  ; CHECK-NEXT:   KILL killed renamable $x8
+  ; CHECK-NEXT:   renamable $w10 = MOVi32imm 2, implicit-def $x10
+  ; CHECK-NEXT:   B %bb.3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2.bb23:
+  ; CHECK-NEXT:   successors:
+  ; CHECK-NEXT:   liveins: $x21
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $w19 = MOVi32imm 95
+  ; CHECK-NEXT:   STATEPOINT 2882400000, 0, 0, @wombat, 2, 0, 2, 0, 2, 39, 2, 0, 2, 1, 2, 0, 2, 117, 2, 2, 2, 14, 2, 0, 2, 3, 2, 3, 2, 3, 2, 109, 2, 0, 1, 8, %stack.0, 0, 2, 7, 2, 0, 2, 3, killed renamable $w19, 2, 3, renamable $w21, 2, 3, 2, 3, 2, 3, 2, -8280, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, 2, 4278124286, 2, 7, 2, 0, 2, 2, 1, 8, %stack.0, 0, 2, 4278124286, 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr, implicit killed $x21 :: (load store (s64) on %stack.0)
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3.bb27:
+  ; CHECK-NEXT:   successors: %bb.4(0x80000000), %bb.13(0x00000000)
+  ; CHECK-NEXT:   liveins: $w20, $w21, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   renamable $fp = nuw nsw ADDXri renamable $x25, 1, 0
+  ; CHECK-NEXT:   CBNZW $wzr, %bb.13
+  ; CHECK-NEXT:   B %bb.4
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.4.bb41:
+  ; CHECK-NEXT:   successors: %bb.5(0x7ffff777), %bb.6(0x00000889)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w21, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   CBZW $wzr, %bb.6
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.5:
+  ; CHECK-NEXT:   successors: %bb.7(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   B %bb.7
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.6.bb42:
+  ; CHECK-NEXT:   successors: %bb.7(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w21, $w23, $x24, $x25, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x19 = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
+  ; CHECK-NEXT:   renamable $w26 = MOVi32imm 95
+  ; CHECK-NEXT:   renamable $x22 = LDRXui %stack.1, 0 :: (load (s64) from %stack.1)
+  ; CHECK-NEXT:   renamable $w20 = MOVi32imm 2, implicit-def $x20
+  ; CHECK-NEXT:   renamable $x27, renamable $x22, dead renamable $x19 = STATEPOINT 2882400000, 0, 0, @wombat, 2, 0, 2, 0, 2, 35, 2, 0, 2, 1, 2, 0, 2, 125, 2, 0, 2, 14, 2, 0, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 3, killed renamable $w26, 2, 3, renamable $w20, 2, 3, 2, 4278124286, 2, 3, killed renamable $w21, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 2, 2, 7, 2, 0, 2, 3, 2, 4278124286, 2, 0, killed renamable $x22, 2, 7, 2, 0, 2, 3, killed renamable $x27(tied-def 0), renamable $x22(tied-def 1), renamable $x19(tied-def 2), 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr, implicit killed $x20
+  ; CHECK-NEXT:   renamable $w20 = MOVi32imm 2143289344
+  ; CHECK-NEXT:   renamable $w10 = MOVi32imm 2, implicit-def $x10
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x19 = COPY $xzr
+  ; CHECK-NEXT:   STRXui renamable $x22, %stack.1, 0 :: (store (s64) into %stack.1)
+  ; CHECK-NEXT:   dead renamable $x8 = nuw ADDXri killed renamable $x22, 24, 0
+  ; CHECK-NEXT:   renamable $x22 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x26 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x8 = IMPLICIT_DEF
+  ; CHECK-NEXT:   KILL killed renamable $x8
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.7.bb48:
+  ; CHECK-NEXT:   successors: %bb.8(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.8.bb79:
+  ; CHECK-NEXT:   successors: %bb.9(0x04000000), %bb.8(0x7c000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   CBNZW $wzr, %bb.8
+  ; CHECK-NEXT:   B %bb.9
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.9.bb81:
+  ; CHECK-NEXT:   successors: %bb.11(0x78787f1d), %bb.10(0x078780e3)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   STRXui $xzr, renamable $x22, 0 :: (store unordered (s64), addrspace 1)
+  ; CHECK-NEXT:   CBNZW $wzr, %bb.11
+  ; CHECK-NEXT:   B %bb.10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.10.bb82:
+  ; CHECK-NEXT:   successors: %bb.11(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   BL @blam.1, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
+  ; CHECK-NEXT:   renamable $w10 = MOVi32imm 2, implicit-def $x10
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.11.bb83:
+  ; CHECK-NEXT:   successors: %bb.12(0x7ffff777), %bb.17(0x00000889)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   CBZW $wzr, %bb.17
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.12:
+  ; CHECK-NEXT:   successors: %bb.18(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   B %bb.18
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.13.bb85:
+  ; CHECK-NEXT:   successors: %bb.14(0x40000000), %bb.15(0x40000000)
+  ; CHECK-NEXT:   liveins: $fp, $w21, $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   CBNZW $wzr, %bb.15
+  ; CHECK-NEXT:   B %bb.14
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.14.bb86:
+  ; CHECK-NEXT:   successors:{{  $}}
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   $w0 = MOVi32imm 10
+  ; CHECK-NEXT:   STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 0, 2, 0, 2, 41, 2, 0, 2, 1, 2, 0, 2, 237, 2, 3, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, 2, 4278124286, 2, 3, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.15.bb90:
+  ; CHECK-NEXT:   successors:
+  ; CHECK-NEXT:   liveins: $fp, $w21, $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   $w0 = MOVi32imm 12
+  ; CHECK-NEXT:   renamable $w8 = MOVi32imm 95
+  ; CHECK-NEXT:   STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 129, 2, 0, 2, 43, 2, 0, 2, 1, 2, 0, 2, 201, 2, 4, 2, 14, 2, 0, 2, 0, 2, 4278124286, 2, 3, renamable $w29, 2, 0, 2, 4278124286, 2, 3, renamable $w29, 2, 0, 1, 8, %stack.0, 0, 2, 7, 2, 0, 2, 3, killed renamable $w8, 2, 3, renamable $w10, 2, 3, 2, 4278124286, 2, 3, killed renamable $w21, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 2, 2, 7, 2, 0, 2, 7, 2, 0, 2, 0, 1, 8, %stack.1, 0, 2, 7, 2, 0, 2, 3, 2, 4278124286, 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_allregs, implicit-def $sp, implicit-def dead early-clobber $lr, implicit killed $x10, implicit killed $fp :: (load store (s64) on %stack.0), (load store (s64) on %stack.1)
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.16.bb94:
+  ; CHECK-NEXT:   successors:{{  $}}
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   $w0 = MOVi32imm 10
+  ; CHECK-NEXT:   STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 0, 2, 0, 2, 39, 2, 0, 2, 1, 2, 0, 2, 395, 2, 2, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, 2, 0, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.17.bb96:
+  ; CHECK-NEXT:   successors: %bb.18(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w23, $x24, $x25, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   renamable $x19 = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
+  ; CHECK-NEXT:   renamable $w21 = MOVi32imm 2, implicit-def $x21
+  ; CHECK-NEXT:   renamable $w22 = MOVi32imm 95
+  ; CHECK-NEXT:   renamable $x20 = LDRXui %stack.1, 0 :: (load (s64) from %stack.1)
+  ; CHECK-NEXT:   renamable $x26 = LDRXui %stack.2, 0 :: (load (s64) from %stack.2)
+  ; CHECK-NEXT:   renamable $x26, renamable $x27, renamable $x20, dead renamable $x19 = STATEPOINT 2882400000, 0, 0, @wombat, 2, 0, 2, 0, 2, 35, 2, 0, 2, 1, 2, 0, 2, 250, 2, 0, 2, 14, 2, 0, 2, 0, killed renamable $x19, 2, 7, 2, 0, 2, 3, killed renamable $w22, 2, 3, renamable $w21, 2, 3, 2, 4278124286, 2, 3, renamable $w21, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 0, 2, 7, 2, 0, 2, 3, 2, 4278124286, 2, 0, killed renamable $x20, 2, 7, 2, 0, 2, 4, killed renamable $x26(tied-def 0), killed renamable $x27(tied-def 1), renamable $x20(tied-def 2), renamable $x19(tied-def 3), 2, 0, 2, 4, 0, 0, 1, 1, 2, 2, 3, 3, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr, implicit killed $x21
+  ; CHECK-NEXT:   renamable $w10 = MOVi32imm 2, implicit-def $x10
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   STRXui renamable $x20, %stack.1, 0 :: (store (s64) into %stack.1)
+  ; CHECK-NEXT:   dead renamable $x8 = nuw ADDXri killed renamable $x20, 24, 0
+  ; CHECK-NEXT:   renamable $w20 = MOVi32imm 2143289344
+  ; CHECK-NEXT:   STRXui renamable $x26, %stack.2, 0 :: (store (s64) into %stack.2)
+  ; CHECK-NEXT:   renamable $x22 = nuw ADDXri killed renamable $x26, 848, 0
+  ; CHECK-NEXT:   renamable $x26 = IMPLICIT_DEF
+  ; CHECK-NEXT:   renamable $x19 = IMPLICIT_DEF
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.18.bb105:
+  ; CHECK-NEXT:   successors: %bb.20(0x00000000), %bb.19(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   STRWui renamable $w24, renamable $x19, 0 :: (store unordered (s32), addrspace 1)
+  ; CHECK-NEXT:   STRWui renamable $w20, renamable $x26, 0 :: (store unordered (s32), align 8, addrspace 1)
+  ; CHECK-NEXT:   CBZX renamable $x27, %bb.20
+  ; CHECK-NEXT:   B %bb.19
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.19.bb115:
+  ; CHECK-NEXT:   successors: %bb.16(0x00000000), %bb.3(0x80000000)
+  ; CHECK-NEXT:   liveins: $fp, $w20, $w23, $x10, $x19, $x22, $x24, $x25, $x26, $x27
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   renamable $x8 = COPY $xzr
+  ; CHECK-NEXT:   renamable $w9 = LDRWui renamable $x8, 0 :: (load unordered (s32) from `i32 addrspace(1)* null`, addrspace 1)
+  ; CHECK-NEXT:   renamable $w9 = MADDWrrr killed renamable $w9, renamable $w10, $wzr
+  ; CHECK-NEXT:   renamable $w23 = nsw SUBWri killed renamable $w23, 2, 0
+  ; CHECK-NEXT:   dead $xzr = SUBSXri killed renamable $x25, 107, 0, implicit-def $nzcv
+  ; CHECK-NEXT:   renamable $x25 = COPY killed renamable $fp
+  ; CHECK-NEXT:   renamable $w21 = MOVi32imm 2
+  ; CHECK-NEXT:   STRWui killed renamable $w9, killed renamable $x8, 0 :: (store unordered (s32) into `i32 addrspace(1)* null`, addrspace 1)
+  ; CHECK-NEXT:   Bcc 8, %bb.16, implicit killed $nzcv
+  ; CHECK-NEXT:   B %bb.3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.20.bb120:
+  ; CHECK-NEXT:   liveins: $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+  ; CHECK-NEXT:   $w0 = MOVi32imm 10
+  ; CHECK-NEXT:   STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 129, 2, 0, 2, 39, 2, 0, 2, 1, 2, 0, 2, 272, 2, 2, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, renamable $w10, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_allregs, implicit-def $sp, implicit-def dead early-clobber $lr, implicit killed $x10
+  ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+  bb.0.bb:
+    successors: %bb.1(0x80000000), %bb.2(0x00000000)
+    liveins: $x0
+
+    %49:gpr64 = COPY $x0
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    dead $w1 = MOVi32imm 526, implicit-def $x1
+    dead $w2 = MOVi32imm 2, implicit-def $x2
+    undef %42.sub_32:gpr64 = MOVi32imm 2
+    %49:gpr64 = STATEPOINT 2882400000, 0, 4, @bar, undef $x0, killed $x1, killed $x2, undef $x3, 2, 0, 2, 4, 2, 39, 2, 0, 2, 1, 2, 0, 2, 42, 2, 2, 2, 14, 2, 0, 2, 3, 2, 400, 2, 3, 2, 400, 2, 0, %49, 2, 7, 2, 0, 2, 3, 2, 95, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 7, 2, 0, 2, 7, 2, 0, 2, 1, %49(tied-def 0), 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def $x0, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    %54:gpr64all = COPY $x0
+    DMB 11
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    %54:gpr64all, %49:gpr64 = STATEPOINT 2, 4, 1, undef %50:gpr64all, undef $x0, 2, 0, 2, 4, 2, 35, 2, 0, 2, 2, 2, 0, 2, 48, 2, 0, 2, 14, 2, 0, 2, 0, %49, 2, 7, 2, 0, 2, 3, 2, 95, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, %54, 2, 7, 2, 0, 2, 2, %54(tied-def 0), %49(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $x0, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    $w1 = MOVi32imm 33333
+    %54:gpr64all, %49:gpr64 = STATEPOINT 2, 4, 2, undef %56:gpr64all, undef $x0, killed $w1, 2, 0, 2, 0, 2, 41, 2, 0, 2, 2, 2, 0, 2, 73, 2, 3, 2, 14, 2, 0, 2, 3, 2, 95, 2, 0, 2, 4278124286, 2, 0, 2, 4278124286, 2, 0, %49, 2, 7, 2, 0, 2, 7, 2, 0, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, %54, 2, 7, 2, 0, 2, 3, %54(tied-def 0), %49(tied-def 1), 2, 4278124286, 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $w0, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    %54:gpr64all, %49:gpr64 = STATEPOINT 2, 4, 2, undef %62:gpr64all, undef $x0, undef $w1, 2, 0, 2, 0, 2, 39, 2, 0, 2, 2, 2, 0, 2, 78, 2, 2, 2, 14, 2, 0, 2, 3, 2, 95, 2, 0, 2, 4278124286, 2, 0, %49, 2, 7, 2, 0, 2, 7, 2, 0, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, %54, 2, 7, 2, 0, 2, 3, %54(tied-def 0), %49(tied-def 1), 2, 4278124286, 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $w0, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    %54:gpr64all, %49:gpr64 = STATEPOINT 2, 4, 2, undef %68:gpr64all, undef $x0, undef $w1, 2, 0, 2, 0, 2, 37, 2, 0, 2, 2, 2, 0, 2, 83, 2, 1, 2, 14, 2, 0, 2, 3, 2, 95, 2, 0, %49, 2, 7, 2, 0, 2, 7, 2, 0, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, %54, 2, 7, 2, 0, 2, 2, %54(tied-def 0), %49(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead $w0, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    %0:gpr32 = MOVi32imm 95
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    %49:gpr64, dead %54:gpr64all = STATEPOINT 2, 4, 1, undef %73:gpr64all, undef $w0, 2, 0, 2, 0, 2, 35, 2, 0, 2, 2, 2, 0, 2, 95, 2, 0, 2, 14, 2, 0, 2, 0, %49, 2, 7, 2, 0, 2, 3, 2, 95, 2, 7, 2, 0, 2, 3, 2, -11, 2, 3, 2, -8280, 2, 3, 2, 45, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, %54, 2, 7, 2, 0, 2, 2, %49(tied-def 0), %54(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    CBNZW $wzr, %bb.2
+    B %bb.1
+
+  bb.1.bb27.preheader:
+    successors: %bb.3(0x80000000)
+
+    %74:gpr64 = LDRXui undef %75:gpr64sp, 0 :: (load unordered (s64) from `i64 addrspace(1)* undef`, addrspace 1)
+    %13:gpr32 = MOVi32imm -8280
+    %130:gpr32common = MOVi32imm -6
+    undef %129.sub_32:gpr64common = MOVi32imm 3
+    %114:gpr32 = MOVi32imm 2143289344
+    %122:gpr64sp = IMPLICIT_DEF
+    %123:gpr64sp = IMPLICIT_DEF
+    %124:gpr64sp = IMPLICIT_DEF
+    %125:gpr64sp = IMPLICIT_DEF
+    %126:gpr64 = IMPLICIT_DEF
+    %127:gpr64sp = IMPLICIT_DEF
+    %10:gpr64sp = IMPLICIT_DEF
+    B %bb.3
+
+  bb.2.bb23:
+    successors:
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    dead %49:gpr64 = STATEPOINT 2882400000, 0, 0, @wombat, 2, 0, 2, 0, 2, 39, 2, 0, 2, 1, 2, 0, 2, 117, 2, 2, 2, 14, 2, 0, 2, 3, 2, 3, 2, 3, 2, 109, 2, 0, %49, 2, 7, 2, 0, 2, 3, %0, 2, 3, %42.sub_32, 2, 3, 2, 3, 2, 3, 2, -8280, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 5, 2, 7, 2, 0, 2, 3, 2, 1, 2, 0, 2, 4278124286, 2, 7, 2, 0, 2, 2, %49(tied-def 0), 2, 4278124286, 2, 0, 2, 2, 0, 0, 1, 1, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+  bb.3.bb27:
+    successors: %bb.4(0x80000000), %bb.11(0x00000000)
+
+    %14:gpr64sp = nuw nsw ADDXri %129, 1, 0
+    CBNZW $wzr, %bb.11
+    B %bb.4
+
+  bb.4.bb41:
+    successors: %bb.19(0x7ffff777), %bb.5(0x00000889)
+
+    CBZW $wzr, %bb.5
+
+  bb.19:
+    successors: %bb.6(0x80000000)
+
+    B %bb.6
+
+  bb.5.bb42:
+    successors: %bb.6(0x80000000)
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    %102:gpr64 = COPY %49
+    %126:gpr64, %10:gpr64sp, dead %102:gpr64 = STATEPOINT 2882400000, 0, 0, @wombat, 2, 0, 2, 0, 2, 35, 2, 0, 2, 1, 2, 0, 2, 125, 2, 0, 2, 14, 2, 0, 2, 0, %102, 2, 7, 2, 0, 2, 3, %0, 2, 3, %42.sub_32, 2, 3, 2, 4278124286, 2, 3, %13, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 2, 2, 7, 2, 0, 2, 3, 2, 4278124286, 2, 0, %10, 2, 7, 2, 0, 2, 3, %126(tied-def 0), %10(tied-def 1), %102(tied-def 2), 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    %125:gpr64sp = COPY $xzr
+    %123:gpr64sp = nuw ADDXri %10, 24, 0
+    %122:gpr64sp = IMPLICIT_DEF
+    %124:gpr64sp = IMPLICIT_DEF
+    %127:gpr64sp = IMPLICIT_DEF
+
+  bb.6.bb48:
+    successors: %bb.7(0x80000000)
+
+
+  bb.7.bb79:
+    successors: %bb.8(0x04000000), %bb.7(0x7c000000)
+
+    CBNZW $wzr, %bb.7
+    B %bb.8
+
+  bb.8.bb81:
+    successors: %bb.10(0x78787f1d), %bb.9(0x078780e3)
+
+    STRXui $xzr, %122, 0 :: (store unordered (s64), addrspace 1)
+    CBNZW $wzr, %bb.10
+    B %bb.9
+
+  bb.9.bb82:
+    successors: %bb.10(0x80000000)
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    BL @blam.1, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+  bb.10.bb83:
+    successors: %bb.20(0x7ffff777), %bb.15(0x00000889)
+
+    CBZW $wzr, %bb.15
+
+  bb.20:
+    successors: %bb.16(0x80000000)
+
+    B %bb.16
+
+  bb.11.bb85:
+    successors: %bb.12(0x40000000), %bb.13(0x40000000)
+
+    CBNZW $wzr, %bb.13
+    B %bb.12
+
+  bb.12.bb86:
+    successors:
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    $w0 = MOVi32imm 10
+    STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 0, 2, 0, 2, 41, 2, 0, 2, 1, 2, 0, 2, 237, 2, 3, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, 2, 4278124286, 2, 3, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+  bb.13.bb90:
+    successors:
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    $w0 = MOVi32imm 12
+    dead %49:gpr64, dead %10:gpr64sp = STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 129, 2, 0, 2, 43, 2, 0, 2, 1, 2, 0, 2, 201, 2, 4, 2, 14, 2, 0, 2, 0, 2, 4278124286, 2, 3, %14.sub_32, 2, 0, 2, 4278124286, 2, 3, %14.sub_32, 2, 0, %49, 2, 7, 2, 0, 2, 3, %0, 2, 3, %42.sub_32, 2, 3, 2, 4278124286, 2, 3, %13, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 2, 2, 7, 2, 0, 2, 7, 2, 0, 2, 0, %10, 2, 7, 2, 0, 2, 3, 2, 4278124286, %49(tied-def 0), %10(tied-def 1), 2, 0, 2, 3, 0, 0, 1, 1, 2, 2, csr_aarch64_allregs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+  bb.14.bb94:
+    successors:
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    $w0 = MOVi32imm 10
+    STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 0, 2, 0, 2, 39, 2, 0, 2, 1, 2, 0, 2, 395, 2, 2, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, 2, 0, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+  bb.15.bb96:
+    successors: %bb.16(0x80000000)
+
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    %111:gpr64 = COPY %49
+    %127:gpr64sp, %126:gpr64, %10:gpr64sp, dead %111:gpr64 = STATEPOINT 2882400000, 0, 0, @wombat, 2, 0, 2, 0, 2, 35, 2, 0, 2, 1, 2, 0, 2, 250, 2, 0, 2, 14, 2, 0, 2, 0, %111, 2, 7, 2, 0, 2, 3, %0, 2, 3, %42.sub_32, 2, 3, 2, 4278124286, 2, 3, %42.sub_32, 2, 7, 2, 0, 2, 3, 2, 230, 2, 7, 2, 0, 2, 4, 2, 0, 2, 7, 2, 0, 2, 3, 2, 4278124286, 2, 0, %10, 2, 7, 2, 0, 2, 4, %127(tied-def 0), %126(tied-def 1), %10(tied-def 2), %111(tied-def 3), 2, 0, 2, 4, 0, 0, 1, 1, 2, 2, 3, 3, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+    %123:gpr64sp = nuw ADDXri %10, 24, 0
+    %122:gpr64sp = nuw ADDXri %127, 848, 0
+    %124:gpr64sp = IMPLICIT_DEF
+    %125:gpr64sp = IMPLICIT_DEF
+
+  bb.16.bb105:
+    successors: %bb.18(0x00000000), %bb.17(0x80000000)
+
+    STRWui %74.sub_32, %125, 0 :: (store unordered (s32), addrspace 1)
+    STRWui %114, %124, 0 :: (store unordered (s32), align 8, addrspace 1)
+    CBZX %126, %bb.18
+    B %bb.17
+
+  bb.17.bb115:
+    successors: %bb.14(0x00000000), %bb.3(0x80000000)
+
+    %115:gpr64sp = COPY $xzr
+    %116:gpr32 = LDRWui %115, 0 :: (load unordered (s32) from `i32 addrspace(1)* null`, addrspace 1)
+    %117:gpr32 = MADDWrrr %116, %42.sub_32, $wzr
+    %130:gpr32common = nsw SUBWri %130, 2, 0
+    dead $xzr = SUBSXri %129, 107, 0, implicit-def $nzcv
+    %129:gpr64common = COPY %14
+    %13:gpr32 = MOVi32imm 2
+    STRWui %117, %115, 0 :: (store unordered (s32) into `i32 addrspace(1)* null`, addrspace 1)
+    Bcc 8, %bb.14, implicit killed $nzcv
+    B %bb.3
+
+  bb.18.bb120:
+    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+    $w0 = MOVi32imm 10
+    STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 129, 2, 0, 2, 39, 2, 0, 2, 1, 2, 0, 2, 272, 2, 2, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, %42.sub_32, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_allregs, implicit-def $sp, implicit-def dead early-clobber $lr
+    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+...

llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll

-; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs < %s 2>%t.err | FileCheck %s
-; RUN: FileCheck -check-prefix=ERR %s < %t.err
+; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs < %s 2>&1 | FileCheck %s
 
 ; This testcase fails register allocation at the same time it performs
 ; virtual register splitting (by introducing VGPR to AGPR copies). We
 ; still need to enqueue and allocate the newly split vregs after the
 ; failure.
 
+; The machine verifier complains about usage of register
+; which is marked as killed in previous instruction.
+; This happens due to when register allocator is out of registers
+; it takes the first avialable register.
 
-; ERR: error: ran out of registers during register allocation
-; ERR-NEXT: error: ran out of registers during register allocation
-; ERR-NEXT: error: ran out of registers during register allocation
-; ERR-NOT: ERROR
-
-; CHECK: v_accvgpr_write_b32
-; CHECK: v_accvgpr_write_b32
-; CHECK: v_accvgpr_write_b32
-; CHECK: v_accvgpr_write_b32
-; CHECK: v_accvgpr_write_b32
-; CHECK: v_accvgpr_write_b32
-; CHECK: v_accvgpr_write_b32
-
-; CHECK: v_accvgpr_read_b32
-; CHECK: v_accvgpr_read_b32
-; CHECK: v_accvgpr_read_b32
-; CHECK: v_accvgpr_read_b32
-; CHECK: v_accvgpr_read_b32
-; CHECK: v_accvgpr_read_b32
-; CHECK: v_accvgpr_read_b32
+; CHECK: error: ran out of registers during register allocation
+; CHECK: Bad machine code: Using an undefined physical register
 define amdgpu_kernel void @alloc_failure_with_split_vregs(float %v0, float %v1) #0 {
   %agpr0 = call float asm sideeffect "; def $0", "=${a0}"()
   %agpr.vec = insertelement <16 x float> undef, float %agpr0, i32 0
   %mfma0 = call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float %v0, float %v1, <16 x float> %agpr.vec, i32 0, i32 0, i32 0)
   %mfma0.3 = extractelement <16 x float> %mfma0, i32 3
   %insert = insertelement <16 x float> %mfma0, float %agpr0, i32 8
   %mfma1 = call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float %v0, float %v1, <16 x float> %insert, i32 0, i32 0, i32 0)
   %mfma1.3 = extractelement <16 x float> %mfma1, i32 3