[AMDGPU] Add verification for mandatory literals

[foad]

Summary

Extend the literal operand checking in SIInstrInfo::verifyInstruction to
check VOP2 instructions like V_FMAAK_F32 which have a mandatory literal
operand. The rule is that src0 can also be a literal, but only if it is
the same literal value.

AMDGPUAsmParser::validateConstantBusLimitations already handles this
correctly.

[Joe_Nash]

Please add a test with an sgpr, something like $vgpr0 = V_FMAAK_F32 $sgpr0, $vgpr0, 1077936128, implicit $mode, implicit $exec

[foad]

Add an sgpr test which fails for GFX9 and passes for GFX10.

[Joe_Nash]

Thanks, LGTM

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
   }
 
   // Verify VOP*. Ignore multiple sgpr operands on writelane.
   if (isVALU(MI) && Desc.getOpcode() != AMDGPU::V_WRITELANE_B32) {
     unsigned ConstantBusCount = 0;
     bool UsesLiteral = false;
     const MachineOperand *LiteralVal = nullptr;
 
-    if (AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::imm) != -1)
+    int ImmIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::imm);
+    if (ImmIdx != -1) {
       ++ConstantBusCount;
+      UsesLiteral = true;
+      LiteralVal = &MI.getOperand(ImmIdx);
+    }
 
     SmallVector<Register, 2> SGPRsUsed;
     Register SGPRUsed;
 
     // Only look at the true operands. Only a real operand can use the constant
     // bus, and we don't want to check pseudo-operands like the source modifier
     // flags.
     for (int OpIdx : {Src0Idx, Src1Idx, Src2Idx}) {
for (int OpIdx : {Src0Idx, Src1Idx, Src2Idx}) {
             SGPRsUsed.push_back(SGPRUsed);
           }
         } else {
           if (!UsesLiteral) {
             ++ConstantBusCount;
             UsesLiteral = true;
             LiteralVal = &MO;
           } else if (!MO.isIdenticalTo(*LiteralVal)) {
-            assert(isVOP3(MI));
-            ErrInfo = "VOP3 instruction uses more than one literal";
+            assert(isVOP2(MI) || isVOP3(MI));
+            ErrInfo = "VOP2/VOP3 instruction uses more than one literal";
             return false;
           }
         }
       }
     }
 
     SGPRUsed = findImplicitSGPRRead(MI);
     if (SGPRUsed != AMDGPU::NoRegister) {

llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll

-; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s -check-prefix GFX10
+; RUN: not --crash llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s 2>&1 | FileCheck %s -check-prefix GFX10
 
 declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float)
 declare void @llvm.amdgcn.exp.compr.v2f16(i32 immarg, i32 immarg, <2 x half>, <2 x half>, i1 immarg, i1 immarg)
 
 ; FIXME: This instruction uses two different literal constants which is not
 ; allowed.
 ; GFX10-LABEL: _amdgpu_ps_main:
-; GFX10: v_fmaak_f32 {{v[0-9]+}}, 0x40490fdb, {{v[0-9]+}}, 0xbfc90fdb
+; GFX10: Bad machine code: VOP2/VOP3 instruction uses more than one literal
+; GFX10: instruction: %4:vgpr_32 = nnan nsz arcp contract afn reassoc nofpexcept V_FMAAK_F32 1078530011, %0:vgpr_32, -1077342245, implicit $mode, implicit $exec
 define amdgpu_ps void @_amdgpu_ps_main(float %arg) {
 bb:
   %i = fmul reassoc nnan nsz arcp contract afn float %arg, 0x400921FB60000000
   %i1 = fadd reassoc nnan nsz arcp contract afn float %i, 0xBFF921FB60000000
   %i2 = fmul reassoc nnan nsz arcp contract afn float %i1, %arg
   br label %bb3
 
 bb3:

llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir

-# RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX9-ERR %s
-# RUN: not --crash llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX10PLUS-ERR %s
-# RUN: not --crash llc -march=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX10PLUS-ERR %s
+# RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX9-ERR %s
+# RUN: not --crash llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX10PLUS-ERR %s
+# RUN: not --crash llc -march=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX10PLUS-ERR %s
 
 # GFX9-ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
 # GFX9-ERR: $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, -1, killed $sgpr0_sgpr1, implicit $exec
+# GFX9-ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
+# GFX9-ERR: $vgpr0 = V_FMAAK_F32 $sgpr2, $vgpr0, 1077936128, implicit $mode, implicit $exec
 ---
 name:           sgpr_reuse_2sgpr
 liveins:
   - { reg: '$sgpr0_sgpr1', virtual-reg: '' }
 body:            |
   bb.0:
-    liveins: $sgpr0_sgpr1
+    liveins: $sgpr0_sgpr1, $sgpr2
     $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, -1, killed $sgpr0_sgpr1, implicit $exec
+    $vgpr0 = V_FMAAK_F32 $sgpr2, $vgpr0, 1077936128, implicit $mode, implicit $exec
 ...
 
 # GFX10PLUS-ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
 # GFX10PLUS-ERR: $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, $sgpr2, killed $sgpr0_sgpr1, implicit $exec
+# GFX10PLUS-ERR: *** Bad machine code: VOP2/VOP3 instruction uses more than one literal ***
+# GFX10PLUS-ERR: $vgpr0 = V_FMAAK_F32 1077936128, $vgpr0, 0, implicit $mode, implicit $exec
 ---
 name:           sgpr_reuse_3sgpr
 liveins:
   - { reg: '$sgpr0_sgpr1', virtual-reg: '' }
   - { reg: '$sgpr2', virtual-reg: '' }
 body:            |
   bb.0:
     liveins: $sgpr0_sgpr1, $sgpr2
     $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, $sgpr2, killed $sgpr0_sgpr1, implicit $exec
+    $vgpr0 = V_FMAAK_F32 1077936128, $vgpr0, 0, implicit $mode, implicit $exec
+    $vgpr0 = V_FMAAK_F32 $sgpr2, $vgpr0, 1077936128, implicit $mode, implicit $exec
 ...

llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir

bb.0:
     liveins: $vgpr0
     ; CHECK-LABEL: name: use_duplicate_literal_fma
     ; CHECK: liveins: $vgpr0
     ; CHECK: $vgpr0 = V_FMA_F32_e64 0, $vgpr0, 0, 1077936128, 0, 1077936128, 0, 0, implicit $mode, implicit $exec
     $vgpr0 = V_FMA_F32_e64 0, $vgpr0, 0, 1077936128, 0, 1077936128, 0, 0, implicit $mode, implicit $exec
 ...
 
 ---
+name: use_duplicate_literal_fmaak
+tracksRegLiveness: true
+body:            |
+  bb.0:
+    liveins: $vgpr0
+    $vgpr0 = V_FMAAK_F32 1077936128, $vgpr0, 1077936128, implicit $mode, implicit $exec
+...
+
+---
 name: use_duplicate_literal_sop2
 tracksRegLiveness: true
 body: |
   bb.0:
     $sgpr0 = S_ADD_U32 12345, 12345, implicit-def $scc
 ...
 
 ---
 name: use_duplicate_literal_sopc
 tracksRegLiveness: true
 body: |
   bb.0:
     S_CMP_LG_U32 305419896, 305419896, implicit-def $scc
 ...