[GISel] Add new combines for G_FMINNUM/MAXNUM and G_FMINIMUM/MAXIMUM

[mkitzan]

Summary

I noticed https://reviews.llvm.org/D87415 added SDAG combines to fold FMIN/MAX instrs with NaNs.

The patch implements the same NaN combines for GISel GMIR FMIN/MAX opcodes:
G_FMINNUM(X, NaN) -> X
G_FMAXNUM(X, NaN) -> X
G_FMINIMUM(X, NaN) -> NaN
G_FMAXIMUM(X, NaN) -> NaN

The patch adds AArch64 tests for these combines as well.

[arsenm]

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

109

Spelling Propagate throughout the patch

[foad]

llvm/include/llvm/Target/GlobalISel/Combine.td

894

You should be able to use replaceSingleDefInstWithOperand instead of defining your own apply function. See the select_constant_cmp combine for an example of this.

[mkitzan]

Updates:

• Fixed spelling of propagate
• Exchanged my custom apply function for replaceSingleDefInstWithOperand

[mkitzan]

Thanks for reviews and feedback @arsenm and @foad

[foad]

llvm/include/llvm/Target/GlobalISel/Combine.td

894

There is a standard unsigned_matchinfo you can use instead of defining your own.

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

5608

This could be llvm_unreachable

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

struct InstructionStepsMatchInfo {
   /// Describes instructions to be built during a combine.
   SmallVector<InstructionBuildSteps, 2> InstrsToBuild;
   InstructionStepsMatchInfo() = default;
   InstructionStepsMatchInfo(
       std::initializer_list<InstructionBuildSteps> InstrsToBuild)
       : InstrsToBuild(InstrsToBuild) {}
 };
 
+struct FMinMaxNanMatchInfo {
+  bool PropogateNaN;
+  unsigned NaNIdx;
+  unsigned getIdxToPropogate() const {
+    assert((NaNIdx == 1 || NaNIdx == 2) && "Unsupported NaNIdx!");
+    return PropogateNaN ? NaNIdx : getOppositeIdx();
+  }
+
+private:
+  unsigned getOppositeIdx() const { return NaNIdx == 1 ? 2 : 1; }
+};
+
 class CombinerHelper {
 protected:
   MachineIRBuilder &Builder;
   MachineRegisterInfo &MRI;
   GISelChangeObserver &Observer;
   GISelKnownBits *KB;
   MachineDominatorTree *MDT;
   const LegalizerInfo *LI;
public:
   ///           (fsub (fpext (fneg (fmul x, y))), z)
   ///           -> (fneg (fmad (fpext x), (fpext y), z))
   bool matchCombineFSubFpExtFNegFMulToFMadOrFMA(MachineInstr &MI,
                                                 BuildFnTy &MatchInfo);
 
   /// Fold boolean selects to logical operations.
   bool matchSelectToLogical(MachineInstr &MI, BuildFnTy &MatchInfo);
 
+  bool matchCombineFMinMaxNaN(MachineInstr &MI, FMinMaxNanMatchInfo &Info);
+  void applyCombineFMinMaxNaN(MachineInstr &MI, FMinMaxNanMatchInfo &Info);
+
 private:
   /// Given a non-indexed load or store instruction \p MI, find an offset that
   /// can be usefully and legally folded into it as a post-indexing operation.
   ///
   /// \returns true if a candidate is found.
   bool findPostIndexCandidate(MachineInstr &MI, Register &Addr, Register &Base,
                               Register &Offset);
 

llvm/include/llvm/Target/GlobalISel/Combine.td

 //           (fneg (fma (fpext x), (fpext y), z))
 def combine_fsub_fpext_fneg_fmul_to_fmad_or_fma: GICombineRule<
   (defs root:$root, build_fn_matchinfo:$info),
   (match (wip_match_opcode G_FSUB):$root,
          [{ return Helper.matchCombineFSubFpExtFNegFMulToFMadOrFMA(
                                             *${root}, ${info}); }]),
   (apply [{ Helper.applyBuildFn(*${root}, ${info}); }])>;
 
+def combine_minmax_nan_matchinfo: GIDefMatchData<"FMinMaxNanMatchInfo">;
+def combine_minmax_nan: GICombineRule<
+  (defs root:$root, combine_minmax_nan_matchinfo:$info),
+  (match (wip_match_opcode G_FMINNUM, G_FMAXNUM, G_FMINIMUM, G_FMAXIMUM):$root,
+         [{ return Helper.matchCombineFMinMaxNaN(*${root}, ${info}); }]),
+  (apply [{ Helper.applyCombineFMinMaxNaN(*${root}, ${info}); }])>;
+
 // FIXME: These should use the custom predicate feature once it lands.
 def undef_combines : GICombineGroup<[undef_to_fp_zero, undef_to_int_zero,
                                      undef_to_negative_one,
                                      binop_left_undef_to_zero,
                                      binop_right_undef_to_undef,
                                      propagate_undef_any_op,
                                      propagate_undef_all_ops,
                                      propagate_undef_shuffle_mask,
                                      erase_undef_store,
                                      unmerge_undef]>;
 
 def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
                                         binop_same_val, binop_left_to_zero,
                                         binop_right_to_zero, p2i_to_i2p,
                                         i2p_to_p2i, anyext_trunc_fold,
                                         fneg_fneg_fold, right_identity_one]>;
 
 def const_combines : GICombineGroup<[constant_fp_op, const_ptradd_to_i2p,
                                      overlapping_and, mulo_by_2, mulo_by_0,
-                                     addo_by_0]>;
+                                     addo_by_0, combine_minmax_nan]>;
 
 def known_bits_simplifications : GICombineGroup<[
   redundant_and, redundant_sext_inreg, redundant_or, urem_pow2_to_mask,
   zext_trunc_fold, icmp_to_true_false_known_bits, icmp_to_lhs_known_bits]>;
 
 def width_reduction_combines : GICombineGroup<[reduce_shl_of_extend,
                                                narrow_binop_feeding_and]>;
 

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

if (MaybeCstTrue && MaybeCstTrue->isZero()) {
     MatchInfo = [=](MachineIRBuilder &MIB) {
       MIB.buildAnd(DstReg, MIB.buildNot(OpTy, Cond), FalseReg);
     };
     return true;
   }
   return false;
 }
 
+bool CombinerHelper::matchCombineFMinMaxNaN(MachineInstr &MI,
+                                            FMinMaxNanMatchInfo &Info) {
+  switch (MI.getOpcode()) {
+  default:
+    return false;
+  case TargetOpcode::G_FMINNUM:
+  case TargetOpcode::G_FMAXNUM:
+    Info.PropogateNaN = false;
+    break;
+  case TargetOpcode::G_FMINIMUM:
+  case TargetOpcode::G_FMAXIMUM:
+    Info.PropogateNaN = true;
+    break;
+  }
+
+  auto MatchNaN = [&](unsigned Idx) {
+    Register MaybeNaNReg = MI.getOperand(Idx).getReg();
+    const ConstantFP *MaybeCst = getConstantFPVRegVal(MaybeNaNReg, MRI);
+    if (!MaybeCst || !MaybeCst->getValueAPF().isNaN())
+      return false;
+    Info.NaNIdx = Idx;
+    return true;
+  };
+  return MatchNaN(1) || MatchNaN(2);
+}
+
+void CombinerHelper::applyCombineFMinMaxNaN(MachineInstr &MI,
+                                            FMinMaxNanMatchInfo &Info) {
+  Register DstReg = MI.getOperand(0).getReg();
+  Register SrcReg = MI.getOperand(Info.getIdxToPropogate()).getReg();
+  MI.eraseFromParent();
+  replaceRegWith(MRI, DstReg, SrcReg);
+}
 
 bool CombinerHelper::tryCombine(MachineInstr &MI) {
   if (tryCombineCopy(MI))
     return true;
   if (tryCombineExtendingLoads(MI))
     return true;
   if (tryCombineIndexedLoadStore(MI))
     return true;
   return false;
 }

llvm/test/CodeGen/AArch64/GlobalISel/combine-fminimum-fmaximum.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name:            test_combine_nan_rhs_fminimum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fminimum_half
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH7C01
+    ; CHECK-NEXT: $h0 = COPY [[C]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMINIMUM %0, %1
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fminimum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fminimum_float
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMINIMUM %0, %1
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fminimum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fminimum_double
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    ; CHECK-NEXT: $x0 = COPY [[C]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMINIMUM %0, %1
+    $x0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fminimum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fminimum_half
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH7C01
+    ; CHECK-NEXT: $h0 = COPY [[C]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMINIMUM %1, %0
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fminimum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fminimum_float
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMINIMUM %1, %0
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fminimum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fminimum_double
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    ; CHECK-NEXT: $x0 = COPY [[C]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMINIMUM %1, %0
+    $x0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fmaximum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fmaximum_half
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH7C01
+    ; CHECK-NEXT: $h0 = COPY [[C]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMAXIMUM %0, %1
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fmaximum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fmaximum_float
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMAXIMUM %0, %1
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fmaximum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fmaximum_double
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    ; CHECK-NEXT: $x0 = COPY [[C]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMAXIMUM %0, %1
+    $x0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fmaximum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fmaximum_half
+    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH7C01
+    ; CHECK-NEXT: $h0 = COPY [[C]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMAXIMUM %1, %0
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fmaximum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fmaximum_float
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMAXIMUM %1, %0
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fmaximum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fmaximum_double
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    ; CHECK-NEXT: $x0 = COPY [[C]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMAXIMUM %1, %0
+    $x0 = COPY %2
+...

llvm/test/CodeGen/AArch64/GlobalISel/combine-fminnum-fmaxnum.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name:            test_combine_nan_rhs_fminnum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fminnum_half
+    ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+    ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMINNUM %0, %1
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fminnum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fminnum_float
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+    ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMINNUM %0, %1
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fminnum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fminnum_double
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+    ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMINNUM %0, %1
+    $x0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fminnum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fminnum_half
+    ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+    ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMINNUM %1, %0
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fminnum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fminnum_float
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+    ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMINNUM %1, %0
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fminnum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fminnum_double
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+    ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMINNUM %1, %0
+    $x0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fmaxnum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fmaxnum_half
+    ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+    ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMAXNUM %0, %1
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fmaxnum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fmaxnum_float
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+    ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMAXNUM %0, %1
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_rhs_fmaxnum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_rhs_fmaxnum_double
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+    ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMAXNUM %0, %1
+    $x0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fmaxnum_half
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fmaxnum_half
+    ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+    ; CHECK-NEXT: $h0 = COPY [[COPY]](s16)
+    %0:_(s16) = COPY $h0
+    %1:_(s16) = G_FCONSTANT half 0xH7C01
+    %2:_(s16) = G_FMAXNUM %1, %0
+    $h0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fmaxnum_float
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fmaxnum_float
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+    ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_FCONSTANT float 0x7FF8000000000000
+    %2:_(s32) = G_FMAXNUM %1, %0
+    $w0 = COPY %2
+...
+---
+name:            test_combine_nan_lhs_fmaxnum_double
+body:             |
+  bb.1:
+  liveins:
+    ; CHECK-LABEL: name: test_combine_nan_lhs_fmaxnum_double
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+    ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
+    %0:_(s64) = COPY $x0
+    %1:_(s64) = G_FCONSTANT double 0x7FF8000000000000
+    %2:_(s64) = G_FMAXNUM %1, %0
+    $x0 = COPY %2
+...