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Differential D123292

[RISCV][NFC] Use defvar to simplify pattern definations.
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Authored by jacquesguan on Apr 7 2022, 1:55 AM.

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craig.topper
frasercrmck
asb
benshi001
Commits
rGa55c19c44b27: [RISCV][NFC] Use defvar to simplify pattern definations.

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jacquesguan created this revision.Apr 7 2022, 1:55 AM
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jacquesguan requested review of this revision.Apr 7 2022, 1:55 AM
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frasercrmck accepted this revision.Apr 7 2022, 2:11 AM

LGTM, nice cleanup, thanks

llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
355

could maybe be one line if it's less than 80 cols? (here and below)

This revision is now accepted and ready to land.Apr 7 2022, 2:11 AM
Harbormaster completed remote builds in B158429: Diff 421131.Apr 7 2022, 2:32 AM
jacquesguan updated this revision to Diff 421151.Apr 7 2022, 3:53 AM

Address comment.

Harbormaster completed remote builds in B158443: Diff 421151.Apr 7 2022, 4:55 AM
This revision was landed with ongoing or failed builds.Apr 7 2022, 7:54 PM
Closed by commit rGa55c19c44b27: [RISCV][NFC] Use defvar to simplify pattern definations. (authored by jacquesguan). · Explain Why
This revision was automatically updated to reflect the committed changes.
jacquesguan added a commit: rGa55c19c44b27: [RISCV][NFC] Use defvar to simplify pattern definations..

Revision Contents

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llvm/
lib/
Target/
RISCV/
166 lines

Diff 421390

llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td

Show First 20 Lines • Show All 335 Lines • ▼ Show 20 Lines foreach vtiToWti = AllWidenableIntToFloatVectors in {
def : Pat<(vti.Vector (vop (fwti.Vector fwti.RegClass:$rs1))), def : Pat<(vti.Vector (vop (fwti.Vector fwti.RegClass:$rs1))),
(!cast<Instruction>(instruction_name#"_"#vti.LMul.MX) (!cast<Instruction>(instruction_name#"_"#vti.LMul.MX)
fwti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>; fwti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
} }
} }
multiclass VPatWidenBinarySDNode_VV_VX<SDNode op, PatFrags extop1, PatFrags extop2, multiclass VPatWidenBinarySDNode_VV_VX<SDNode op, PatFrags extop1, PatFrags extop2,
string instruction_name> { string instruction_name> {
foreach vti = AllWidenableIntVectors in { foreach vtiToWti = AllWidenableIntVectors in {
def : Pat<(op (vti.Wti.Vector (extop1 (vti.Vti.Vector vti.Vti.RegClass:$rs2))), defvar vti = vtiToWti.Vti;
(vti.Wti.Vector (extop2 (vti.Vti.Vector vti.Vti.RegClass:$rs1)))), defvar wti = vtiToWti.Wti;
(!cast<Instruction>(instruction_name#"_VV_"#vti.Vti.LMul.MX) def : Pat<(op (wti.Vector (extop1 (vti.Vector vti.RegClass:$rs2))),
vti.Vti.RegClass:$rs2, vti.Vti.RegClass:$rs1, (wti.Vector (extop2 (vti.Vector vti.RegClass:$rs1)))),
vti.Vti.AVL, vti.Vti.Log2SEW)>; (!cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX)
def : Pat<(op (vti.Wti.Vector (extop1 (vti.Vti.Vector vti.Vti.RegClass:$rs2))), vti.RegClass:$rs2, vti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
(vti.Wti.Vector (extop2 (vti.Vti.Vector (SplatPat GPR:$rs1))))), def : Pat<(op (wti.Vector (extop1 (vti.Vector vti.RegClass:$rs2))),
(!cast<Instruction>(instruction_name#"_VX_"#vti.Vti.LMul.MX) (wti.Vector (extop2 (vti.Vector (SplatPat GPR:$rs1))))),
vti.Vti.RegClass:$rs2, GPR:$rs1, (!cast<Instruction>(instruction_name#"_VX_"#vti.LMul.MX)
vti.Vti.AVL, vti.Vti.Log2SEW)>; vti.RegClass:$rs2, GPR:$rs1, vti.AVL, vti.Log2SEW)>;
} }
frasercrmckUnsubmitted
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could maybe be one line if it's less than 80 cols? (here and below)

frasercrmck: could maybe be one line if it's less than 80 cols? (here and below)
} }
multiclass VPatWidenBinarySDNode_WV_WX<SDNode op, PatFrags extop, multiclass VPatWidenBinarySDNode_WV_WX<SDNode op, PatFrags extop,
string instruction_name> { string instruction_name> {
foreach vti = AllWidenableIntVectors in { foreach vtiToWti = AllWidenableIntVectors in {
def : Pat<(op (vti.Wti.Vector vti.Wti.RegClass:$rs2), defvar vti = vtiToWti.Vti;
(vti.Wti.Vector (extop (vti.Vti.Vector vti.Vti.RegClass:$rs1)))), defvar wti = vtiToWti.Wti;
(!cast<Instruction>(instruction_name#"_WV_"#vti.Vti.LMul.MX) def : Pat<(op (wti.Vector wti.RegClass:$rs2),
vti.Wti.RegClass:$rs2, vti.Vti.RegClass:$rs1, (wti.Vector (extop (vti.Vector vti.RegClass:$rs1)))),
vti.Vti.AVL, vti.Vti.Log2SEW)>; (!cast<Instruction>(instruction_name#"_WV_"#vti.LMul.MX)
def : Pat<(op (vti.Wti.Vector vti.Wti.RegClass:$rs2), wti.RegClass:$rs2, vti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
(vti.Wti.Vector (extop (vti.Vti.Vector (SplatPat GPR:$rs1))))), def : Pat<(op (wti.Vector wti.RegClass:$rs2),
(!cast<Instruction>(instruction_name#"_WX_"#vti.Vti.LMul.MX) (wti.Vector (extop (vti.Vector (SplatPat GPR:$rs1))))),
vti.Wti.RegClass:$rs2, GPR:$rs1, (!cast<Instruction>(instruction_name#"_WX_"#vti.LMul.MX)
vti.Vti.AVL, vti.Vti.Log2SEW)>; wti.RegClass:$rs2, GPR:$rs1, vti.AVL, vti.Log2SEW)>;
} }
} }
multiclass VPatWidenBinarySDNode_VV_VX_WV_WX<SDNode op, PatFrags extop, multiclass VPatWidenBinarySDNode_VV_VX_WV_WX<SDNode op, PatFrags extop,
string instruction_name> { string instruction_name> {
defm : VPatWidenBinarySDNode_VV_VX<op, extop, extop, instruction_name>; defm : VPatWidenBinarySDNode_VV_VX<op, extop, extop, instruction_name>;
defm : VPatWidenBinarySDNode_WV_WX<op, extop, instruction_name>; defm : VPatWidenBinarySDNode_WV_WX<op, extop, instruction_name>;
} }
multiclass VPatWidenMulAddSDNode_VV<PatFrags extop1, PatFrags extop2, string instruction_name> { multiclass VPatWidenMulAddSDNode_VV<PatFrags extop1, PatFrags extop2, string instruction_name> {
foreach vti = AllWidenableIntVectors in { foreach vtiToWti = AllWidenableIntVectors in {
defvar vti = vtiToWti.Vti;
defvar wti = vtiToWti.Wti;
def : Pat< def : Pat<
(add (vti.Wti.Vector vti.Wti.RegClass:$rd), (add (wti.Vector wti.RegClass:$rd),
(mul_oneuse (vti.Wti.Vector (extop1 (vti.Vti.Vector vti.Vti.RegClass:$rs1))), (mul_oneuse (wti.Vector (extop1 (vti.Vector vti.RegClass:$rs1))),
(vti.Wti.Vector (extop2 (vti.Vti.Vector vti.Vti.RegClass:$rs2))))), (wti.Vector (extop2 (vti.Vector vti.RegClass:$rs2))))),
(!cast<Instruction>(instruction_name#"_VV_"#vti.Vti.LMul.MX) (!cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX)
vti.Wti.RegClass:$rd, vti.Vti.RegClass:$rs1, vti.Vti.RegClass:$rs2, wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
vti.Vti.AVL, vti.Vti.Log2SEW, TAIL_AGNOSTIC vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC
)>; )>;
} }
} }
multiclass VPatWidenMulAddSDNode_VX<PatFrags extop1, PatFrags extop2, string instruction_name> { multiclass VPatWidenMulAddSDNode_VX<PatFrags extop1, PatFrags extop2, string instruction_name> {
foreach vti = AllWidenableIntVectors in { foreach vtiToWti = AllWidenableIntVectors in {
defvar vti = vtiToWti.Vti;
defvar wti = vtiToWti.Wti;
def : Pat< def : Pat<
(add (vti.Wti.Vector vti.Wti.RegClass:$rd), (add (wti.Vector wti.RegClass:$rd),
(mul_oneuse (vti.Wti.Vector (extop1 (vti.Vti.Vector (SplatPat GPR:$rs1)))), (mul_oneuse (wti.Vector (extop1 (vti.Vector (SplatPat GPR:$rs1)))),
(vti.Wti.Vector (extop2 (vti.Vti.Vector vti.Vti.RegClass:$rs2))))), (wti.Vector (extop2 (vti.Vector vti.RegClass:$rs2))))),
(!cast<Instruction>(instruction_name#"_VX_"#vti.Vti.LMul.MX) (!cast<Instruction>(instruction_name#"_VX_"#vti.LMul.MX)
vti.Wti.RegClass:$rd, GPR:$rs1, vti.Vti.RegClass:$rs2, wti.RegClass:$rd, GPR:$rs1, vti.RegClass:$rs2,
vti.Vti.AVL, vti.Vti.Log2SEW, TAIL_AGNOSTIC vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC
)>; )>;
} }
} }
multiclass VPatWidenBinaryFPSDNode_VV_VF<SDNode op, string instruction_name> { multiclass VPatWidenBinaryFPSDNode_VV_VF<SDNode op, string instruction_name> {
foreach vti = AllWidenableFloatVectors in { foreach vtiToWti = AllWidenableFloatVectors in {
def : Pat<(op (vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs2))), defvar vti = vtiToWti.Vti;
(vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs1)))), defvar wti = vtiToWti.Wti;
(!cast<Instruction>(instruction_name#"_VV_"#vti.Vti.LMul.MX) def : Pat<(op (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs2))),
vti.Vti.RegClass:$rs2, vti.Vti.RegClass:$rs1, (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs1)))),
vti.Vti.AVL, vti.Vti.Log2SEW)>; (!cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX)
def : Pat<(op (vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs2))), vti.RegClass:$rs2, vti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
(vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector (SplatFPOp vti.Vti.ScalarRegClass:$rs1))))), def : Pat<(op (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs2))),
(!cast<Instruction>(instruction_name#"_V"#vti.Vti.ScalarSuffix#"_"#vti.Vti.LMul.MX) (wti.Vector (fpext_oneuse (vti.Vector (SplatFPOp vti.ScalarRegClass:$rs1))))),
vti.Vti.RegClass:$rs2, vti.Vti.ScalarRegClass:$rs1, (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
vti.Vti.AVL, vti.Vti.Log2SEW)>; vti.RegClass:$rs2, vti.ScalarRegClass:$rs1, vti.AVL, vti.Log2SEW)>;
def : Pat<(op (vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs2))), def : Pat<(op (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs2))),
(vti.Wti.Vector (SplatFPOp (fpext_oneuse vti.Vti.ScalarRegClass:$rs1)))), (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)))),
(!cast<Instruction>(instruction_name#"_V"#vti.Vti.ScalarSuffix#"_"#vti.Vti.LMul.MX) (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
vti.Vti.RegClass:$rs2, vti.Vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.ScalarRegClass:$rs1, vti.AVL, vti.Log2SEW)>;
vti.Vti.AVL, vti.Vti.Log2SEW)>;
} }
} }
multiclass VPatWidenBinaryFPSDNode_WV_WF<SDNode op, string instruction_name> { multiclass VPatWidenBinaryFPSDNode_WV_WF<SDNode op, string instruction_name> {
foreach vti = AllWidenableFloatVectors in { foreach vtiToWti = AllWidenableFloatVectors in {
def : Pat<(op (vti.Wti.Vector vti.Wti.RegClass:$rs2), defvar vti = vtiToWti.Vti;
(vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs1)))), defvar wti = vtiToWti.Wti;
(!cast<Instruction>(instruction_name#"_WV_"#vti.Vti.LMul.MX) def : Pat<(op (wti.Vector wti.RegClass:$rs2),
vti.Wti.RegClass:$rs2, vti.Vti.RegClass:$rs1, (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs1)))),
vti.Vti.AVL, vti.Vti.Log2SEW)>; (!cast<Instruction>(instruction_name#"_WV_"#vti.LMul.MX)
def : Pat<(op (vti.Wti.Vector vti.Wti.RegClass:$rs2), wti.RegClass:$rs2, vti.RegClass:$rs1, vti.AVL, vti.Log2SEW)>;
(vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector (SplatFPOp vti.Vti.ScalarRegClass:$rs1))))), def : Pat<(op (wti.Vector wti.RegClass:$rs2),
(!cast<Instruction>(instruction_name#"_W"#vti.Vti.ScalarSuffix#"_"#vti.Vti.LMul.MX) (wti.Vector (fpext_oneuse (vti.Vector (SplatFPOp vti.ScalarRegClass:$rs1))))),
vti.Wti.RegClass:$rs2, vti.Vti.ScalarRegClass:$rs1, (!cast<Instruction>(instruction_name#"_W"#vti.ScalarSuffix#"_"#vti.LMul.MX)
vti.Vti.AVL, vti.Vti.Log2SEW)>; wti.RegClass:$rs2, vti.ScalarRegClass:$rs1, vti.AVL, vti.Log2SEW)>;
def : Pat<(op (vti.Wti.Vector vti.Wti.RegClass:$rs2), def : Pat<(op (wti.Vector wti.RegClass:$rs2),
(vti.Wti.Vector (SplatFPOp (fpext_oneuse vti.Vti.ScalarRegClass:$rs1)))), (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)))),
(!cast<Instruction>(instruction_name#"_W"#vti.Vti.ScalarSuffix#"_"#vti.Vti.LMul.MX) (!cast<Instruction>(instruction_name#"_W"#vti.ScalarSuffix#"_"#vti.LMul.MX)
vti.Wti.RegClass:$rs2, vti.Vti.ScalarRegClass:$rs1, wti.RegClass:$rs2, vti.ScalarRegClass:$rs1, vti.AVL, vti.Log2SEW)>;
vti.Vti.AVL, vti.Vti.Log2SEW)>;
} }
} }
multiclass VPatWidenBinaryFPSDNode_VV_VF_WV_WF<SDNode op, string instruction_name> { multiclass VPatWidenBinaryFPSDNode_VV_VF_WV_WF<SDNode op, string instruction_name> {
defm : VPatWidenBinaryFPSDNode_VV_VF<op, instruction_name>; defm : VPatWidenBinaryFPSDNode_VV_VF<op, instruction_name>;
defm : VPatWidenBinaryFPSDNode_WV_WF<op, instruction_name>; defm : VPatWidenBinaryFPSDNode_WV_WF<op, instruction_name>;
} }
multiclass VPatWidenFPMulAccSDNode_VV_VF<string instruction_name> { multiclass VPatWidenFPMulAccSDNode_VV_VF<string instruction_name> {
foreach vti = AllWidenableFloatVectors in { foreach vtiToWti = AllWidenableFloatVectors in {
def : Pat<(fma (vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs1))), defvar vti = vtiToWti.Vti;
(vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs2))), defvar wti = vtiToWti.Wti;
(vti.Wti.Vector vti.Wti.RegClass:$rd)), def : Pat<(fma (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs1))),
(!cast<Instruction>(instruction_name#"_VV_"#vti.Vti.LMul.MX) (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs2))),
vti.Wti.RegClass:$rd, vti.Vti.RegClass:$rs1, vti.Vti.RegClass:$rs2, (wti.Vector wti.RegClass:$rd)),
vti.Vti.AVL, vti.Vti.Log2SEW, TAIL_AGNOSTIC)>; (!cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX)
def : Pat<(fma (vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector (SplatFPOp vti.Vti.ScalarRegClass:$rs1)))), wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
(vti.Wti.Vector (fpext_oneuse (vti.Vti.Vector vti.Vti.RegClass:$rs2))), vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>;
(vti.Wti.Vector vti.Wti.RegClass:$rd)), def : Pat<(fma (wti.Vector (fpext_oneuse (vti.Vector (SplatFPOp vti.ScalarRegClass:$rs1)))),
(!cast<Instruction>(instruction_name#"_V"#vti.Vti.ScalarSuffix#"_"#vti.Vti.LMul.MX) (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs2))),
vti.Wti.RegClass:$rd, vti.Vti.ScalarRegClass:$rs1, vti.Vti.RegClass:$rs2, (wti.Vector wti.RegClass:$rd)),
vti.Vti.AVL, vti.Vti.Log2SEW, TAIL_AGNOSTIC)>; (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>;
} }
} }
multiclass VPatWidenFPNegMulAccSDNode_VV_VF<string instruction_name> { multiclass VPatWidenFPNegMulAccSDNode_VV_VF<string instruction_name> {
foreach vtiToWti = AllWidenableFloatVectors in { foreach vtiToWti = AllWidenableFloatVectors in {
defvar vti = vtiToWti.Vti; defvar vti = vtiToWti.Vti;
defvar wti = vtiToWti.Wti; defvar wti = vtiToWti.Wti;
def : Pat<(fma (fneg (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs1)))), def : Pat<(fma (fneg (wti.Vector (fpext_oneuse (vti.Vector vti.RegClass:$rs1)))),
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