[XCOFF] support writing sections, relocations and symbols for XCOFF64.

[Esme]

Summary

This is the second patch to enable the XCOFF64 object writer.

[jhenderson]

My only real comment on this is patch ordering. An XCOFF/AIX person should review too.

llvm/lib/MC/XCOFFObjectWriter.cpp

749

The non-zero value plus "not supported yet" comment doesn't quite work. Perhaps "Only source file symbol supported"?

808–809

I'd have thought implementing the symbol table before relocations makes more sense.

847–850

Same comment as above: support the symtab first?

[Esme]

Thanks for your comments! @jhenderson
It seems inappropriate to support the symbol table before the sections and relocations, due to their offset order, or some other reasons. So I enabled all these fields in this patch and also modified related test cases.

[DiggerLin]

llvm/lib/MC/XCOFFObjectWriter.cpp

196

I do not think we will change ".file" . change to const StringRef SourceFileName = ".file" ?

751

SymbolTableEntryCount+1 for ".file" symbol.

808–809

agree with James

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

82

I am not sure, whether I understand correct or not ?

1. fixup_ppc_half16ds: A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for instrs like 'std'.
2. fixup_ppc_half16dq: A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for instrs like 'lxv'.
3. fixup_ppc_half16 : A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like 'li' or 'addis'.

in the https://www.ibm.com/docs/en/aix/7.2?topic=formats-xcoff-object-file-format#XCOFF__sua3i125jbau
r_rsize: 0x3F(6 bits)
Specifies the bit length of the relocatable reference minus one. The current architecture allows for fields of up to 32 bits (XCOFF32) or 64 bits (XCOFF64) to be relocated.

so for the
case PPC::fixup_ppc_half16ds:

{XCOFF::RelocationType::R_TOC, EncodedSignednessIndicator | 13 }

[Esme]

Addressed @DiggerLin 's comments.

llvm/lib/MC/XCOFFObjectWriter.cpp

196

If the file auxiliary entry is not used, the symbol name is the name of the source file. If the file auxiliary entry is used, then the symbol name should be .file, and the first file auxiliary entry (by convention) contains the source file name.

Our current approach is to write a symbol without the auxiliary entry, with .file as the source file's name, but in fact we should write a symbol with the real source file's name. And we commented a todo for this.

// FIXME: add the real source file's name.

So I think the SourceFileName may be changed.

751

void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
  // The first symbol table entry (at index 0) is for the file name.
  uint32_t SymbolTableIndex = 1;
...
  SymbolTableEntryCount = SymbolTableIndex;
}

The ".file" symbol has been counted.

808–809

Thanks, since it's hard to separate the symbol table and relocation into 2 patches, I prefer to enable both of them in this patch.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

82

Thanks for your catch!

[jhenderson]

Nothing much else to add apart from a stylistic comment.

llvm/test/CodeGen/PowerPC/aix-extern-weak.ll

2–3 ↗

(On Diff #419044)

I have a personal preference for this syntax: from the first line, it makes it clear that the next line is a new command, whilst from the second line, the indentation followed by an executable name makes it clear that this is a continuation of the previous line.

Same applies elsewhere.

[Esme]

Improved the format of run lines in tests.

[DiggerLin]

llvm/lib/MC/XCOFFObjectWriter.cpp

196

thanks.

713

maybe this is more readable , even there is duplication code of writeWord(NumberOfRelocEnt);

if (!is64Bit()) {
     W.OS.write_zeros(4); // Reserved
     writeWord(NumberOfRelocEnt);
     W.OS.write_zeros(6); // Reserved
  else {
     writeWord(NumberOfRelocEnt);
     W.OS.write_zeros(1); // Reserved
     W.write<uint8_t>(XCOFF::AUX_SECT);
  }

751

thanks.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

82

PPC::fixup_ppc_half16dq: is a A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for instrs like 'lxv'.
for PPC::fixup_ppc_half16dq
it should be
{XCOFF::RelocationType::R_TOC, EncodedSignednessIndicator | 15 } ?

[DiggerLin]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

82

I am not a expert on the relocation, I just put my question and we may be need someone who is expert on the relocation to review the code.

[Esme]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

82

/// A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for
/// instrs like 'lxv'. Produces the same relocation as fixup_ppc_half16ds.
PPC::fixup_ppc_half16dq

Thanks, I thinks I need more investigation about this, the comment says it produces the same relocation as fixup_ppc_half16ds.

[Esme]

Hi @DiggerLin, Sorry for the late update, I have verified that the SignAndSize value should be 15 for both fixup_ppc_half16ds and fixup_ppc_half16dq. Although there are zeros being implied, the totally size should be a 16-bit fixup. I confirmed this by testing LIT and test-suite, and the test-suite passes only if the value is 15, otherwise there will be an error like this

Relocation overflow in reference to: L..CPI168_7 (entry 3199)
        Address: 0x00082c12; RLD type: R_TOC; RLD length: 14

[jhenderson]

llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll

4–10

FWIW, I'd actually keep the old style here, as it makes it clear which commands the options apply to, whilst still indicating FileCheck is a continuation. Same applies in similar cases.

[shchenz]

Looks almost good to me. Thanks for adding this support.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

74

Is it possible to add some tests to verify the new relocation types added here for 64-bit objects, especially the ones the existing case changes do not contain?

82

Hmm, yes, I also think this is a little confuse. From 64bit OpenPower ABI, section 3.5.1, it says:

In the following figure, half16ds is similar to half16, but is really just 14 bits because the two least significant bits must be zero and are not really part of the field. (Used by, for example, the ldu instruction.) In addition to the use of this relocation field with the DS forms, half16ds relocations are also used in conjunction with DQ forms. In those instances, the linker and assembler collaborate to create valid DQ forms. They raise an error if the specified offset does not meet the constraints of a valid DQ instruction form displacement.

I think it clearly indicates that fixup_ppc_half16ds and fixup_ppc_half16dq should use same relocation infos.

For the bit length, it does not give a clear answer, it says is similar to half16, but is really just 14 bits. I checked the source code of commercial XLC, it gives 15. So I think it should be good to use 15 here.

84

Should we handle RelocationType::R_TOCU? I guess it may be generated in large code model(-mcmodel=large).

llvm/test/CodeGen/PowerPC/aix-extern-weak.ll

351 ↗

(On Diff #423334)

Use relative index like above Index: [[#Index+25]]?

llvm/test/CodeGen/PowerPC/aix-extern.ll

480 ↗

(On Diff #423334)

Same here.

[Esme]

Addressed comments and improved tests.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

84

fixup_ppc_half16ds and fixup_ppc_half16dq may only correspond to lo16 of instrs, not ha16, so we shouldn't deal with RelocationType::R_TOCU here.

I have added the corresponding large code model test in llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll.

[Esme]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

74

Tests in ppc64-abs-reloc.s, aix-xcoff-reloc.ll, aix-xcoff-reloc-large.ll etc. cover the new relocation types.

[shchenz]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

84

Yes, right. When large code model is in effect, the higher 16 bit is relocated by addis which will not use fixup kind fixup_ppc_half16dq or fixup_ppc_half16ds

llvm/test/CodeGen/PowerPC/aix-available-externally-linkage.ll

50 ↗

(On Diff #425411)

Except this field Auxiliary Type, all other fields for the symbol table are the same with XCOFF32, should we reuse them? I prefer to reuse them as we can get a better view about the difference between XCOFF32/XCOFF64.

And many others test files too.

llvm/test/MC/PowerPC/ppc64-abs-reloc.s

4 ↗

(On Diff #425411)

triple should be 64 bit.

27 ↗

(On Diff #425411)

Exactly the same with above checks, can we reuse?

[DiggerLin]

llvm/lib/MC/XCOFFObjectWriter.cpp

713

I think we also need a test case for dwarf 64 too.

[Esme]

1. Simplify tests.
2. Test dwarf64.

[shchenz]

LGTM! Thanks for adding this amazing support.

Maybe we can wait for some days in case @DiggerLin or @jhenderson has some further comments.

[jhenderson]

Actually, according to the pre-merge checks, one of the tests is failing, and I suspect it might be related to this patch?

[Esme]

Rebase.
Clean the failure in test llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll.

llvm/lib/MC/XCOFFObjectWriter.cpp

 };
 
 class XCOFFObjectWriter : public MCObjectWriter {
 
   uint32_t SymbolTableEntryCount = 0;
   uint64_t SymbolTableOffset = 0;
   uint16_t SectionCount = 0;
   uint64_t RelocationEntryOffset = 0;
+  StringRef SourceFileName = ".file";
 
   support::endian::Writer W;
   std::unique_ptr<MCXCOFFObjectTargetWriter> TargetObjectWriter;
   StringTableBuilder Strings;
 
   const uint64_t MaxRawDataSize =
       TargetObjectWriter->is64Bit() ? UINT64_MAX : UINT32_MAX;
 
class XCOFFObjectWriter : public MCObjectWriter {
   void executePostLayoutBinding(MCAssembler &, const MCAsmLayout &) override;
 
   void recordRelocation(MCAssembler &, const MCAsmLayout &, const MCFragment *,
                         const MCFixup &, MCValue, uint64_t &) override;
 
   uint64_t writeObject(MCAssembler &, const MCAsmLayout &) override;
 
   bool is64Bit() const { return TargetObjectWriter->is64Bit(); }
-  static bool nameShouldBeInStringTable(const StringRef &);
+  bool nameShouldBeInStringTable(const StringRef &);
   void writeSymbolName(const StringRef &);
 
   void writeSymbolEntryForCsectMemberLabel(const Symbol &SymbolRef,
                                            const XCOFFSection &CSectionRef,
                                            int16_t SectionIndex,
                                            uint64_t SymbolOffset);
   void writeSymbolEntryForControlSection(const XCOFFSection &CSectionRef,
                                          int16_t SectionIndex,
                                          XCOFF::StorageClass StorageClass);
   void writeSymbolEntryForDwarfSection(const XCOFFSection &DwarfSectionRef,
                                        int16_t SectionIndex);
   void writeFileHeader();
   void writeSectionHeaderTable();
   void writeSections(const MCAssembler &Asm, const MCAsmLayout &Layout);
   void writeSectionForControlSectionEntry(const MCAssembler &Asm,
                                           const MCAsmLayout &Layout,
                                           const CsectSectionEntry &CsectEntry,
-                                          uint32_t &CurrentAddressLocation);
+                                          uint64_t &CurrentAddressLocation);
   void writeSectionForDwarfSectionEntry(const MCAssembler &Asm,
                                         const MCAsmLayout &Layout,
                                         const DwarfSectionEntry &DwarfEntry,
-                                        uint32_t &CurrentAddressLocation);
+                                        uint64_t &CurrentAddressLocation);
   void writeSymbolTable(const MCAsmLayout &Layout);
   void writeSymbolAuxDwarfEntry(uint32_t LengthOfSectionPortion,
                                 uint32_t NumberOfRelocEnt = 0);
   void writeSymbolAuxCsectEntry(uint32_t SectionOrLength,
                                 uint8_t SymbolAlignmentAndType,
                                 uint8_t StorageMappingClass);
   void writeSymbolEntry(StringRef SymbolName, uint32_t Value,
                         int16_t SectionNumber, uint16_t SymbolType,
for (const MCSymbol &S : Asm.symbols()) {
     Csect->Syms.emplace_back(XSym);
 
     // If the name does not fit in the storage provided in the symbol table
     // entry, add it to the string table.
     if (nameShouldBeInStringTable(XSym->getSymbolTableName()))
       Strings.add(XSym->getSymbolTableName());
   }
 
+  // The first symbol entry is for the source file's name.
+  if (nameShouldBeInStringTable(SourceFileName))
+    Strings.add(SourceFileName);
+
   Strings.finalize();
   assignAddressesAndIndices(Layout);
 }
 
 void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
                                          const MCAsmLayout &Layout,
                                          const MCFragment *Fragment,
                                          const MCFixup &Fixup, MCValue Target,
void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
   SectionMap[RelocationSec]->Relocations.push_back(RelocB);
   // We already folded "SymbolA + imm64" above when Type is R_POS for SymbolA,
   // now we just need to fold "- SymbolB" here.
   FixedValue -= getVirtualAddress(SymB, SymBSec);
 }
 
 void XCOFFObjectWriter::writeSections(const MCAssembler &Asm,
                                       const MCAsmLayout &Layout) {
-  assert(!is64Bit() && "Writing 64-bit sections is not yet supported.");
-  uint32_t CurrentAddressLocation = 0;
+  uint64_t CurrentAddressLocation = 0;
   for (const auto *Section : Sections)
     writeSectionForControlSectionEntry(Asm, Layout, *Section,
                                        CurrentAddressLocation);
   for (const auto &DwarfSection : DwarfSections)
     writeSectionForDwarfSectionEntry(Asm, Layout, DwarfSection,
                                      CurrentAddressLocation);
 }
 
 uint64_t XCOFFObjectWriter::writeObject(MCAssembler &Asm,
                                         const MCAsmLayout &Layout) {
   // We always emit a timestamp of 0 for reproducibility, so ensure incremental
   // linking is not enabled, in case, like with Windows COFF, such a timestamp
   // is incompatible with incremental linking of XCOFF.
   if (Asm.isIncrementalLinkerCompatible())
     report_fatal_error("Incremental linking not supported for XCOFF.");
 
   finalizeSectionInfo();
   uint64_t StartOffset = W.OS.tell();
 
   writeFileHeader();
   writeSectionHeaderTable();
-
-  if (!is64Bit()) {
-    writeSections(Asm, Layout);
-    writeRelocations();
-
-    writeSymbolTable(Layout);
-    // Write the string table.
-    Strings.write(W.OS);
-  }
 
   return W.OS.tell() - StartOffset;
 }
 
 bool XCOFFObjectWriter::nameShouldBeInStringTable(const StringRef &SymbolName) {
-  return SymbolName.size() > XCOFF::NameSize;
+  return SymbolName.size() > XCOFF::NameSize || is64Bit();
 }
 
 void XCOFFObjectWriter::writeSymbolName(const StringRef &SymbolName) {
   // Magic, Offset or SymbolName.
   if (nameShouldBeInStringTable(SymbolName)) {
     W.write<int32_t>(0);
     W.write<uint32_t>(Strings.getOffset(SymbolName));
   } else {
     char Name[XCOFF::NameSize + 1];
     std::strncpy(Name, SymbolName.data(), XCOFF::NameSize);
     ArrayRef<char> NameRef(Name, XCOFF::NameSize);
     W.write(NameRef);
   }
 }
 
 void XCOFFObjectWriter::writeSymbolEntry(StringRef SymbolName, uint32_t Value,
                                          int16_t SectionNumber,
                                          uint16_t SymbolType,
                                          uint8_t StorageClass,
                                          uint8_t NumberOfAuxEntries) {
+  if (is64Bit()) {
+    W.write<uint64_t>(Value);
+    W.write<uint32_t>(Strings.getOffset(SymbolName));
+  } else {
     writeSymbolName(SymbolName);
     W.write<uint32_t>(Value);
+  }
   W.write<int16_t>(SectionNumber);
   // Basic/Derived type. See the description of the n_type field for symbol
   // table entries for a detailed description. Since we don't yet support
   // visibility, and all other bits are either optionally set or reserved, this
   // is always zero.
   // TODO FIXME How to assert a symbol's visibilty is default?
   // TODO Set the function indicator (bit 10, 0x0020) for functions
   // when debugging is enabled.

 
 void XCOFFObjectWriter::writeSymbolEntryForCsectMemberLabel(
     const Symbol &SymbolRef, const XCOFFSection &CSectionRef,
     int16_t SectionIndex, uint64_t SymbolOffset) {
   assert(SymbolOffset <= MaxRawDataSize - CSectionRef.Address &&
          "Symbol address overflowed.");
 
   writeSymbolEntry(SymbolRef.getSymbolTableName(),
                    CSectionRef.Address + SymbolOffset, SectionIndex,
                    /*SymbolType=*/0, SymbolRef.getStorageClass());
 
   writeSymbolAuxCsectEntry(CSectionRef.SymbolTableIndex, XCOFF::XTY_LD,
                            CSectionRef.MCSec->getMappingClass());
 }
 
 void XCOFFObjectWriter::writeSymbolEntryForDwarfSection(
     const XCOFFSection &DwarfSectionRef, int16_t SectionIndex) {
void XCOFFObjectWriter::writeFileHeader() {
   W.write<uint16_t>(is64Bit() ? XCOFF::XCOFF64 : XCOFF::XCOFF32);
   W.write<uint16_t>(SectionCount);
   W.write<int32_t>(0); // TimeStamp
   writeWord(SymbolTableOffset);
   if (is64Bit()) {
     W.write<uint16_t>(0); // AuxHeaderSize. No optional header for an object
                           // file that is not to be loaded.
     W.write<uint16_t>(0); // Flags
-    W.write<int32_t>(0);  // SymbolTableEntryCount. Not supported yet.
+    W.write<int32_t>(1);  // SymbolTableEntryCount. Not supported yet.
   } else {
     W.write<int32_t>(SymbolTableEntryCount);
     W.write<uint16_t>(0); // AuxHeaderSize. No optional header for an object
                           // file that is not to be loaded.
     W.write<uint16_t>(0); // Flags
   }
 }
 
 void XCOFFObjectWriter::writeSectionHeaderTable() {
   auto writeSectionHeader = [&](const SectionEntry *Sec, bool IsDwarf) {
auto writeSectionHeader = [&](const SectionEntry *Sec, bool IsDwarf) {
     writeWord(IsDwarf ? 0 : Sec->Address);
 
     writeWord(Sec->Size);
     writeWord(Sec->FileOffsetToData);
     writeWord(Sec->FileOffsetToRelocations);
     writeWord(0); // FileOffsetToLineNumberInfo. Not supported yet.
 
     if (is64Bit()) {
-      W.write<uint32_t>(0); // NumberOfRelocations. Not yet supported in 64-bit.
+      W.write<uint32_t>(Sec->RelocationCount);
       W.write<uint32_t>(0); // NumberOfLineNumbers. Not supported yet.
       W.write<int32_t>(Sec->Flags);
       W.OS.write_zeros(4);
     } else {
       W.write<uint16_t>(Sec->RelocationCount);
       W.write<uint16_t>(0); // NumberOfLineNumbers. Not supported yet.
       W.write<int32_t>(Sec->Flags);
     }
 
     return true;
   };
 
   for (const auto *CsectSec : Sections)
     writeSectionHeader(CsectSec, /* IsDwarf */ false);
   for (const auto &DwarfSec : DwarfSections)
     writeSectionHeader(&DwarfSec, /* IsDwarf */ true);
 }
 
 void XCOFFObjectWriter::writeRelocation(XCOFFRelocation Reloc,
                                         const XCOFFSection &Section) {
-  assert(!is64Bit() && "Writing 64-bit relocation is not yet supported.");
   if (Section.MCSec->isCsect())
-    W.write<uint32_t>(Section.Address + Reloc.FixupOffsetInCsect);
+    writeWord(Section.Address + Reloc.FixupOffsetInCsect);
   else {
     // DWARF sections' address is set to 0.
     assert(Section.MCSec->isDwarfSect() && "unsupport section type!");
-    W.write<uint32_t>(Reloc.FixupOffsetInCsect);
+    writeWord(Reloc.FixupOffsetInCsect);
   }
-  W.write<uint32_t>(Reloc.SymbolTableIndex);
+  // TODO SymbolTable for XCOFF64 is not yet supported.
+  W.write<uint32_t>(is64Bit() ? 0 : Reloc.SymbolTableIndex);
   W.write<uint8_t>(Reloc.SignAndSize);
   W.write<uint8_t>(Reloc.Type);
 }
 
 void XCOFFObjectWriter::writeRelocations() {
   for (const auto *Section : Sections) {
     if (Section->Index == SectionEntry::UninitializedIndex)
       // Nothing to write for this Section.
void XCOFFObjectWriter::writeRelocations() {
   }
 
   for (const auto &DwarfSection : DwarfSections)
     for (const auto &Reloc : DwarfSection.DwarfSect->Relocations)
       writeRelocation(Reloc, *DwarfSection.DwarfSect);
 }
 
 void XCOFFObjectWriter::writeSymbolTable(const MCAsmLayout &Layout) {
-  assert(!is64Bit() && "Writing 64-bit symbol table is not yet supported.");
   // Write symbol 0 as C_FILE.
-  // FIXME: support 64-bit C_FILE symbol.
   // The n_name of a C_FILE symbol is the source file's name when no auxiliary
   // entries are present. The source file's name is alternatively provided by an
   // auxiliary entry, in which case the n_name of the C_FILE symbol is `.file`.
   // FIXME: add the real source file's name.
-  writeSymbolEntry(".file", /*Value=*/0, XCOFF::ReservedSectionNum::N_DEBUG,
+  writeSymbolEntry(SourceFileName, /*Value=*/0,
+                   XCOFF::ReservedSectionNum::N_DEBUG,
                    /*SymbolType=*/0, XCOFF::C_FILE,
                    /*NumberOfAuxEntries=*/0);
 
+  // TODO Writing 64-bit symbol table is not yet supported. Only one entry is
+  // currently being written, in order to verify the functionality of
+  // 64-bit relocations.
+  if (is64Bit())
+    return;
+
   for (const auto &Csect : UndefinedCsects) {
     writeSymbolEntryForControlSection(Csect, XCOFF::ReservedSectionNum::N_UNDEF,
                                       Csect.MCSec->getStorageClass());
   }
 
   for (const auto *Section : Sections) {
     if (Section->Index == SectionEntry::UninitializedIndex)
       // Nothing to write for this Section.
if (Section->Index == SectionEntry::UninitializedIndex)
       continue;
 
     for (const auto *Group : Section->Groups) {
       if (Group->empty())
         continue;
 
       for (auto &Csect : *Group) {
         const size_t CsectRelocCount = Csect.Relocations.size();
-        if (CsectRelocCount >= XCOFF::RelocOverflow ||
-            Section->RelocationCount >= XCOFF::RelocOverflow - CsectRelocCount)
+        // An XCOFF64 file may not contain an overflow section header.
+        if (!is64Bit() && (CsectRelocCount >= XCOFF::RelocOverflow ||
+                           Section->RelocationCount >=
+                               XCOFF::RelocOverflow - CsectRelocCount))
           report_fatal_error(
               "relocation entries overflowed; overflow section is "
               "not implemented yet");
 
         Section->RelocationCount += CsectRelocCount;
       }
     }
   }
 
   for (auto &DwarfSection : DwarfSections)
     DwarfSection.RelocationCount = DwarfSection.DwarfSect->Relocations.size();
 
   // Calculate the file offset to the relocation entries.
   uint64_t RawPointer = RelocationEntryOffset;
   auto calcOffsetToRelocations = [&](SectionEntry *Sec, bool IsDwarf) {
     if (!IsDwarf && Sec->Index == SectionEntry::UninitializedIndex)
       return false;
 
     if (!Sec->RelocationCount)
       return false;
 
     Sec->FileOffsetToRelocations = RawPointer;
-    const uint32_t RelocationSizeInSec =
-        Sec->RelocationCount * XCOFF::RelocationSerializationSize32;
+    const uint64_t RelocationSizeInSec =
+        Sec->RelocationCount * (is64Bit()
+                                    ? XCOFF::RelocationSerializationSize64
+                                    : XCOFF::RelocationSerializationSize32);
     RawPointer += RelocationSizeInSec;
     if (RawPointer > MaxRawDataSize)
       report_fatal_error("Relocation data overflowed this object file.");
 
     return true;
   };
 
   for (auto *Sec : Sections)
for (auto &Csect : UndefinedCsects) {
     SymbolIndexMap[Csect.MCSec->getQualNameSymbol()] = Csect.SymbolTableIndex;
     // 1 main and 1 auxiliary symbol table entry for each contained symbol.
     SymbolTableIndex += 2;
   }
 
   // The address corrresponds to the address of sections and symbols in the
   // object file. We place the shared address 0 immediately after the
   // section header table.
-  uint32_t Address = 0;
+  uint64_t Address = 0;
   // Section indices are 1-based in XCOFF.
   int32_t SectionIndex = 1;
   bool HasTDataSection = false;
 
   for (auto *Section : Sections) {
     const bool IsEmpty =
         llvm::all_of(Section->Groups,
                      [](const CsectGroup *Group) { return Group->empty(); });
assert(RawPointer <= MaxRawDataSize &&
            "Section raw data overflowed this object file.");
   }
 
   RelocationEntryOffset = RawPointer;
 }
 
 void XCOFFObjectWriter::writeSectionForControlSectionEntry(
     const MCAssembler &Asm, const MCAsmLayout &Layout,
-    const CsectSectionEntry &CsectEntry, uint32_t &CurrentAddressLocation) {
+    const CsectSectionEntry &CsectEntry, uint64_t &CurrentAddressLocation) {
   // Nothing to write for this Section.
   if (CsectEntry.Index == SectionEntry::UninitializedIndex)
     return;
 
   // There could be a gap (without corresponding zero padding) between
   // sections.
   // There could be a gap (without corresponding zero padding) between
   // sections.
for (const auto &Csect : *Group) {
         Asm.writeSectionData(W.OS, Csect.MCSec, Layout);
       CurrentAddressLocation = Csect.Address + Csect.Size;
     }
   }
 
   // The size of the tail padding in a section is the end virtual address of
   // the current section minus the the end virtual address of the last csect
   // in that section.
-  if (uint32_t PaddingSize =
+  if (uint64_t PaddingSize =
           CsectEntry.Address + CsectEntry.Size - CurrentAddressLocation) {
     W.OS.write_zeros(PaddingSize);
     CurrentAddressLocation += PaddingSize;
   }
 }
 
 void XCOFFObjectWriter::writeSectionForDwarfSectionEntry(
     const MCAssembler &Asm, const MCAsmLayout &Layout,
-    const DwarfSectionEntry &DwarfEntry, uint32_t &CurrentAddressLocation) {
+    const DwarfSectionEntry &DwarfEntry, uint64_t &CurrentAddressLocation) {
   // There could be a gap (without corresponding zero padding) between
   // sections. For example DWARF section alignment is bigger than
   // DefaultSectionAlign.
   assert(CurrentAddressLocation <= DwarfEntry.Address &&
          "CurrentAddressLocation should be less than or equal to section "
          "address.");
 
-  if (uint32_t PaddingSize = DwarfEntry.Address - CurrentAddressLocation)
+  if (uint64_t PaddingSize = DwarfEntry.Address - CurrentAddressLocation)
     W.OS.write_zeros(PaddingSize);
 
   if (DwarfEntry.Size)
     Asm.writeSectionData(W.OS, DwarfEntry.DwarfSect->MCSec, Layout);
 
   CurrentAddressLocation = DwarfEntry.Address + DwarfEntry.Size;
 
   // DWARF section size is not aligned to DefaultSectionAlign.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

case PPC::fixup_ppc_half16: {
     case MCSymbolRefExpr::VK_None:
       return {XCOFF::RelocationType::R_TOC, SignAndSizeForHalf16};
     case MCSymbolRefExpr::VK_PPC_U:
       return {XCOFF::RelocationType::R_TOCU, SignAndSizeForHalf16};
     case MCSymbolRefExpr::VK_PPC_L:
       return {XCOFF::RelocationType::R_TOCL, SignAndSizeForHalf16};
     }
   } break;
+  case PPC::fixup_ppc_half16ds:
+  case PPC::fixup_ppc_half16dq: {
+    if (IsPCRel)
+      report_fatal_error("Invalid PC-relative relocation.");
+    switch (Modifier) {
+    default:
+      llvm_unreachable("Unsupported Modifier");
+    case MCSymbolRefExpr::VK_None:
+      return {XCOFF::RelocationType::R_TOC, 15};
+    case MCSymbolRefExpr::VK_PPC_L:
+      return {XCOFF::RelocationType::R_TOCL, 15};
+    }
+  } break;
   case PPC::fixup_ppc_br24:
     // Branches are 4 byte aligned, so the 24 bits we encode in
     // the instruction actually represents a 26 bit offset.
     return {XCOFF::RelocationType::R_RBR, EncodedSignednessIndicator | 25};
   case PPC::fixup_ppc_br24abs:
     return {XCOFF::RelocationType::R_RBA, EncodedSignednessIndicator | 25};
   case FK_Data_4:
+  case FK_Data_8:
+    const uint8_t SignAndSizeForFKData =
+        EncodedSignednessIndicator |
+        ((unsigned)Fixup.getKind() == FK_Data_4 ? 31 : 63);
     switch (Modifier) {
     default:
       report_fatal_error("Unsupported modifier");
     case MCSymbolRefExpr::VK_PPC_AIX_TLSGD:
-      return {XCOFF::RelocationType::R_TLS, EncodedSignednessIndicator | 31};
+      return {XCOFF::RelocationType::R_TLS, SignAndSizeForFKData};
     case MCSymbolRefExpr::VK_PPC_AIX_TLSGDM:
-      return {XCOFF::RelocationType::R_TLSM, EncodedSignednessIndicator | 31};
+      return {XCOFF::RelocationType::R_TLSM, SignAndSizeForFKData};
     case MCSymbolRefExpr::VK_None:
-      return {XCOFF::RelocationType::R_POS, EncodedSignednessIndicator | 31};
+      return {XCOFF::RelocationType::R_POS, SignAndSizeForFKData};
     }
   }
 }

llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll

 ; This file tests the codegen of initialized and common variables in AIX
 ; assembly and XCOFF object files.
 
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -data-sections=false < %s | FileCheck --check-prefixes=CHECK,CHECK32 %s
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -data-sections=false < %s | FileCheck --check-prefixes=CHECK,CHECK64 %s
 
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s
 ; RUN: llvm-readobj --section-headers --file-header %t.o | \
 ; RUN:   FileCheck --check-prefix=OBJ %s
 ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
 
-;; FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t64.o < %s
 ; RUN: llvm-readobj --section-headers --file-header %t64.o | \
 ; RUN:   FileCheck --check-prefix=OBJ64 %s
 
+;; FIXME: the symbol table is not yet supported in XCOFF64.
+
 @ivar = local_unnamed_addr global i32 35, align 4
 @llvar = local_unnamed_addr global i64 36, align 8
 @svar = local_unnamed_addr global i16 37, align 2
 @fvar = local_unnamed_addr global float 8.000000e+02, align 4
 @dvar = local_unnamed_addr global double 9.000000e+02, align 8
 @over_aligned = local_unnamed_addr global double 9.000000e+02, align 32
 @chrarray = local_unnamed_addr global [4 x i8] c"abcd", align 1
 @dblarr = local_unnamed_addr global [4 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00], align 8

 ; OBJ64:      Format: aix5coff64-rs6000
 ; OBJ64-NEXT: Arch: powerpc64
 ; OBJ64-NEXT: AddressSize: 64bit
 ; OBJ64-NEXT: FileHeader {
 ; OBJ64-NEXT:   Magic: 0x1F7
 ; OBJ64-NEXT:   NumberOfSections: 3
 ; OBJ64-NEXT:   TimeStamp: None (0x0)
 ; OBJ64-NEXT:   SymbolTableOffset: 0x170
-; OBJ64-NEXT:   SymbolTableEntries: 0
+; OBJ64-NEXT:   SymbolTableEntries: 1
 ; OBJ64-NEXT:   OptionalHeaderSize: 0x0
 ; OBJ64-NEXT:   Flags: 0x0
 ; OBJ64-NEXT: }
 
 ; OBJ64:      Sections [
 ; OBJ64-NEXT:   Section {
 ; OBJ64-NEXT:     Index: [[#OBJ64_INDX:]]
 ; OBJ64-NEXT:     Name: .text

llvm/test/CodeGen/PowerPC/aix-xcoff-huge-relocs.ll

 ;; This test generates 65534 relocation entries, an overflow section should
 ;; not be generated.
 ; RUN: grep -v RUN: %s | \
 ; RUN:   sed >%t.ll 's/SIZE/65534/;s/MACRO/#/;s/#/################/g;s/#/################/g;s/#/################/g;s/#/################/g;s/#/#_/g;s/_#_#_\([^#]\)/\1/;s/_/, /g;s/#/i8* @c/g;'
 ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff \
 ; RUN:     -mcpu=pwr4 -mattr=-altivec -filetype=obj -o %t.o %t.ll
 ; RUN: llvm-readobj --section-headers %t.o | FileCheck --check-prefix=XCOFF32 %s
 
-;; FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
+;; An XCOFF64 file may not contain an overflow section header.
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
+; RUN:     -mcpu=pwr4 -mattr=-altivec -filetype=obj -o %t64.o %t.overflow.ll
+; RUN: llvm-readobj --section-headers %t64.o | FileCheck --check-prefix=XCOFF64 %s
 
 @c = external global i8, align 1
 @arr = global [SIZE x i8*] [MACRO], align 8
 
 ; XCOFF32-NOT:     Name: .ovrflo
 ; XCOFF32-NOT:     Type: STYP_OVRFLO
 ; XCOFF32:       Section {
 ; XCOFF32:         Name: .data
 ; XCOFF32-NEXT:    PhysicalAddress: 0x0
 ; XCOFF32-NEXT:    VirtualAddress: 0x0
 ; XCOFF32-NEXT:    Size: 0x3FFF8
 ; XCOFF32-NEXT:    RawDataOffset: 0x64
 ; XCOFF32-NEXT:    RelocationPointer: 0x4005C
 ; XCOFF32-NEXT:    LineNumberPointer: 0x0
 ; XCOFF32-NEXT:    NumberOfRelocations: 65534
 ; XCOFF32-NEXT:    NumberOfLineNumbers: 0
 ; XCOFF32-NEXT:    Type: STYP_DATA (0x40)
 ; XCOFF32-NEXT:  }
 ; XCOFF32-NOT:     Name: .ovrflo
 ; XCOFF32-NOT:     Type: STYP_OVRFLO
+
+; XCOFF64:      Section {
+; XCOFF64:        Name: .data
+; XCOFF64-NEXT:   PhysicalAddress: 0x0
+; XCOFF64-NEXT:   VirtualAddress: 0x0
+; XCOFF64-NEXT:   Size: 0x7FFF8
+; XCOFF64-NEXT:   RawDataOffset: 0xA8
+; XCOFF64-NEXT:   RelocationPointer: 0x800A0
+; XCOFF64-NEXT:   LineNumberPointer: 0x0
+; XCOFF64-NEXT:   NumberOfRelocations: 65535
+; XCOFF64-NEXT:   NumberOfLineNumbers: 0
+; XCOFF64-NEXT:   Type: STYP_DATA (0x40)
+; XCOFF64-NEXT: }

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec \
 ; RUN:     -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --section-headers --file-header %t.o | \
-; RUN:   FileCheck --check-prefix=OBJ %s
+; RUN: llvm-readobj --section-headers --file-header %t.o | FileCheck --check-prefix=OBJ %s
 ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
 ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
 ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
 ; RUN: llvm-objdump -r %t.o | FileCheck --check-prefix=DIS_REL %s
 
-;; FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec \
+; RUN:     -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t64.o < %s
+; RUN: llvm-readobj --section-headers --file-header %t64.o | FileCheck --check-prefix=OBJ64 %s
+; RUN: llvm-readobj --relocs --expand-relocs %t64.o | FileCheck --check-prefix=RELOC64 %s
+
+;; FIXME: the symbol table is not yet supported in XCOFF64.
 
 @globalA = global i32 1, align 4
 @globalB = global i32 2, align 4
 @arr = global <{ i32, [9 x i32] }> <{ i32 3, [9 x i32] zeroinitializer }>, align 4
 @p = global i32* bitcast (i8* getelementptr (i8, i8* bitcast (<{ i32, [9 x i32] }>* @arr to i8*), i64 16) to i32*), align 4
 
 define i32 @foo() {
 entry:

 ; DIS_REL-NEXT:  0000001e R_TOC                    globalB
 ; DIS_REL:       RELOCATION RECORDS FOR [.data]:
 ; DIS_REL-NEXT:  OFFSET   TYPE                     VALUE
 ; DIS_REL-NEXT:  00000030 R_POS                    arr
 ; DIS_REL-NEXT:  00000034 R_POS                    .foo
 ; DIS_REL-NEXT:  00000038 R_POS                    TOC
 ; DIS_REL-NEXT:  00000040 R_POS                    globalA
 ; DIS_REL-NEXT:  00000044 R_POS                    globalB
+
+; OBJ64:      AddressSize: 64bit
+; OBJ64-NEXT: FileHeader {
+; OBJ64-NEXT:   Magic: 0x1F7
+; OBJ64-NEXT:   NumberOfSections: 2
+; OBJ64-NEXT:   TimeStamp: None (0x0)
+; OBJ64-NEXT:   SymbolTableOffset: 0x1B8
+; OBJ64-NEXT:   SymbolTableEntries: 1
+; OBJ64-NEXT:   OptionalHeaderSize: 0x0
+; OBJ64-NEXT:   Flags: 0x0
+; OBJ64-NEXT: }
+; OBJ64-NEXT: Sections [
+; OBJ64-NEXT:   Section {
+; OBJ64-NEXT:     Index: 1
+; OBJ64-NEXT:     Name: .text
+; OBJ64-NEXT:     PhysicalAddress: 0x0
+; OBJ64-NEXT:     VirtualAddress: 0x0
+; OBJ64-NEXT:     Size: 0x40
+; OBJ64-NEXT:     RawDataOffset: 0xA8
+; OBJ64-NEXT:     RelocationPointer: 0x148
+; OBJ64-NEXT:     LineNumberPointer: 0x0
+; OBJ64-NEXT:     NumberOfRelocations: 3
+; OBJ64-NEXT:     NumberOfLineNumbers: 0
+; OBJ64-NEXT:     Type: STYP_TEXT (0x20)
+; OBJ64-NEXT:   }
+; OBJ64-NEXT:   Section {
+; OBJ64-NEXT:     Index: 2
+; OBJ64-NEXT:     Name: .data
+; OBJ64-NEXT:     PhysicalAddress: 0x40
+; OBJ64-NEXT:     VirtualAddress: 0x40
+; OBJ64-NEXT:     Size: 0x60
+; OBJ64-NEXT:     RawDataOffset: 0xE8
+; OBJ64-NEXT:     RelocationPointer: 0x172
+; OBJ64-NEXT:     LineNumberPointer: 0x0
+; OBJ64-NEXT:     NumberOfRelocations: 5
+; OBJ64-NEXT:     NumberOfLineNumbers: 0
+; OBJ64-NEXT:     Type: STYP_DATA (0x40)
+; OBJ64-NEXT:   }
+; OBJ64-NEXT: ]
+
+; RELOC64:      AddressSize: 64bit
+; RELOC64-NEXT: Relocations [
+; RELOC64-NEXT:   Section (index: 1) .text {
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x10
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: Yes
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 26
+; RELOC64-NEXT:       Type: R_RBR (0x1A)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x1A
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 16
+; RELOC64-NEXT:       Type: R_TOC (0x3)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x1E
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 16
+; RELOC64-NEXT:       Type: R_TOC (0x3)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:   }
+; RELOC64-NEXT:   Section (index: 2) .data {
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x70
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 64
+; RELOC64-NEXT:       Type: R_POS (0x0)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x78
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 64
+; RELOC64-NEXT:       Type: R_POS (0x0)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x80
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 64
+; RELOC64-NEXT:       Type: R_POS (0x0)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x90
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 64
+; RELOC64-NEXT:       Type: R_POS (0x0)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:     Relocation {
+; RELOC64-NEXT:       Virtual Address: 0x98
+; RELOC64-NEXT:       Symbol: .file (0)
+; RELOC64-NEXT:       IsSigned: No
+; RELOC64-NEXT:       FixupBitValue: 0
+; RELOC64-NEXT:       Length: 64
+; RELOC64-NEXT:       Type: R_POS (0x0)
+; RELOC64-NEXT:     }
+; RELOC64-NEXT:   }
+; RELOC64-NEXT: ]

llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll

 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff  -verify-machineinstrs < %s | FileCheck %s
 ; RUN: not --crash llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff  \
 ; RUN:                 -verify-machineinstrs < %s 2>&1 | \
 ; RUN:   FileCheck %s --check-prefix=OBJ
 
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
+; RUN: not --crash llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff  \
+; RUN:                 -verify-machineinstrs < %s 2>&1 | \
+; RUN:   FileCheck %s --check-prefix=OBJ
+
 @i = global i32 55, align 4 #0
 
 attributes #0 = { "toc-data" }
 ; CHECK:            .toc
 ; CHECK-NEXT:       .csect i[TD],2
 ; CHECK-NEXT:       .globl i[TD]
 ; CHECK-NEXT:       .align 2
 ; CHECK-NEXT:       .vbyte 4, 55
 
 ; OBJ: LLVM ERROR:  toc-data not yet supported when writing object files.

llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll

 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
 ; RUN: not --crash llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff  \
 ; RUN:                 -verify-machineinstrs < %s 2>&1 | \
-; RUN:   FileCheck %s --check-prefix=OBJ32
+; RUN:   FileCheck %s --check-prefix=OBJ
 
-;; FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
+; RUN: not --crash llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff  \
+; RUN:                 -verify-machineinstrs < %s 2>&1 | \
+; RUN:   FileCheck %s --check-prefix=OBJ
 
 @i = external global i32, align 4  #0
 
 ; Function Attrs: noinline nounwind optnone
 define i32* @get() {
   entry:
     ret i32* @i
 }
 
 ; CHECK:        la 3, i[TD](2)
 ; CHECK:        .toc
 ; CHECK-NEXT:   .extern i[TD]
 
-; OBJ32: LLVM ERROR:  toc-data not yet supported when writing object files.
+; OBJ: LLVM ERROR:  toc-data not yet supported when writing object files.
 
 attributes #0 = { "toc-data" }