[RISCV] Add zbkb feature for zext.h Instruction

[benshi001]

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

654

We need not such aliases, since there is real zext.h instruction.

[benshi001]

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

654

We need not two zext.h, maybe just one is OK, when ZBB is invalid.

[StephenFan]

Looks like a test is missing?

[craig.topper]

The correct fix is to change the predicate here to include Zbkb

let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {                                
def ZEXT_H_RV32 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP, "zext.h">,         
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV32]                                    
                                                                                 
let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {                                
def ZEXT_H_RV64 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP_32, "zext.h">,      
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV64]

[craig.topper]

We should also verify the behavior of binutils.

[Miss_Grape]

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

654

real MI is PACK and PACKW，so just need Predicates = HasStdExtZbpOrZbkb

[Miss_Grape]

In D122212#3399915, @craig.topper wrote:

The correct fix is to change the predicate here to include Zbkb

let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {                                
def ZEXT_H_RV32 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP, "zext.h">,         
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV32]                                    
                                                                                 
let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {                                
def ZEXT_H_RV64 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP_32, "zext.h">,      
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV64]

Can you send me the Bitmap manual you read, I read the riscv-crypto-spec-scalar-v1.0.1.pdf , and zext.h does not belong to zbkb
zbkb Instruction：

[craig.topper]

In D122212#3418598, @Miss_Grape wrote:

In D122212#3399915, @craig.topper wrote:

The correct fix is to change the predicate here to include Zbkb

let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {                                
def ZEXT_H_RV32 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP, "zext.h">,         
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV32]                                    
                                                                                 
let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {                                
def ZEXT_H_RV64 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP_32, "zext.h">,      
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV64]

Can you send me the Bitmap manual you read, I read the riscv-crypto-spec-scalar-v1.0.1.pdf , and zext.h does not belong to zbkb
zbkb Instruction：

The zext.h encoding is a subset of the pack encodings. We need to have consistent behavior in when we use the two instruction representations. Otherwise disassembling with Zbb and Zbkb both enabled becomes ambiguous.

[Miss_Grape]

In D122212#3419632, @craig.topper wrote:

In D122212#3418598, @Miss_Grape wrote:

In D122212#3399915, @craig.topper wrote:

The correct fix is to change the predicate here to include Zbkb

let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {                                
def ZEXT_H_RV32 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP, "zext.h">,         
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV32]                                    
                                                                                 
let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {                                
def ZEXT_H_RV64 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP_32, "zext.h">,      
                  Sched<[WriteIALU, ReadIALU]>;                                  
} // Predicates = [HasStdExtZbbOrZbp, IsRV64]

Can you send me the Bitmap manual you read, I read the riscv-crypto-spec-scalar-v1.0.1.pdf , and zext.h does not belong to zbkb
zbkb Instruction：

The zext.h encoding is a subset of the pack encodings. We need to have consistent behavior in when we use the two instruction representations. Otherwise disassembling with Zbb and Zbkb both enabled becomes ambiguous.

Fixed

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

 let Predicates = [HasStdExtZbf] in
 def BFP : ALU_rr<0b0100100, 0b111, "bfp">,
           Sched<[WriteBFP, ReadBFP, ReadBFP]>;
 
 let Predicates = [HasStdExtZbf, IsRV64] in
 def BFPW : ALUW_rr<0b0100100, 0b111, "bfpw">,
            Sched<[WriteBFP32, ReadBFP32, ReadBFP32]>;
 
-let Predicates = [HasStdExtZbbOrZbp, IsRV32] in {
+let Predicates = [HasStdExtZbbOrZbpOrZbkb, IsRV32] in {
 def ZEXT_H_RV32 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP, "zext.h">,
                   Sched<[WriteIALU, ReadIALU]>;
-} // Predicates = [HasStdExtZbbOrZbp, IsRV32]
+} // Predicates = [HasStdExtZbbOrZbpOrZbkb, IsRV32]
 
-let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {
+let Predicates = [HasStdExtZbbOrZbpOrZbkb, IsRV64] in {
 def ZEXT_H_RV64 : RVBUnary<0b0000100, 0b00000, 0b100, OPC_OP_32, "zext.h">,
                   Sched<[WriteIALU, ReadIALU]>;
 } // Predicates = [HasStdExtZbbOrZbp, IsRV64]
 
 // We treat rev8 and orc.b as standalone instructions even though they use a
 // portion of the encodings for grevi and gorci. This allows us to support only
 // those encodings when only Zbb is enabled. We do this even when grevi and
 // gorci are available with Zbp. Trying to use 'HasStdExtZbb, NotHasStdExtZbp'

 } // Predicates = [HasStdExtZbpOrZbkb, IsRV32]
 
 
 //===----------------------------------------------------------------------===//
 // Pseudo Instructions
 //===----------------------------------------------------------------------===//
 
 let Predicates = [HasStdExtZba, IsRV64] in {
 def : InstAlias<"zext.w $rd, $rs", (ADD_UW GPR:$rd, GPR:$rs, X0)>;
 }
 
 let Predicates = [HasStdExtZbp] in {
 def : InstAlias<"rev.p $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b00001)>;
 def : InstAlias<"rev2.n $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b00010)>;
 def : InstAlias<"rev.n $rd, $rs",  (GREVI GPR:$rd, GPR:$rs, 0b00011)>;
 def : InstAlias<"rev4.b $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b00100)>;
 def : InstAlias<"rev2.b $rd, $rs", (GREVI GPR:$rd, GPR:$rs, 0b00110)>;

llvm/test/MC/RISCV/rv32zbbp-valid.s

 # With Bitmanip base extension:
 # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
 # RUN:     | llvm-objdump --mattr=+zbb -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
-# RUN:     | llvm-objdump --mattr=+zbb -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # With Bitmanip permutation extension:
 # RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbp -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbp -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbp < %s \
 # RUN:     | llvm-objdump --mattr=+experimental-zbp -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbp < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbp -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: andn t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x72,0x73,0x40]
 andn t0, t1, t2
 # CHECK-ASM-AND-OBJ: orn t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x62,0x73,0x40]
 orn t0, t1, t2
 # CHECK-ASM-AND-OBJ: xnor t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
 xnor t0, t1, t2
+
 # CHECK-ASM-AND-OBJ: rol t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x12,0x73,0x60]
 rol t0, t1, t2
 # CHECK-ASM-AND-OBJ: ror t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x52,0x73,0x60]
 ror t0, t1, t2
 # CHECK-ASM-AND-OBJ: rori t0, t1, 31
 # CHECK-ASM: encoding: [0x93,0x52,0xf3,0x61]
 rori t0, t1, 31
 # CHECK-ASM-AND-OBJ: rori t0, t1, 0
 # CHECK-ASM: encoding: [0x93,0x52,0x03,0x60]
 rori t0, t1, 0
 # CHECK-ASM-AND-OBJ: orc.b t0, t1
 # CHECK-ASM: encoding: [0x93,0x52,0x73,0x28]
 orc.b t0, t1
+
+# CHECK-ASM-AND-OBJ: zext.h t0, t1
+# CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
+zext.h t0, t1

llvm/test/MC/RISCV/rv32zbkb-valid.s

 # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbkb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbkb -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbkb < %s \
 # RUN:     | llvm-objdump --mattr=+zbkb -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbkb < %s \
-# RUN:     | llvm-objdump --mattr=+zbkb -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+# RUN:     | FileCheck --check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: ror t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x52,0x73,0x60]
 ror t0, t1, t2
 # CHECK-ASM-AND-OBJ: rol t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x12,0x73,0x60]
 rol t0, t1, t2
 # CHECK-ASM-AND-OBJ: rori t0, t1, 31

 orn t0, t1, t2
 # CHECK-ASM-AND-OBJ: xnor t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
 xnor t0, t1, t2
 
 # CHECK-ASM-AND-OBJ: pack t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x08]
 pack t0, t1, t2
-
-# Test the encoding used for zext.h for RV32.
-# CHECK-ASM-AND-OBJ: pack t0, t1, zero
+# CHECK-ASM: pack t0, t1, zero
+# CHECK-OBJ: zext.h  t0, t1
 # CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
 pack t0, t1, x0
 
 # CHECK-ASM-AND-OBJ: packh t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x72,0x73,0x08]
 packh t0, t1, t2
 
 # CHECK-ASM-AND-OBJ: brev8 t0, t1
 # CHECK-ASM: encoding: [0x93,0x52,0x73,0x68]
 brev8 t0, t1
+
+# CHECK-ASM-AND-OBJ: zext.h t0, t1
+# CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
+zext.h t0, t1

llvm/test/MC/RISCV/rv32zbp-valid.s

 # CHECK-ASM: encoding: [0x93,0x12,0x03,0x08]
 shfli t0, t1, 0
 # CHECK-ASM-AND-OBJ: unshfli t0, t1, 0
 # CHECK-ASM: encoding: [0x93,0x52,0x03,0x08]
 unshfli t0, t1, 0
 # CHECK-ASM-AND-OBJ: pack t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x08]
 pack t0, t1, t2
+# CHECK-ASM: pack t0, t1, zero
+# CHECK-OBJ: zext.h t0, t1
+# CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
+pack t0, t1, x0
 # CHECK-ASM-AND-OBJ: packu t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x48]
 packu t0, t1, t2
 # CHECK-ASM-AND-OBJ: packh t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x72,0x73,0x08]
 packh t0, t1, t2
 # CHECK-ASM: gorci t0, t1, 7
 # CHECK-OBJ: orc.b t0, t1

llvm/test/MC/RISCV/rv64zbbp-valid.s

 # With Bitmanip base extension:
 # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
 # RUN:     | llvm-objdump --mattr=+zbb -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # With Bitmanip permutation extension:
 # RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbp -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbp < %s \
 # RUN:     | llvm-objdump --mattr=+experimental-zbp -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
+# CHECK-ASM-AND-OBJ: andn t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x40]
+andn t0, t1, t2
+# CHECK-ASM-AND-OBJ: orn t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x40]
+orn t0, t1, t2
+# CHECK-ASM-AND-OBJ: xnor t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
+xnor t0, t1, t2
+# CHECK-ASM-AND-OBJ: rol t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x60]
+
+rol t0, t1, t2
+# CHECK-ASM-AND-OBJ: ror t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x60]
+ror t0, t1, t2
+# CHECK-ASM-AND-OBJ: rori t0, t1, 31
+# CHECK-ASM: encoding: [0x93,0x52,0xf3,0x61]
+rori t0, t1, 31
+# CHECK-ASM-AND-OBJ: rori t0, t1, 0
+# CHECK-ASM: encoding: [0x93,0x52,0x03,0x60]
+rori t0, t1, 0
+# CHECK-ASM-AND-OBJ: orc.b t0, t1
+# CHECK-ASM: encoding: [0x93,0x52,0x73,0x28]
+orc.b t0, t1
+
 # CHECK-ASM-AND-OBJ: rolw t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x12,0x73,0x60]
 rolw t0, t1, t2
 # CHECK-ASM-AND-OBJ: rorw t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x52,0x73,0x60]
 rorw t0, t1, t2
 # CHECK-ASM-AND-OBJ: roriw t0, t1, 31
 # CHECK-ASM: encoding: [0x9b,0x52,0xf3,0x61]
 roriw t0, t1, 31
 # CHECK-ASM-AND-OBJ: roriw t0, t1, 0
 # CHECK-ASM: encoding: [0x9b,0x52,0x03,0x60]
 roriw t0, t1, 0
+
 # CHECK-ASM-AND-OBJ: zext.h t0, t1
 # CHECK-ASM: encoding: [0xbb,0x42,0x03,0x08]
 zext.h t0, t1
+
 # CHECK-ASM-AND-OBJ: rev8 t0, t1
 # CHECK-ASM: encoding: [0x93,0x52,0x83,0x6b]
 rev8 t0, t1

llvm/test/MC/RISCV/rv64zbkb-valid.s

 # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbkb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbkb < %s \
 # RUN:     | llvm-objdump --mattr=+zbkb -d -r - \
-# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+# RUN:     | FileCheck --check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
+
+# CHECK-ASM-AND-OBJ: ror t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x60]
+ror t0, t1, t2
+# CHECK-ASM-AND-OBJ: rol t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x60]
+rol t0, t1, t2
+# CHECK-ASM-AND-OBJ: rori t0, t1, 31
+# CHECK-ASM: encoding: [0x93,0x52,0xf3,0x61]
+rori t0, t1, 31
+# CHECK-ASM-AND-OBJ: rori t0, t1, 0
+# CHECK-ASM: encoding: [0x93,0x52,0x03,0x60]
+rori t0, t1, 0
+
+# CHECK-ASM-AND-OBJ: andn t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x40]
+andn t0, t1, t2
+# CHECK-ASM-AND-OBJ: orn t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x40]
+orn t0, t1, t2
+# CHECK-ASM-AND-OBJ: xnor t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
+xnor t0, t1, t2
+
+# CHECK-ASM-AND-OBJ: pack t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x08]
+pack t0, t1, t2
+
+
+# CHECK-ASM-AND-OBJ: pack t0, t1, zero
+# CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
+pack t0, t1, x0
+
+# CHECK-ASM-AND-OBJ: packh t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x08]
+packh t0, t1, t2
+
+# CHECK-ASM-AND-OBJ: brev8 t0, t1
+# CHECK-ASM: encoding: [0x93,0x52,0x73,0x68]
+brev8 t0, t1
 
 # CHECK-ASM-AND-OBJ: rev8 t0, t1
 # CHECK-ASM: encoding: [0x93,0x52,0x83,0x6b]
 rev8 t0, t1
 
 # CHECK-ASM-AND-OBJ: rorw t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x52,0x73,0x60]
 rorw t0, t1, t2
 # CHECK-ASM-AND-OBJ: rolw t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x12,0x73,0x60]
 rolw t0, t1, t2
 # CHECK-ASM-AND-OBJ: roriw t0, t1, 31
 # CHECK-ASM: encoding: [0x9b,0x52,0xf3,0x61]
 roriw t0, t1, 31
 # CHECK-ASM-AND-OBJ: roriw t0, t1, 0
 # CHECK-ASM: encoding: [0x9b,0x52,0x03,0x60]
 roriw t0, t1, 0
 
 # CHECK-ASM-AND-OBJ: packw t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x42,0x73,0x08]
 packw t0, t1, t2
 
-# Test the encoding used for zext.h
-# CHECK-ASM-AND-OBJ: packw t0, t1, zero
+# CHECK-ASM: packw t0, t1, zero
+# CHECK-OBJ: zext.h t0, t1
 # CHECK-ASM: encoding: [0xbb,0x42,0x03,0x08]
-packw t0, t1, zero
+packw t0, t1, x0
+
+# CHECK-ASM-AND-OBJ: zext.h t0, t1
+# CHECK-ASM: encoding: [0xbb,0x42,0x03,0x08]
+zext.h t0, t1
+