[AMDGPU] Fix kill flag state for replaced operands

[dstuttard]

Summary

When copying operands as part of this optimsation, use the kill flag for the
replaced operand, rather than just the From operand.

[dstuttard]

Picked this issue up in some testing - seems a logical fix.
I have a reproducer, but even the cut-down isn't that clean - do you think this requires a test?

[dstuttard]

Pushed an earlier commit by mistake

[arsenm]

In D121691#3382276, @dstuttard wrote:

Picked this issue up in some testing - seems a logical fix.
I have a reproducer, but even the cut-down isn't that clean - do you think this requires a test?

Definitely should have a test

[rampitec]

Typo in the description: "optimsation".

[arsenm]

Reverse ping

llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

 void SDWADstPreserveOperand::print(raw_ostream& OS) const {
   OS << "SDWA preserve dst: " << *getTargetOperand()
     << " dst_sel:" << getDstSel()
     << " preserve:" << *getPreservedOperand() << '\n';
 }
 
 #endif
 
-static void copyRegOperand(MachineOperand &To, const MachineOperand &From) {
-  assert(To.isReg() && From.isReg());
+static void copyRegOperand(MachineOperand &To, const MachineOperand &From,
+                           const MachineOperand &Replaced) {
+  assert(To.isReg() && From.isReg() && Replaced.isReg());
   To.setReg(From.getReg());
   To.setSubReg(From.getSubReg());
   To.setIsUndef(From.isUndef());
   if (To.isUse()) {
-    To.setIsKill(From.isKill());
+    To.setIsKill(From.isKill() && Replaced.isKill());
   } else {
     To.setIsDead(From.isDead());
   }
 }
 
 static bool isSameReg(const MachineOperand &LHS, const MachineOperand &RHS) {
   return LHS.isReg() &&
          RHS.isReg() &&
if ((MI.getOpcode() == AMDGPU::V_FMAC_F16_sdwa ||
       // In case of v_mac_f16/32_sdwa this pass can try to apply src operand to
       // src2. This is not allowed.
       return false;
     }
 
     assert(isSameReg(*Src, *getReplacedOperand()) &&
            (IsPreserveSrc || (SrcSel && SrcMods)));
   }
-  copyRegOperand(*Src, *getTargetOperand());
+  copyRegOperand(*Src, *getTargetOperand(), *getReplacedOperand());
   if (!IsPreserveSrc) {
     SrcSel->setImm(getSrcSel());
     SrcMods->setImm(getSrcMods(TII, Src));
   }
   getTargetOperand()->setIsKill(false);
   return true;
 }
 
if ((MI.getOpcode() == AMDGPU::V_FMAC_F16_sdwa ||
     // v_mac_f16/32_sdwa allow dst_sel to be equal only to DWORD
     return false;
   }
 
   MachineOperand *Operand = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
   assert(Operand &&
          Operand->isReg() &&
          isSameReg(*Operand, *getReplacedOperand()));
-  copyRegOperand(*Operand, *getTargetOperand());
+  copyRegOperand(*Operand, *getTargetOperand(), *getReplacedOperand());
   MachineOperand *DstSel= TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel);
   assert(DstSel);
   DstSel->setImm(getDstSel());
   MachineOperand *DstUnused= TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused);
   assert(DstUnused);
   DstUnused->setImm(getDstUnused());
 
   // Remove original instruction  because it would conflict with our new