[GlobalISel] Add G_IS_FPCLASS

[sepavloff]

Summary

Add a generic opcode to represent llvm.is_fpclass intrinsic.

[arsenm]

llvm/lib/CodeGen/MachineVerifier.cpp

1636–1640

You can't do this, the target needs to legalize this

[sepavloff]

Do not require destination type be 1-bit

[sepavloff]

Thanks!

llvm/docs/GlobalISel/GenericOpcode.rst

 Copy the value of the first operand, replacing the sign bit with that of the
 second operand.
 
 G_FCANONICALIZE
 ^^^^^^^^^^^^^^^
 
 See :ref:`i_intr_llvm_canonicalize`.
 
+G_IS_FPCLASS
+^^^^^^^^^^^^
+
+Tests if the first operand, which must be floating-point scalar or vector, has
+floating-point class specified by the second operand. The third operand
+specifies floating-point semantics of the tested value. Returns non-zero (true)
+or zero (false). It's target specific whether a true value is 1, ~0U, or some
+other non-zero value. If the first operand is a vector, the returned value is a
+vector of the same length.
+
 G_FMINNUM
 ^^^^^^^^^
 
 Perform floating-point minimum on two values.
 
 In the case where a single input is a NaN (either signaling or quiet),
 the non-NaN input is returned.
 

llvm/include/llvm/ADT/APFloat.h

struct APFloatBase {
   /// @{
   enum Semantics {
     S_IEEEhalf,
     S_BFloat,
     S_IEEEsingle,
     S_IEEEdouble,
     S_x87DoubleExtended,
     S_IEEEquad,
-    S_PPCDoubleDouble
+    S_PPCDoubleDouble,
+    S_MaxSemantics = S_PPCDoubleDouble
   };
 
   static const llvm::fltSemantics &EnumToSemantics(Semantics S);
   static Semantics SemanticsToEnum(const llvm::fltSemantics &Sem);
 
   static const fltSemantics &IEEEhalf() LLVM_READNONE;
   static const fltSemantics &BFloat() LLVM_READNONE;
   static const fltSemantics &IEEEsingle() LLVM_READNONE;

llvm/include/llvm/Support/TargetOpcodes.def

 HANDLE_TARGET_OPCODE(G_FABS)
 
 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.  NOTE: This does
 /// not require that X and Y have the same type, just that they are both
 /// floating point. X and the result must have the same type.  FCOPYSIGN(f32,
 /// f64) is allowed.
 HANDLE_TARGET_OPCODE(G_FCOPYSIGN)
 
+/// Generic test for floating-point class.
+HANDLE_TARGET_OPCODE(G_IS_FPCLASS)
+
 /// Generic FP canonicalize value.
 HANDLE_TARGET_OPCODE(G_FCANONICALIZE)
 
 /// FP min/max matching libm's fmin/fmax
 HANDLE_TARGET_OPCODE(G_FMINNUM)
 HANDLE_TARGET_OPCODE(G_FMAXNUM)
 
 /// FP min/max matching IEEE-754 2008's minnum/maxnum semantics.

llvm/include/llvm/Target/GenericOpcodes.td

 }
 
 def G_FCANONICALIZE : GenericInstruction {
   let OutOperandList = (outs type0:$dst);
   let InOperandList = (ins type0:$src);
   let hasSideEffects = false;
 }
 
+// Generic opcode equivalent to the llvm.is_fpclass intrinsic.
+def G_IS_FPCLASS: GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type1:$src, unknown:$test, unknown:$fpsem);
+  let hasSideEffects = false;
+}
+
 // FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two
 // values.
 //
 // In the case where a single input is a NaN (either signaling or quiet),
 // the non-NaN input is returned.
 //
 // The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
 def G_FMINNUM : GenericInstruction {

llvm/lib/CodeGen/MachineVerifier.cpp

 #include "llvm/ADT/PostOrderIterator.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SetOperations.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/Analysis/EHPersonalities.h"
+#include "llvm/CodeGen/CodeGenCommonISel.h"
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervalCalc.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/LiveStacks.h"
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
case TargetOpcode::G_ROTL: {
     }
     break;
   }
   case TargetOpcode::G_LLROUND:
   case TargetOpcode::G_LROUND: {
     verifyAllRegOpsScalar(*MI, *MRI);
     break;
   }
+  case TargetOpcode::G_IS_FPCLASS: {
+    LLT DestTy = MRI->getType(MI->getOperand(0).getReg());
+    LLT DestEltTy = DestTy.getScalarType();
+    if (!DestEltTy.isScalar()) {
+      report("Destination must be a scalar or vector of scalars", MI);
+      break;
+    }
+    LLT SrcTy = MRI->getType(MI->getOperand(1).getReg());
+    LLT SrcEltTy = SrcTy.getScalarType();
+    if (!SrcEltTy.isScalar()) {
+      report("Source must be a scalar or vector of scalars", MI);
+      break;
+    }
+    if (!verifyVectorElementMatch(DestTy, SrcTy, MI))
+      break;
+    const MachineOperand &TestMO = MI->getOperand(2);
+    if (!TestMO.isImm()) {
+      report("floating-point class set (operand 2) must be an immediate", MI);
+      break;
+    }
+    int64_t Test = TestMO.getImm();
+    if (Test < 0 || Test > fcAllFlags) {
+      report("Incorrect floating-point class set (operand 2)", MI);
+      break;
+    }
+    const MachineOperand &SemanticsMO = MI->getOperand(3);
+    if (!SemanticsMO.isImm()) {
+      report("floating-point semantics (operand 3) must be an immediate", MI);
+      break;
+    }
+    int64_t Semantics = SemanticsMO.getImm();
+    if (Semantics < 0 || Semantics > APFloat::S_MaxSemantics) {
+      report("Incorrect floating-point semantics (operand 3)", MI);
+      break;
+    }
+    break;
+  }
   default:
     break;
   }
 }
 
 void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
   const MCInstrDesc &MCID = MI->getDesc();
   if (MI->getNumOperands() < MCID.getNumOperands()) {

llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

 # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: G_FABS (opcode {{[0-9]+}}): 1 type index, 0 imm indices
 # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: G_FCOPYSIGN (opcode {{[0-9]+}}): 2 type indices
 # DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: G_IS_FPCLASS (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
+# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: G_FCANONICALIZE (opcode {{[0-9]+}}): 1 type index, 0 imm indices
 # DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: G_FMINNUM (opcode {{[0-9]+}}): 1 type index
 # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. the first uncovered type index: 1, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_FMAXNUM (opcode {{[0-9]+}}): 1 type index

llvm/test/MachineVerifier/test_g_is_fpclass.mir

+# RUN: not --crash llc -o - -march=aarch64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
+
+---
+name:            test_fcmp
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    liveins: $x0, $w0, $q0
+    %s32:_(s32) = COPY $w0
+    %ptr:_(p0) = COPY $x0
+    %vector:_(<4 x s32>) = COPY $q0
+
+    %val1:_(s1) = G_IS_FPCLASS %s32, 1
+    ; CHECK: *** Bad machine code: Too few operands ***
+    ; CHECK: 4 operands expected, but 3 given.
+
+    %val2:_(p0) = G_IS_FPCLASS %s32, 3, 2
+    ; CHECK: *** Bad machine code: Destination must be a scalar or vector of scalars ***
+
+    %val3:_(s1) = G_IS_FPCLASS %s32, 1, 66
+    ; CHECK: *** Bad machine code: Incorrect floating-point semantics (operand 3) ***
+
+    %val4:_(s1) = G_IS_FPCLASS %s32, 7777, 2
+    ; CHECK: *** Bad machine code: Incorrect floating-point class set (operand 2) ***
+
+    %val5:_(s1) = G_IS_FPCLASS %ptr:_(p0), 3, 2
+    ; CHECK: *** Bad machine code: Source must be a scalar or vector of scalars ***
+
+    %var6:_(s1) = G_IS_FPCLASS %vector:_(<4 x s32>), 1, 2
+    ; CHECK: *** Bad machine code: operand types must be all-vector or all-scalar ***
+
+    %var7:_(<2 x s1>) = G_IS_FPCLASS %vector:_(<4 x s32>), 1, 2
+    ; CHECK: *** Bad machine code: operand types must preserve number of vector elements ***
+
+...