[AArch64] Adjust aarch64 constrained intrinsics tests and un-XFAIL

[john.brawn]

Summary

Remove the checking of the generated asm, as that's already tested elsewhere, and adjust some tests that were expecting the wrong intrinsic to be generated.

[fhahn]

Does this clang test actually need to check the generated assembly? Shouldn't it be enough to check that the correct intrinsics are generated?

[john.brawn]

In D118259#3275297, @fhahn wrote:

Does this clang test actually need to check the generated assembly? Shouldn't it be enough to check that the correct intrinsics are generated?

I could remove the CHECK-ASM checks, but the other xyz-constrained.c tests (including non-aarch64 ones) all do this and it feels a bit weird to just do that to this test.

[john.brawn]

Ping.

[john.brawn]

Ping.

[fhahn]

In D118259#3343554, @john.brawn wrote:

In D118259#3275297, @fhahn wrote:

Does this clang test actually need to check the generated assembly? Shouldn't it be enough to check that the correct intrinsics are generated?

I could remove the CHECK-ASM checks, but the other xyz-constrained.c tests (including non-aarch64 ones) all do this and it feels a bit weird to just do that to this test.

I guess the question is if there is a convincing reason to check the assembly in this test? Unless it is required for the test, checking for assembly makes the test more fragile than they need to be. Also, is there any difference in the generated IR between X86 and AArch64? If not, the tests should probably be unified.

[john.brawn]

llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll is testing the asm generation, so it probably is fine to remove that here so I will. This test is specifically testing arm_neon.h intrinsics though, so wouldn't make sense unifying with other architectures.

[kpn]

It's been a while, but I think the aarch64-neon-intrinsics-constrained.c test is trimmed down from the aarch64-neon-intrinsics.c test. Shouldn't the constrained and non-constrained end-to-end tests be treated the same?

[fhahn]

In D118259#3389235, @kpn wrote:

It's been a while, but I think the aarch64-neon-intrinsics-constrained.c test is trimmed down from the aarch64-neon-intrinsics.c test. Shouldn't the constrained and non-constrained end-to-end tests be treated the same?

Are you referring to https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/aarch64-neon-intrinsics.c? This one doesn't check assembly.

[kpn]

In D118259#3389246, @fhahn wrote:

In D118259#3389235, @kpn wrote:

It's been a while, but I think the aarch64-neon-intrinsics-constrained.c test is trimmed down from the aarch64-neon-intrinsics.c test. Shouldn't the constrained and non-constrained end-to-end tests be treated the same?

Are you referring to https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/aarch64-neon-intrinsics.c? This one doesn't check assembly.

Ah, well, I guess that wasn't it, then. It's been a while, and I've been all over the place.

A clang-only test that just tests for the correct IR being emitted won't trigger the failures in the backend. An LLVM-only test that starts from that IR can show those failures, but it also runs the risk over time of getting out of sync with the IR emitted by clang. An end-to-end test will always be in sync, and it will show those failures that I ran into plus anything else that crops up over time. If there's another way, or if there is another approach, then it might be possible there's a way to get all the testing done without running into those issues. I just don't know what it is.

[john.brawn]

Also adjust aarch64-v8.2a-fp16-intrinsics-constrained.c in this patch (was previously done in
D115620) and remove the checks of the generated asm.

[kpn]

I trust you on the instruction set changes. LGTM.

clang/test/CodeGen/aarch64-neon-intrinsics-constrained.c

 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
 // RUN:     -fallow-half-arguments-and-returns -S -disable-O0-optnone \
 // RUN:  -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
 // RUN:     -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN:  -ffp-exception-behavior=strict \
+// RUN:  -ffp-exception-behavior=strict -fexperimental-strict-floating-point \
 // RUN:  -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
-// RUN:     -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN:  -flax-vector-conversions=none -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
-// RUN:     -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN:  -ffp-exception-behavior=strict \
-// RUN:  -flax-vector-conversions=none -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
 
 // REQUIRES: aarch64-registered-target
 
-// Fails during instruction selection:
-// XFAIL: *
-
 // Test new aarch64 intrinsics and types but constrained
 
 #include <arm_neon.h>
 
 // COMMON-LABEL: test_vadd_f32
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x float> %v1, %v2
 // CONSTRAINED:   [[ADD_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fadd.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fadd v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      ret <2 x float> [[ADD_I]]
 float32x2_t test_vadd_f32(float32x2_t v1, float32x2_t v2) {
   return vadd_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vaddq_f32
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <4 x float> %v1, %v2
 // CONSTRAINED:   [[ADD_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fadd v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      ret <4 x float> [[ADD_I]]
 float32x4_t test_vaddq_f32(float32x4_t v1, float32x4_t v2) {
   return vaddq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vsub_f32
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x float> %v1, %v2
 // CONSTRAINED:   [[SUB_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fsub v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      ret <2 x float> [[SUB_I]]
 float32x2_t test_vsub_f32(float32x2_t v1, float32x2_t v2) {
   return vsub_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vsubq_f32
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <4 x float> %v1, %v2
 // CONSTRAINED:   [[SUB_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fsub v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      ret <4 x float> [[SUB_I]]
 float32x4_t test_vsubq_f32(float32x4_t v1, float32x4_t v2) {
   return vsubq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vsubq_f64
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x double> %v1, %v2
 // CONSTRAINED:   [[SUB_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fsub v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      ret <2 x double> [[SUB_I]]
 float64x2_t test_vsubq_f64(float64x2_t v1, float64x2_t v2) {
   return vsubq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vmul_f32
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v1, %v2
 // CONSTRAINED:   [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      ret <2 x float> [[MUL_I]]
 float32x2_t test_vmul_f32(float32x2_t v1, float32x2_t v2) {
   return vmul_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vmulq_f32
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v1, %v2
 // CONSTRAINED:   [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      ret <4 x float> [[MUL_I]]
 float32x4_t test_vmulq_f32(float32x4_t v1, float32x4_t v2) {
   return vmulq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vmulq_f64
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v1, %v2
 // CONSTRAINED:   [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      ret <2 x double> [[MUL_I]]
 float64x2_t test_vmulq_f64(float64x2_t v1, float64x2_t v2) {
   return vmulq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vmla_f32
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v2, %v3
 // CONSTRAINED:   [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v2, <2 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul [[MUL_R:v[0-9]+.2s]], v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x float> %v1, [[MUL_I]]
 // CONSTRAINED:   [[ADD_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fadd.v2f32(<2 x float> %v1, <2 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fadd v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, [[MUL_R]]
 // COMMONIR:      ret <2 x float> [[ADD_I]]
 float32x2_t test_vmla_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
   return vmla_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vmlaq_f32
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v2, %v3
 // CONSTRAINED:   [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v2, <4 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul [[MUL_R:v[0-9]+.4s]], v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <4 x float> %v1, [[MUL_I]]
 // CONSTRAINED:   [[ADD_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %v1, <4 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fadd v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, [[MUL_R]]
 // COMMONIR:      ret <4 x float> [[ADD_I]]
 float32x4_t test_vmlaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
   return vmlaq_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vmlaq_f64
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v2, %v3
 // CONSTRAINED:   [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v2, <2 x double> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul [[MUL_R:v[0-9]+.2d]], v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x double> %v1, [[MUL_I]]
 // CONSTRAINED:   [[ADD_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double> %v1, <2 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fadd v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, [[MUL_R]]
 // COMMONIR:      ret <2 x double> [[ADD_I]]
 float64x2_t test_vmlaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
   return vmlaq_f64(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vmls_f32
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v2, %v3
 // CONSTRAINED:   [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v2, <2 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul [[MUL_R:v[0-9]+.2s]], v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x float> %v1, [[MUL_I]]
 // CONSTRAINED:   [[SUB_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %v1, <2 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fsub v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, [[MUL_R]]
 // COMMONIR:      ret <2 x float> [[SUB_I]]
 float32x2_t test_vmls_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
   return vmls_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vmlsq_f32
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v2, %v3
 // CONSTRAINED:   [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v2, <4 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul [[MUL_R:v[0-9]+.4s]], v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <4 x float> %v1, [[MUL_I]]
 // CONSTRAINED:   [[SUB_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %v1, <4 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fsub v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, [[MUL_R]]
 // COMMONIR:   ret <4 x float> [[SUB_I]]
 float32x4_t test_vmlsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
   return vmlsq_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vmlsq_f64
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v2, %v3
 // CONSTRAINED:   [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v2, <2 x double> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul [[MUL_R:v[0-9]+.2d]], v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x double> %v1, [[MUL_I]]
 // CONSTRAINED:   [[SUB_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %v1, <2 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM-NEXT:fsub v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, [[MUL_R]]
 // COMMONIR:      ret <2 x double> [[SUB_I]]
 float64x2_t test_vmlsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
   return vmlsq_f64(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vfma_f32
 // COMMONIR:      [[TMP0:%.*]] = bitcast <2 x float> %v1 to <8 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <2 x float> %v2 to <8 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %v2, <2 x float> %v3, <2 x float> %v1)
 // CONSTRAINED:   [[TMP3:%.*]] = call <2 x float> @llvm.experimental.constrained.fma.v2f32(<2 x float> %v2, <2 x float> %v3, <2 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmla v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      ret <2 x float> [[TMP3]]
 float32x2_t test_vfma_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
   return vfma_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vfmaq_f32
 // COMMONIR:      [[TMP0:%.*]] = bitcast <4 x float> %v1 to <16 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <4 x float> %v2 to <16 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %v2, <4 x float> %v3, <4 x float> %v1)
 // CONSTRAINED:   [[TMP3:%.*]] = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> %v2, <4 x float> %v3, <4 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmla v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      ret <4 x float> [[TMP3]]
 float32x4_t test_vfmaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
   return vfmaq_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vfmaq_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <2 x double> %v1 to <16 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <2 x double> %v2 to <16 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %v2, <2 x double> %v3, <2 x double> %v1)
 // CONSTRAINED:   [[TMP3:%.*]] = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> %v2, <2 x double> %v3, <2 x double> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmla v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      ret <2 x double> [[TMP3]]
 float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
   return vfmaq_f64(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vfms_f32
 // COMMONIR:      [[SUB_I:%.*]] = fneg <2 x float> %v2
-// CHECK-ASM:     fneg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      [[TMP0:%.*]] = bitcast <2 x float> %v1 to <8 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <2 x float> [[SUB_I]] to <8 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[SUB_I]], <2 x float> %v3, <2 x float> %v1)
 // CONSTRAINED:   [[TMP3:%.*]] = call <2 x float> @llvm.experimental.constrained.fma.v2f32(<2 x float> [[SUB_I]], <2 x float> %v3, <2 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmla v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      ret <2 x float> [[TMP3]]
 float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
   return vfms_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vfmsq_f32
 // COMMONIR:      [[SUB_I:%.*]] = fneg <4 x float> %v2
-// CHECK-ASM:     fneg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      [[TMP0:%.*]] = bitcast <4 x float> %v1 to <16 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <4 x float> [[SUB_I]] to <16 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[SUB_I]], <4 x float> %v3, <4 x float> %v1)
 // CONSTRAINED:   [[TMP3:%.*]] = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> [[SUB_I]], <4 x float> %v3, <4 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmla v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      ret <4 x float> [[TMP3]]
 float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
   return vfmsq_f32(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vfmsq_f64
 // COMMONIR:      [[SUB_I:%.*]] = fneg <2 x double> %v2
-// CHECK-ASM:     fneg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      [[TMP0:%.*]] = bitcast <2 x double> %v1 to <16 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <2 x double> [[SUB_I]] to <16 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> %v3, <2 x double> %v1)
 // CONSTRAINED:   [[TMP3:%.*]] = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> %v3, <2 x double> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmla v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      ret <2 x double> [[TMP3]]
 float64x2_t test_vfmsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
   return vfmsq_f64(v1, v2, v3);
 }
 
 // COMMON-LABEL: test_vdivq_f64
 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <2 x double> %v1, %v2
 // CONSTRAINED:   [[DIV_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fdiv v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      ret <2 x double> [[DIV_I]]
 float64x2_t test_vdivq_f64(float64x2_t v1, float64x2_t v2) {
   return vdivq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vdivq_f32
 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <4 x float> %v1, %v2
 // CONSTRAINED:   [[DIV_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fdiv v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      ret <4 x float> [[DIV_I]]
 float32x4_t test_vdivq_f32(float32x4_t v1, float32x4_t v2) {
   return vdivq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vdiv_f32
 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <2 x float> %v1, %v2
 // CONSTRAINED:   [[DIV_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fdiv.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fdiv v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      ret <2 x float> [[DIV_I]]
 float32x2_t test_vdiv_f32(float32x2_t v1, float32x2_t v2) {
   return vdiv_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vceq_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <2 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmeq v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
 // COMMONIR:      ret <2 x i32> [[SEXT_I]]
 uint32x2_t test_vceq_f32(float32x2_t v1, float32x2_t v2) {
   return vceq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vceq_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <1 x double> %a, %b
 // CONSTRAINED:   [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
 // COMMONIR:      [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
 // COMMONIR:      ret <1 x i64> [[SEXT_I]]
 uint64x1_t test_vceq_f64(float64x1_t a, float64x1_t b) {
   return vceq_f64(a, b);
 }
 
 // COMMON-LABEL: test_vceqq_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <4 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmp.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmeq v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
 // COMMONIR:      ret <4 x i32> [[SEXT_I]]
 uint32x4_t test_vceqq_f32(float32x4_t v1, float32x4_t v2) {
   return vceqq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vceqq_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <2 x double> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmeq v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
 // COMMONIR:      ret <2 x i64> [[SEXT_I]]
 uint64x2_t test_vceqq_f64(float64x2_t v1, float64x2_t v2) {
   return vceqq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vcge_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <2 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmge v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
 // COMMONIR:      ret <2 x i32> [[SEXT_I]]
 uint32x2_t test_vcge_f32(float32x2_t v1, float32x2_t v2) {
   return vcge_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcge_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <1 x double> %a, %b
 // CONSTRAINED:   [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
 // COMMONIR:      [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
 // COMMONIR:      ret <1 x i64> [[SEXT_I]]
 uint64x1_t test_vcge_f64(float64x1_t a, float64x1_t b) {
   return vcge_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcgeq_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <4 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmge v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
 // COMMONIR:      ret <4 x i32> [[SEXT_I]]
 uint32x4_t test_vcgeq_f32(float32x4_t v1, float32x4_t v2) {
   return vcgeq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcgeq_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <2 x double> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmge v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
 // COMMONIR:      ret <2 x i64> [[SEXT_I]]
 uint64x2_t test_vcgeq_f64(float64x2_t v1, float64x2_t v2) {
   return vcgeq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vcle_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <2 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmge v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
 // COMMONIR:      ret <2 x i32> [[SEXT_I]]
 uint32x2_t test_vcle_f32(float32x2_t v1, float32x2_t v2) {
   return vcle_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcle_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <1 x double> %a, %b
 // CONSTRAINED:   [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
 // COMMONIR:      [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
 // COMMONIR:      ret <1 x i64> [[SEXT_I]]
 uint64x1_t test_vcle_f64(float64x1_t a, float64x1_t b) {
   return vcle_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcleq_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <4 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmge v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
 // COMMONIR:      ret <4 x i32> [[SEXT_I]]
 uint32x4_t test_vcleq_f32(float32x4_t v1, float32x4_t v2) {
   return vcleq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcleq_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <2 x double> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmge v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
 // COMMONIR:      ret <2 x i64> [[SEXT_I]]
 uint64x2_t test_vcleq_f64(float64x2_t v1, float64x2_t v2) {
   return vcleq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vcgt_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <2 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmgt v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
 // COMMONIR:      ret <2 x i32> [[SEXT_I]]
 uint32x2_t test_vcgt_f32(float32x2_t v1, float32x2_t v2) {
   return vcgt_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcgt_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <1 x double> %a, %b
 // CONSTRAINED:   [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
 // COMMONIR:      [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
 // COMMONIR:      ret <1 x i64> [[SEXT_I]]
 uint64x1_t test_vcgt_f64(float64x1_t a, float64x1_t b) {
   return vcgt_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcgtq_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <4 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmgt v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
 // COMMONIR:      ret <4 x i32> [[SEXT_I]]
 uint32x4_t test_vcgtq_f32(float32x4_t v1, float32x4_t v2) {
   return vcgtq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcgtq_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <2 x double> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmgt v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
 // COMMONIR:      ret <2 x i64> [[SEXT_I]]
 uint64x2_t test_vcgtq_f64(float64x2_t v1, float64x2_t v2) {
   return vcgtq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vclt_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <2 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmgt v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
 // COMMONIR:      ret <2 x i32> [[SEXT_I]]
 uint32x2_t test_vclt_f32(float32x2_t v1, float32x2_t v2) {
   return vclt_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vclt_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <1 x double> %a, %b
 // CONSTRAINED:   [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
 // COMMONIR:      [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
 // COMMONIR:      ret <1 x i64> [[SEXT_I]]
 uint64x1_t test_vclt_f64(float64x1_t a, float64x1_t b) {
   return vclt_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcltq_f32
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <4 x float> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmgt v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
 // COMMONIR:      [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
 // COMMONIR:      ret <4 x i32> [[SEXT_I]]
 uint32x4_t test_vcltq_f32(float32x4_t v1, float32x4_t v2) {
   return vcltq_f32(v1, v2);
 }
 
 // COMMON-LABEL: test_vcltq_f64
 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <2 x double> %v1, %v2
 // CONSTRAINED:   [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmgt v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
 // COMMONIR:      [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
 // COMMONIR:      ret <2 x i64> [[SEXT_I]]
 uint64x2_t test_vcltq_f64(float64x2_t v1, float64x2_t v2) {
   return vcltq_f64(v1, v2);
 }
 
 // COMMON-LABEL: test_vpadds_f32
 // COMMONIR:      [[LANE0_I:%.*]] = extractelement <2 x float> %a, i64 0
 // COMMONIR:      [[LANE1_I:%.*]] = extractelement <2 x float> %a, i64 1
 // UNCONSTRAINED: [[VPADDD_I:%.*]] = fadd float [[LANE0_I]], [[LANE1_I]]
 // CONSTRAINED:   [[VPADDD_I:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float [[LANE0_I]], float [[LANE1_I]], metadata !"round.tonearest", metadata !"fpexcept.strict"
-// CHECK-ASM:     fadd s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
 // COMMONIR:      ret float [[VPADDD_I]]
 float32_t test_vpadds_f32(float32x2_t a) {
   return vpadds_f32(a);
 }
 
 // COMMON-LABEL: test_vpaddd_f64
 // COMMONIR:      [[LANE0_I:%.*]] = extractelement <2 x double> %a, i64 0
 // COMMONIR:      [[LANE1_I:%.*]] = extractelement <2 x double> %a, i64 1
 // UNCONSTRAINED: [[VPADDD_I:%.*]] = fadd double [[LANE0_I]], [[LANE1_I]]
 // CONSTRAINED:   [[VPADDD_I:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LANE0_I]], double [[LANE1_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     faddp d{{[0-9]+}}, v{{[0-9]+}}.2d
 // COMMONIR:      ret double [[VPADDD_I]]
 float64_t test_vpaddd_f64(float64x2_t a) {
   return vpaddd_f64(a);
 }
 
 // COMMON-LABEL: test_vcvts_f32_s32
 // UNCONSTRAINED: [[TMP0:%.*]] = sitofp i32 %a to float
 // CONSTRAINED:   [[TMP0:%.*]] = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     scvtf s{{[0-9]+}}, w{{[0-9]+}}
 // COMMONIR:      ret float [[TMP0]]
 float32_t test_vcvts_f32_s32(int32_t a) {
   return vcvts_f32_s32(a);
 }
 
 // COMMON-LABEL: test_vcvtd_f64_s64
 // UNCONSTRAINED: [[TMP0:%.*]] = sitofp i64 %a to double
 // CONSTRAINED:   [[TMP0:%.*]] = call double @llvm.experimental.constrained.sitofp.f64.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     scvtf d{{[0-9]}}, x{{[0-9]+}}
 // COMMONIR:      ret double [[TMP0]]
 float64_t test_vcvtd_f64_s64(int64_t a) {
   return vcvtd_f64_s64(a);
 }
 
 // COMMON-LABEL: test_vcvts_f32_u32
 // UNCONSTRAINED: [[TMP0:%.*]] = uitofp i32 %a to float
 // CONSTRAINED:   [[TMP0:%.*]] = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     ucvtf s{{[0-9]+}}, w{{[0-9]+}}
 // COMMONIR:      ret float [[TMP0]]
 float32_t test_vcvts_f32_u32(uint32_t a) {
   return vcvts_f32_u32(a);
 }
 
 // XXX should verify the type of registers
 // COMMON-LABEL: test_vcvtd_f64_u64
 // UNCONSTRAINED: [[TMP0:%.*]] = uitofp i64 %a to double
 // CONSTRAINED:   [[TMP0:%.*]] = call double @llvm.experimental.constrained.uitofp.f64.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     ucvtf d{{[0-9]}}, x{{[0-9]+}}
 // COMMONIR:      ret double [[TMP0]]
 float64_t test_vcvtd_f64_u64(uint64_t a) {
   return vcvtd_f64_u64(a);
 }
 
 // COMMON-LABEL: test_vceqs_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq float %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCMPD_I]]
 uint32_t test_vceqs_f32(float32_t a, float32_t b) {
   return (uint32_t)vceqs_f32(a, b);
 }
 
 // COMMON-LABEL: test_vceqd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq double %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCMPD_I]]
 uint64_t test_vceqd_f64(float64_t a, float64_t b) {
   return (uint64_t)vceqd_f64(a, b);
 }
 
 // COMMON-LABEL: test_vceqzs_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq float %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
 // COMMONIR:      [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCEQZ_I]]
 uint32_t test_vceqzs_f32(float32_t a) {
   return (uint32_t)vceqzs_f32(a);
 }
 
 // COMMON-LABEL: test_vceqzd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq double %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
 // COMMONIR:      [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCEQZ_I]]
 uint64_t test_vceqzd_f64(float64_t a) {
   return (uint64_t)vceqzd_f64(a);
 }
 
 // COMMON-LABEL: test_vcges_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge float %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCMPD_I]]
 uint32_t test_vcges_f32(float32_t a, float32_t b) {
   return (uint32_t)vcges_f32(a, b);
 }
 
 // COMMON-LABEL: test_vcged_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge double %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCMPD_I]]
 uint64_t test_vcged_f64(float64_t a, float64_t b) {
   return (uint64_t)vcged_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcgezs_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge float %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
 // COMMONIR:      [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCGEZ_I]]
 uint32_t test_vcgezs_f32(float32_t a) {
   return (uint32_t)vcgezs_f32(a);
 }
 
 // COMMON-LABEL: test_vcgezd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge double %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
 // COMMONIR:      [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCGEZ_I]]
 uint64_t test_vcgezd_f64(float64_t a) {
   return (uint64_t)vcgezd_f64(a);
 }
 
 // COMMON-LABEL: test_vcgts_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt float %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCMPD_I]]
 uint32_t test_vcgts_f32(float32_t a, float32_t b) {
   return (uint32_t)vcgts_f32(a, b);
 }
 
 // COMMON-LABEL: test_vcgtd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt double %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCMPD_I]]
 uint64_t test_vcgtd_f64(float64_t a, float64_t b) {
   return (uint64_t)vcgtd_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcgtzs_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt float %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
 // COMMONIR:      [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCGTZ_I]]
 uint32_t test_vcgtzs_f32(float32_t a) {
   return (uint32_t)vcgtzs_f32(a);
 }
 
 // COMMON-LABEL: test_vcgtzd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt double %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
 // COMMONIR:      [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCGTZ_I]]
 uint64_t test_vcgtzd_f64(float64_t a) {
   return (uint64_t)vcgtzd_f64(a);
 }
 
 // COMMON-LABEL: test_vcles_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole float %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCMPD_I]]
 uint32_t test_vcles_f32(float32_t a, float32_t b) {
   return (uint32_t)vcles_f32(a, b);
 }
 
 // COMMON-LABEL: test_vcled_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole double %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCMPD_I]]
 uint64_t test_vcled_f64(float64_t a, float64_t b) {
   return (uint64_t)vcled_f64(a, b);
 }
 
 // COMMON-LABEL: test_vclezs_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole float %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
 // COMMONIR:      [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCLEZ_I]]
 uint32_t test_vclezs_f32(float32_t a) {
   return (uint32_t)vclezs_f32(a);
 }
 
 // COMMON-LABEL: test_vclezd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole double %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
 // COMMONIR:      [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCLEZ_I]]
 uint64_t test_vclezd_f64(float64_t a) {
   return (uint64_t)vclezd_f64(a);
 }
 
 // COMMON-LABEL: test_vclts_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt float %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, s{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCMPD_I]]
 uint32_t test_vclts_f32(float32_t a, float32_t b) {
   return (uint32_t)vclts_f32(a, b);
 }
 
 // COMMON-LABEL: test_vcltd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt double %a, %b
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, d{{[0-9]+}}
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
 // COMMONIR:      [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCMPD_I]]
 uint64_t test_vcltd_f64(float64_t a, float64_t b) {
   return (uint64_t)vcltd_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcltzs_f32
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt float %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp s{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
 // COMMONIR:      [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i32
 // COMMONIR:      ret i32 [[VCLTZ_I]]
 uint32_t test_vcltzs_f32(float32_t a) {
   return (uint32_t)vcltzs_f32(a);
 }
 
 // COMMON-LABEL: test_vcltzd_f64
 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt double %a, 0.000000e+00
 // CONSTRAINED:   [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f64(double %a, double 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:     fcmp d{{[0-9]+}}, #0.0
-// CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
 // COMMONIR:      [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i64
 // COMMONIR:      ret i64 [[VCLTZ_I]]
 uint64_t test_vcltzd_f64(float64_t a) {
   return (uint64_t)vcltzd_f64(a);
 }
 
 // COMMON-LABEL: test_vadd_f64
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <1 x double> %a, %b
 // CONSTRAINED:   [[ADD_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fadd.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[ADD_I]]
 float64x1_t test_vadd_f64(float64x1_t a, float64x1_t b) {
   return vadd_f64(a, b);
 }
 
 // COMMON-LABEL: test_vmul_f64
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %a, %b
 // CONSTRAINED:   [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[MUL_I]]
 float64x1_t test_vmul_f64(float64x1_t a, float64x1_t b) {
   return vmul_f64(a, b);
 }
 
 // COMMON-LABEL: test_vdiv_f64
 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <1 x double> %a, %b
 // CONSTRAINED:   [[DIV_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fdiv.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fdiv d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[DIV_I]]
 float64x1_t test_vdiv_f64(float64x1_t a, float64x1_t b) {
   return vdiv_f64(a, b);
 }
 
 // COMMON-LABEL: test_vmla_f64
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %b, %c
 // CONSTRAINED:   [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %b, <1 x double> %c, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <1 x double> %a, [[MUL_I]]
 // CONSTRAINED:   [[ADD_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fadd.v1f64(<1 x double> %a, <1 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[ADD_I]]
 float64x1_t test_vmla_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
   return vmla_f64(a, b, c);
 }
 
 // COMMON-LABEL: test_vmls_f64
 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %b, %c
 // CONSTRAINED:   [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %b, <1 x double> %c, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <1 x double> %a, [[MUL_I]]
 // CONSTRAINED:   [[SUB_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fsub.v1f64(<1 x double> %a, <1 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[SUB_I]]
 float64x1_t test_vmls_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
   return vmls_f64(a, b, c);
 }
 
 // COMMON-LABEL: test_vfma_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> %b, <1 x double> %c, <1 x double> %a)
 // CONSTRAINED:   [[TMP3:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> %b, <1 x double> %c, <1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[TMP3]]
 float64x1_t test_vfma_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
   return vfma_f64(a, b, c);
 }
 
 // COMMON-LABEL: test_vfms_f64
 // COMMONIR:      [[SUB_I:%.*]] = fneg <1 x double> %b
-// CHECK-ASM:     fneg d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // COMMONIR:      [[TMP1:%.*]] = bitcast <1 x double> [[SUB_I]] to <8 x i8>
 // COMMONIR:      [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8>
 // UNCONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[SUB_I]], <1 x double> %c, <1 x double> %a)
 // CONSTRAINED:   [[TMP3:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> [[SUB_I]], <1 x double> %c, <1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[TMP3]]
 float64x1_t test_vfms_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
   return vfms_f64(a, b, c);
 }
 
 // COMMON-LABEL: test_vsub_f64
 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <1 x double> %a, %b
 // CONSTRAINED:   [[SUB_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fsub.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[SUB_I]]
 float64x1_t test_vsub_f64(float64x1_t a, float64x1_t b) {
   return vsub_f64(a, b);
 }
 
 // COMMON-LABEL: test_vcvt_s64_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
-// UNCONSTRAINED: [[TMP1:%.*]] = fptosi <1 x double> %a to <1 x i64>
-// CONSTRAINED:   [[TMP1:%.*]] = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM:     fcvtzs x{{[0-9]+}}, d{{[0-9]+}}
+// COMMONIR:      [[TMP1:%.*]] = call <1 x i64> @llvm.aarch64.neon.fcvtzs.v1i64.v1f64(<1 x double> %a)
 // COMMONIR:      ret <1 x i64> [[TMP1]]
 int64x1_t test_vcvt_s64_f64(float64x1_t a) {
   return vcvt_s64_f64(a);
 }
 
 // COMMON-LABEL: test_vcvt_u64_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
-// UNCONSTRAINED: [[TMP1:%.*]] = fptoui <1 x double> %a to <1 x i64>
-// CONSTRAINED:   [[TMP1:%.*]] = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM:     fcvtzu x{{[0-9]+}}, d{{[0-9]+}}
+// COMMONIR:      [[TMP1:%.*]] = call <1 x i64> @llvm.aarch64.neon.fcvtzu.v1i64.v1f64(<1 x double> %a)
 // COMMONIR:      ret <1 x i64> [[TMP1]]
 uint64x1_t test_vcvt_u64_f64(float64x1_t a) {
   return vcvt_u64_f64(a);
 }
 
 // COMMON-LABEL: test_vcvt_f64_s64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
 // UNCONSTRAINED: [[VCVT_I:%.*]] = sitofp <1 x i64> %a to <1 x double>
 // CONSTRAINED:   [[VCVT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i64(<1 x i64> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     scvtf d{{[0-9]+}}, x{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VCVT_I]]
 float64x1_t test_vcvt_f64_s64(int64x1_t a) {
   return vcvt_f64_s64(a);
 }
 
 // COMMON-LABEL: test_vcvt_f64_u64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
 // UNCONSTRAINED: [[VCVT_I:%.*]] = uitofp <1 x i64> %a to <1 x double>
 // CONSTRAINED:   [[VCVT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i64(<1 x i64> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     ucvtf d{{[0-9]+}}, x{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VCVT_I]]
 float64x1_t test_vcvt_f64_u64(uint64x1_t a) {
   return vcvt_f64_u64(a);
 }
 
 // COMMON-LABEL: test_vrnda_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VRNDA1_I:%.*]] = call <1 x double> @llvm.round.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VRNDA1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.round.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM:     frinta d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VRNDA1_I]]
 float64x1_t test_vrnda_f64(float64x1_t a) {
   return vrnda_f64(a);
 }
 
 // COMMON-LABEL: test_vrndp_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VRNDP1_I:%.*]] = call <1 x double> @llvm.ceil.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VRNDP1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.ceil.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM:     frintp d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VRNDP1_I]]
 float64x1_t test_vrndp_f64(float64x1_t a) {
   return vrndp_f64(a);
 }
 
 // COMMON-LABEL: test_vrndm_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VRNDM1_I:%.*]] = call <1 x double> @llvm.floor.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VRNDM1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.floor.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM:     frintm d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VRNDM1_I]]
 float64x1_t test_vrndm_f64(float64x1_t a) {
   return vrndm_f64(a);
 }
 
 // COMMON-LABEL: test_vrndx_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VRNDX1_I:%.*]] = call <1 x double> @llvm.rint.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VRNDX1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.rint.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     frintx d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VRNDX1_I]]
 float64x1_t test_vrndx_f64(float64x1_t a) {
   return vrndx_f64(a);
 }
 
 // COMMON-LABEL: test_vrnd_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VRNDZ1_I:%.*]] = call <1 x double> @llvm.trunc.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VRNDZ1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.trunc.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
-// CHECK-ASM:     frintz d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VRNDZ1_I]]
 float64x1_t test_vrnd_f64(float64x1_t a) {
   return vrnd_f64(a);
 }
 
 // COMMON-LABEL: test_vrndi_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <1 x double> @llvm.nearbyint.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VRNDI1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.nearbyint.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     frinti d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VRNDI1_I]]
 float64x1_t test_vrndi_f64(float64x1_t a) {
   return vrndi_f64(a);
 }
 
 // COMMON-LABEL: test_vsqrt_f64
 // COMMONIR:      [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
 // UNCONSTRAINED: [[VSQRT_I:%.*]] = call <1 x double> @llvm.sqrt.v1f64(<1 x double> %a)
 // CONSTRAINED:   [[VSQRT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.sqrt.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:     fsqrt d{{[0-9]+}}, d{{[0-9]+}}
 // COMMONIR:      ret <1 x double> [[VSQRT_I]]
 float64x1_t test_vsqrt_f64(float64x1_t a) {
   return vsqrt_f64(a);
 }

clang/test/CodeGen/aarch64-v8.2a-fp16-intrinsics-constrained.c

 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
 // RUN: -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
-// RUN: -ffp-exception-behavior=strict -emit-llvm -o - %s | opt -S -mem2reg \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
-// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16 \
-// RUN: -ffp-exception-behavior=strict \
-// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone -o - %s \
-// RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
+// RUN: -ffp-exception-behavior=strict -fexperimental-strict-floating-point -emit-llvm -o - %s | opt -S -mem2reg \
+// RUN: | FileCheck --check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
 
 // REQUIRES: aarch64-registered-target
 
-// "Lowering of strict fp16 not yet implemented"
-// XFAIL: *
-
 #include <arm_fp16.h>
 
 // COMMON-LABEL: test_vceqzh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp oeq half %a, 0xH0000
 // CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, eq
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vceqzh_f16(float16_t a) {
   return vceqzh_f16(a);
 }
 
 // COMMON-LABEL: test_vcgezh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp oge half %a, 0xH0000
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, ge
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"oge", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vcgezh_f16(float16_t a) {
   return vcgezh_f16(a);
 }
 
 // COMMON-LABEL: test_vcgtzh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp ogt half %a, 0xH0000
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, gt
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"ogt", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vcgtzh_f16(float16_t a) {
   return vcgtzh_f16(a);
 }
 
 // COMMON-LABEL: test_vclezh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp ole half %a, 0xH0000
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, ls
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"ole", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vclezh_f16(float16_t a) {
   return vclezh_f16(a);
 }
 
 // COMMON-LABEL: test_vcltzh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp olt half %a, 0xH0000
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half 0xH0000, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, mi
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half 0xH0000, metadata !"olt", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vcltzh_f16(float16_t a) {
   return vcltzh_f16(a);
 }
 
 // COMMON-LABEL: test_vcvth_f16_s16
 // UNCONSTRAINED:  [[VCVT:%.*]] = sitofp i16 %a to half
 // CONSTRAINED:    [[VCVT:%.*]] = call half @llvm.experimental.constrained.sitofp.f16.i16(i16 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      scvtf
 // COMMONIR:       ret half [[VCVT]]
 float16_t test_vcvth_f16_s16 (int16_t a) {
   return vcvth_f16_s16(a);
 }
 
 // COMMON-LABEL: test_vcvth_f16_s32
 // UNCONSTRAINED:  [[VCVT:%.*]] = sitofp i32 %a to half
 // CONSTRAINED:    [[VCVT:%.*]] = call half @llvm.experimental.constrained.sitofp.f16.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      scvtf
 // COMMONIR:       ret half [[VCVT]]
 float16_t test_vcvth_f16_s32 (int32_t a) {
   return vcvth_f16_s32(a);
 }
 
 // COMMON-LABEL: test_vcvth_f16_s64
 // UNCONSTRAINED:  [[VCVT:%.*]] = sitofp i64 %a to half
 // CONSTRAINED:    [[VCVT:%.*]] = call half @llvm.experimental.constrained.sitofp.f16.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      scvtf
 // COMMONIR:       ret half [[VCVT]]
 float16_t test_vcvth_f16_s64 (int64_t a) {
   return vcvth_f16_s64(a);
 }
 
 // COMMON-LABEL: test_vcvth_f16_u16
 // UNCONSTRAINED:  [[VCVT:%.*]] = uitofp i16 %a to half
 // CONSTRAINED:  [[VCVT:%.*]] = call half @llvm.experimental.constrained.uitofp.f16.i16(i16 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      ucvtf
 // COMMONIR:       ret half [[VCVT]]
 float16_t test_vcvth_f16_u16 (uint16_t a) {
   return vcvth_f16_u16(a);
 }
 
 // COMMON-LABEL: test_vcvth_f16_u32
 // UNCONSTRAINED:  [[VCVT:%.*]] = uitofp i32 %a to half
 // CONSTRAINED:    [[VCVT:%.*]] = call half @llvm.experimental.constrained.uitofp.f16.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      ucvtf
 // COMMONIR:  ret half [[VCVT]]
 float16_t test_vcvth_f16_u32 (uint32_t a) {
   return vcvth_f16_u32(a);
 }
 
 // COMMON-LABEL: test_vcvth_f16_u64
 // UNCONSTRAINED:  [[VCVT:%.*]] = uitofp i64 %a to half
 // CONSTRAINED:    [[VCVT:%.*]] = call half @llvm.experimental.constrained.uitofp.f16.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      ucvtf
 // COMMONIR:       ret half [[VCVT]]
 float16_t test_vcvth_f16_u64 (uint64_t a) {
   return vcvth_f16_u64(a);
 }
 
 // COMMON-LABEL: test_vcvth_s16_f16
-// UNCONSTRAINED:  [[VCVT:%.*]] = fptosi half %a to i16
-// CONSTRAINED:    [[VCVT:%.*]] = call i16 @llvm.experimental.constrained.fptosi.i16.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      fcvt  [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM:      fcvtzs {{w[0-9]+}}, [[CVTREG]]
-// COMMONIR:       ret i16 [[VCVT]]
+// COMMONIR:       [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f16(half %a)
+// COMMONIR:       [[TRUNC:%.*]] = trunc i32 [[VCVT]] to i16
+// COMMONIR:       ret i16 [[TRUNC]]
 int16_t test_vcvth_s16_f16 (float16_t a) {
   return vcvth_s16_f16(a);
 }
 
 // COMMON-LABEL: test_vcvth_s32_f16
-// UNCONSTRAINED:  [[VCVT:%.*]] = fptosi half %a to i32
-// CONSTRAINED:    [[VCVT:%.*]] = call i32 @llvm.experimental.constrained.fptosi.i32.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      fcvt  [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM:      fcvtzs {{w[0-9]+}}, [[CVTREG]]
+// COMMONIR:       [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f16(half %a)
 // COMMONIR:       ret i32 [[VCVT]]
 int32_t test_vcvth_s32_f16 (float16_t a) {
   return vcvth_s32_f16(a);
 }
 
 // COMMON-LABEL: test_vcvth_s64_f16
-// UNCONSTRAINED:  [[VCVT:%.*]] = fptosi half %a to i64
-// CONSTRAINED:    [[VCVT:%.*]] = call i64 @llvm.experimental.constrained.fptosi.i64.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      fcvt  [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM:      fcvtzs {{x[0-9]+}}, [[CVTREG]]
+// COMMONIR:       [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f16(half %a)
 // COMMONIR:       ret i64 [[VCVT]]
 int64_t test_vcvth_s64_f16 (float16_t a) {
   return vcvth_s64_f16(a);
 }
 
 // COMMON-LABEL: test_vcvth_u16_f16
-// UNCONSTRAINED:  [[VCVT:%.*]] = fptoui half %a to i16
-// CONSTRAINED:    [[VCVT:%.*]] = call i16 @llvm.experimental.constrained.fptoui.i16.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      fcvt  [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM:      fcvtzu {{w[0-9]+}}, [[CVTREG]]
-// COMMONIR:       ret i16 [[VCVT]]
+// COMMONIR:       [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f16(half %a)
+// COMMONIR:       [[TRUNC:%.*]] = trunc i32 [[VCVT]] to i16
+// COMMONIR:       ret i16 [[TRUNC]]
 uint16_t test_vcvth_u16_f16 (float16_t a) {
   return vcvth_u16_f16(a);
 }
 
 // COMMON-LABEL: test_vcvth_u32_f16
-// UNCONSTRAINED:  [[VCVT:%.*]] = fptoui half %a to i32
-// CONSTRAINED:    [[VCVT:%.*]] = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      fcvt  [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM:      fcvtzu {{w[0-9]+}}, [[CVTREG]]
+// COMMONIR:       [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f16(half %a)
 // COMMONIR:       ret i32 [[VCVT]]
 uint32_t test_vcvth_u32_f16 (float16_t a) {
   return vcvth_u32_f16(a);
 }
 
 // COMMON-LABEL: test_vcvth_u64_f16
-// UNCONSTRAINED:  [[VCVT:%.*]] = fptoui half %a to i64
-// CONSTRAINED:    [[VCVT:%.*]] = call i64 @llvm.experimental.constrained.fptoui.i64.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      fcvt  [[CVTREG:s[0-9]+]], {{h[0-9]+}}
-// CHECK-ASM:      fcvtzu {{x[0-9]+}}, [[CVTREG]]
+// COMMONIR:       [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f16(half %a)
 // COMMONIR:       ret i64 [[VCVT]]
 uint64_t test_vcvth_u64_f16 (float16_t a) {
   return vcvth_u64_f16(a);
 }
 
 // COMMON-LABEL: test_vrndh_f16
 // UNCONSTRAINED:  [[RND:%.*]] = call half @llvm.trunc.f16(half %a)
 // CONSTRAINED:    [[RND:%.*]] = call half @llvm.experimental.constrained.trunc.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      frintz
 // COMMONIR:       ret half [[RND]]
 float16_t test_vrndh_f16(float16_t a) {
   return vrndh_f16(a);
 }
 
 // COMMON-LABEL: test_vrndah_f16
 // UNCONSTRAINED:  [[RND:%.*]] = call half @llvm.round.f16(half %a)
 // CONSTRAINED:    [[RND:%.*]] = call half @llvm.experimental.constrained.round.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      frinta
 // COMMONIR:       ret half [[RND]]
 float16_t test_vrndah_f16(float16_t a) {
   return vrndah_f16(a);
 }
 
 // COMMON-LABEL: test_vrndih_f16
 // UNCONSTRAINED:  [[RND:%.*]] = call half @llvm.nearbyint.f16(half %a)
 // CONSTRAINED:    [[RND:%.*]] = call half @llvm.experimental.constrained.nearbyint.f16(half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      frinti
 // COMMONIR:       ret half [[RND]]
 float16_t test_vrndih_f16(float16_t a) {
   return vrndih_f16(a);
 }
 
 // COMMON-LABEL: test_vrndmh_f16
 // UNCONSTRAINED:  [[RND:%.*]] = call half @llvm.floor.f16(half %a)
 // CONSTRAINED:    [[RND:%.*]] = call half @llvm.experimental.constrained.floor.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      frintm
 // COMMONIR:       ret half [[RND]]
 float16_t test_vrndmh_f16(float16_t a) {
   return vrndmh_f16(a);
 }
 
 // COMMON-LABEL: test_vrndph_f16
 // UNCONSTRAINED:  [[RND:%.*]] = call half @llvm.ceil.f16(half %a)
 // CONSTRAINED:    [[RND:%.*]] = call half @llvm.experimental.constrained.ceil.f16(half %a, metadata !"fpexcept.strict")
-// CHECK-ASM:      frintp
 // COMMONIR:       ret half [[RND]]
 float16_t test_vrndph_f16(float16_t a) {
   return vrndph_f16(a);
 }
 
 // COMMON-LABEL: test_vrndxh_f16
 // UNCONSTRAINED:  [[RND:%.*]] = call half @llvm.rint.f16(half %a)
 // CONSTRAINED:    [[RND:%.*]] = call half @llvm.experimental.constrained.rint.f16(half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      frintx
 // COMMONIR:       ret half [[RND]]
 float16_t test_vrndxh_f16(float16_t a) {
   return vrndxh_f16(a);
 }
 
 // COMMON-LABEL: test_vsqrth_f16
 // UNCONSTRAINED:  [[SQR:%.*]] = call half @llvm.sqrt.f16(half %a)
 // CONSTRAINED:    [[SQR:%.*]] = call half @llvm.experimental.constrained.sqrt.f16(half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fsqrt
 // COMMONIR:       ret half [[SQR]]
 float16_t test_vsqrth_f16(float16_t a) {
   return vsqrth_f16(a);
 }
 
 // COMMON-LABEL: test_vaddh_f16
 // UNCONSTRAINED:  [[ADD:%.*]] = fadd half %a, %b
 // CONSTRAINED:    [[ADD:%.*]] = call half @llvm.experimental.constrained.fadd.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fadd
 // COMMONIR:       ret half [[ADD]]
 float16_t test_vaddh_f16(float16_t a, float16_t b) {
   return vaddh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vceqh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp oeq half %a, %b
 // CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"oeq", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, eq
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vceqh_f16(float16_t a, float16_t b) {
   return vceqh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vcgeh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp oge half %a, %b
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"oge", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, ge
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"oge", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vcgeh_f16(float16_t a, float16_t b) {
   return vcgeh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vcgth_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp ogt half %a, %b
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"ogt", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, gt
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"ogt", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vcgth_f16(float16_t a, float16_t b) {
   return vcgth_f16(a, b);
 }
 
 // COMMON-LABEL: test_vcleh_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp ole half %a, %b
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"ole", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, ls
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"ole", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vcleh_f16(float16_t a, float16_t b) {
   return vcleh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vclth_f16
 // UNCONSTRAINED:  [[TMP1:%.*]] = fcmp olt half %a, %b
-// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f16(half %a, half %b, metadata !"olt", metadata !"fpexcept.strict")
-// CHECK-ASM:      fcmp
-// CHECK-ASM:      cset {{w[0-9]+}}, mi
+// CONSTRAINED:    [[TMP1:%.*]] = call i1 @llvm.experimental.constrained.fcmps.f16(half %a, half %b, metadata !"olt", metadata !"fpexcept.strict")
 // COMMONIR:       [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
 // COMMONIR:       ret i16 [[TMP2]]
 uint16_t test_vclth_f16(float16_t a, float16_t b) {
   return vclth_f16(a, b);
 }
 
 // COMMON-LABEL: test_vdivh_f16
 // UNCONSTRAINED:  [[DIV:%.*]] = fdiv half %a, %b
 // CONSTRAINED:    [[DIV:%.*]] = call half @llvm.experimental.constrained.fdiv.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fdiv
 // COMMONIR:       ret half [[DIV]]
 float16_t test_vdivh_f16(float16_t a, float16_t b) {
   return vdivh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vmulh_f16
 // UNCONSTRAINED:  [[MUL:%.*]] = fmul half %a, %b
 // CONSTRAINED:  [[MUL:%.*]] = call half @llvm.experimental.constrained.fmul.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fmul
 // COMMONIR:       ret half [[MUL]]
 float16_t test_vmulh_f16(float16_t a, float16_t b) {
   return vmulh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vsubh_f16
 // UNCONSTRAINED:  [[SUB:%.*]] = fsub half %a, %b
 // CONSTRAINED:    [[SUB:%.*]] = call half @llvm.experimental.constrained.fsub.f16(half %a, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fsub
 // COMMONIR:       ret half [[SUB]]
 float16_t test_vsubh_f16(float16_t a, float16_t b) {
   return vsubh_f16(a, b);
 }
 
 // COMMON-LABEL: test_vfmah_f16
 // UNCONSTRAINED:  [[FMA:%.*]] = call half @llvm.fma.f16(half %b, half %c, half %a)
 // CONSTRAINED:    [[FMA:%.*]] = call half @llvm.experimental.constrained.fma.f16(half %b, half %c, half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fmadd
 // COMMONIR:       ret half [[FMA]]
 float16_t test_vfmah_f16(float16_t a, float16_t b, float16_t c) {
   return vfmah_f16(a, b, c);
 }
 
 // COMMON-LABEL: test_vfmsh_f16
 // UNCONSTRAINED:  [[SUB:%.*]] = fsub half 0xH8000, %b
 // CONSTRAINED:    [[SUB:%.*]] = call half @llvm.experimental.constrained.fsub.f16(half 0xH8000, half %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
 // UNCONSTRAINED:  [[ADD:%.*]] = call half @llvm.fma.f16(half [[SUB]], half %c, half %a)
 // CONSTRAINED:    [[ADD:%.*]] = call half @llvm.experimental.constrained.fma.f16(half [[SUB]], half %c, half %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
-// CHECK-ASM:      fmsub
 // COMMONIR:       ret half [[ADD]]
 float16_t test_vfmsh_f16(float16_t a, float16_t b, float16_t c) {
   return vfmsh_f16(a, b, c);
 }