[mlir][Vector] Enable create_mask for scalable vectors

[jsetoain]

Summary

The way vector.create_mask is currently lowered is
vector-length-dependent, and therefore incompatible with scalable vector
types. This patch adds an alternative lowering path for create_mask
operations that return a scalable vector mask.

[jsetoain]

Please block the patch for now, this is just something I'm thinking about, I'm also opening a post in discourse to get some feedback.

[jsetoain]

This is the discussion thread: Vector.create_mask for scalable vectors

[jsetoain]

Fix create mask folder. Move create_mask on scalable vectors from
VectorTransforms to ConvertVectorToLLVM

[jsetoain]

Switching to llvm.intr.experimental.stepvector for lowering. This fixes
consistency issues with fixed-length create_mask operations.

[c-rhodes]

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

919–920

this optimisation seems odd, I can't imagine there's any hardware out there with vectors approaching 2^64 elements (and 2^32 for that matter). Can this option be removed and always default i32?

923

getScalableVectorType?

928

I know this is based on the fixed lowering, but I wonder if this should be ult.

[jsetoain]

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

919–920

The default is i32 (i.e.: optimize indices), but the fixed-length create_mask operation supports i64 indices so I believe it's only fair, for consistency, to support them for scalable vectors as well. Is it worth removing the option altogether? probably, but that should be a different patch :-)

923

It's broken and I'm not sure how to fix it. It's in the backlog.

928

If you do ult you have the same "wrap around" problem. It has to be signed in case the index is negative. There's a discussion here: [[ https://reviews.llvm.org/D116069 | [mlir][vector] Allow values outside of [0; dim-size] in create_mask]] about why this is the preferred behavior.

[jsetoain]

Rebase on main

[c-rhodes]

Does this need a round-trip test in mlir/test/Dialect/Vector/ops.mlir?

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

919–920

The default is i32 (i.e.: optimize indices), but the fixed-length create_mask operation supports i64 indices so I believe it's only fair, for consistency, to support them for scalable vectors as well. Is it worth removing the option altogether? probably, but that should be a different patch :-)

I agree, better to be consistent and remove in another patch. Just an observation :)

928

If you do ult you have the same "wrap around" problem. It has to be signed in case the index is negative. There's a discussion here: [[ https://reviews.llvm.org/D116069 | [mlir][vector] Allow values outside of [0; dim-size] in create_mask]] about why this is the preferred behavior.

the vector.create_mask -> vector.constant_mask canonicalization for negative values should happen before this lowering?

[jsetoain]

Accept particular cases of scalable constant masks.

[jsetoain]

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

928

I've included the right flow and constrains for create_mask -> constant_mask canonicalization.

[c-rhodes]

mlir/include/mlir/Dialect/Vector/Transforms/VectorTransforms.h

94

nit: an

mlir/lib/Dialect/Vector/IR/VectorOps.cpp

4288

== 0? Or to be 0?

https://mlir.llvm.org/docs/Dialects/Vector/#vectorconstant_mask-mlirvectorconstantmaskop

Each value of ‘mask_dim_sizes’ must be non-negative and not greater than the size of the corresponding vector dimension (as opposed to vector.create_mask which allows this).

mlir/test/Dialect/Vector/ops.mlir

375 ↗

(On Diff #409701)

nit: unrelated change

[jsetoain]

Address comments

[c-rhodes]

LGTM, but I'm pretty new around these parts so I'll leave it to another reviewer to accept

[jsetoain]

@ftynse Hi Alex, I just wanted to kindly remind you about this patch, after the discussion in discourse nobody else seems to have anything against it, and it's currently blocking a stack of approved patches. Thank you!

[aartbik]

LGTM, let's wait for Alex.
Few remaining nits

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

1756

period at end

mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp

629

period at end

mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir

1460

although this will match

genbool_1d_scalable

is a better LABEL!

[jsetoain]

Address reviewer comments

[jsetoain]

Thanks for the review, Aart!

[dcaballe]

Thanks for the contribution, Javier! Some comments inline.

mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h

68

Add doc about what indexOptimizations is actually enabling?

mlir/include/mlir/Dialect/Vector/Transforms/VectorTransforms.h

99

Now that we are making this utility public, I wonder if it would make more sense to move it somewhere else since it's not a vector specific transformation, right? Maybe we could move it to the builder class? It looks like a builder method to me.

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

905

Would it make sense to align this lowering with the non-scalable version (i.e., moving it to Vector Transforms)? I think create_mask is a relatively high level op that would make sense to lower to something simpler before we lower it to LLVM. That would align with the approach that we follow for similar vector ops and would make the LLVM lowering simpler (which is complex already). (Hopefully I'm not missing any context. Feel free to ignore this comment you already discussed this).

919–920

+1 to removing this. It's a bit odd that we shrink the index type as part of the lowering. I think that kind of transformation should happen as a separate step before the lowering to LLVM.

[jsetoain]

Address reviewer comments

mlir/include/mlir/Dialect/Vector/Transforms/VectorTransforms.h

99

That creates an awkward dependency between common MLIR and the Arithmetic dialect, but it does make a lot of sense to move this to Arithmetic Utils (I've also renamed it to match similar utilities).

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

905

The reason to separate them was that the scalable lowering depends on LLVM IR much earlier than the fixed-length version. In a way, create_mask for scalable vectors is a lower level operations than create_mask for fixed-length vectors. If we move scalable create_mask to Vector Transforms, we add an additional dependency there. If we want to unify both lowerings, I think it would make more sense to move create_mask to conversions. There was some discussion in the thread I created for this, and the conclusion was that having two lowerings for one operation was not an issue. If that not the case any more or you think it doesn't apply to this case, I'm happy to move things around. It's a trivial change :-)

[ftynse]

mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h

66

Why not call it assume32BitIndices then?

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

911

Nit: no need for explicit mlir:: here.

mlir/lib/Dialect/Vector/IR/VectorOps.cpp

4324–4325

Use matchPattern(m_constantInt(...)) instead of explicitly matching for arith.constant here.

[ftynse]

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

919–920

Do you all know that the bitwidth of index is parameterized through the data layout mechanism? You can also define this as a full-fledged ConversionPattern, get hold of a TypeConverter instance and make it convert the actual IndexType to get you the integer type of the expected bitwidth. Anything else will run into type mismatches sooner or later.

[jsetoain]

Address reviewer comments

[jsetoain]

mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h

66

The only reason is that it is the name used elsewhere, but I agree it's not a great name. Once this has landed, I will push a NFC patch changing the name everywhere, probably to something like assume32BitVectorIndices to avoid confusion.

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

919–920

I believe this is handled independently from that mechanism because you might want to have IndexType to i64 conversion, and yet generate i32 indices in this very particular case. While your loop indices might go well beyond 2^32, the length of your physical vector is unlikely to do so.

[dcaballe]

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

905

If it was discussed already, it's fine then! We can align both lowerings in the future. We may have a better picture once we introduce further masking support.

The reason to separate them was that the scalable lowering depends on LLVM IR

What is missing on the MLIR side to be able to do the lowering? StepVectorOp?

[jsetoain]

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

905

StepVectorOp would unify the lowering, but, unless we find more use cases, I'm not sure its worth the change. The documentation of llvm.experimental.stepvector says that the recommended way to do this for fixed-length vectors is by using a constant vector. This would lead to a unification on the lowering of create_mask, but then a dual lowering for StepVectorOp (to the intrinsic or the constant vector, depending on scalability of result). I'd say it's just marginally better, if that. If as we expand mask creation and manipulation in MLIR we find this op is useful, I'll take care of unifying the lowering of this op.

mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h

 
 /// Collect a set of patterns to convert from Vector contractions to LLVM Matrix
 /// Intrinsics. To lower to assembly, the LLVM flag -lower-matrix-intrinsics
 /// will be needed when invoking LLVM.
 void populateVectorToLLVMMatrixConversionPatterns(LLVMTypeConverter &converter,
                                                   RewritePatternSet &patterns);
 
 /// Collect a set of patterns to convert from the Vector dialect to LLVM.
 void populateVectorToLLVMConversionPatterns(
     LLVMTypeConverter &converter, RewritePatternSet &patterns,
-    bool reassociateFPReductions = false);
+    bool reassociateFPReductions = false, bool indexOptimizations = false);
 
 /// Create a pass to convert vector operations to the LLVMIR dialect.
 std::unique_ptr<OperationPass<ModuleOp>> createConvertVectorToLLVMPass(
     const LowerVectorToLLVMOptions &options = LowerVectorToLLVMOptions());
 
 } // namespace mlir
 
 #endif // MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

 def LLVM_masked_compressstore
     : LLVM_IntrOp<"masked.compressstore", [], [0], [], 0> {
   let arguments = (ins LLVM_Type, LLVM_Type, LLVM_Type);
 }
 
 /// Create a call to vscale intrinsic.
 def LLVM_vscale : LLVM_IntrOp<"vscale", [0], [], [], 1>;
 
+/// Create a call to stepvector intrinsic
+def LLVM_StepVectorOp
+    : LLVM_IntrOp<"experimental.stepvector", [0], [], [NoSideEffect], 1> {
+  let arguments = (ins);
+  let results = (outs LLVM_Type:$res);
+  let assemblyFormat = "attr-dict `:` type($res)";
+}
+
 // Atomic operations.
 //
 
 def AtomicBinOpXchg : I64EnumAttrCase<"xchg", 0>;
 def AtomicBinOpAdd  : I64EnumAttrCase<"add", 1>;
 def AtomicBinOpSub  : I64EnumAttrCase<"sub", 2>;
 def AtomicBinOpAnd  : I64EnumAttrCase<"_and", 3>;
 def AtomicBinOpNand : I64EnumAttrCase<"nand", 4>;

mlir/include/mlir/Dialect/Vector/Transforms/VectorTransforms.h

 distributPointwiseVectorOp(OpBuilder &builder, Operation *op,
                            ArrayRef<Value> id, ArrayRef<int64_t> multiplicity,
                            const AffineMap &map);
 
 /// Implements transfer op write to read forwarding and dead transfer write
 /// optimizations.
 void transferOpflowOpt(FuncOp func);
 
+/// Create a cast from on index-like value (index or integer) to another
+/// index-like value. If the value type and the target type are the same, it
+/// returns the original value.
+Value createCastToIndexLike(PatternRewriter &rewriter, Location loc,
+                            Type targetType, Value value);
+
 } // namespace vector
 } // namespace mlir
 
 #endif // MLIR_DIALECT_VECTOR_TRANSFORMS_VECTORTRANSFORMS_H

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp

for (const auto &indexedSize :
       desc.setStride(rewriter, loc, index, stride);
     }
 
     rewriter.replaceOp(castOp, {desc});
     return success();
   }
 };
 
+/// Conversion pattern for a `vector.create_mask` (1-D scalable vectors only).
+/// Non-scalable versions of this operation are handled in Vector Transforms.
+class VectorCreateMaskOpRewritePattern
+    : public OpRewritePattern<vector::CreateMaskOp> {
+public:
+  explicit VectorCreateMaskOpRewritePattern(MLIRContext *context,
+                                            bool enableIndexOpt)
+      : mlir::OpRewritePattern<vector::CreateMaskOp>(context),
+        indexOptimizations(enableIndexOpt) {}
+
+  LogicalResult matchAndRewrite(vector::CreateMaskOp op,
+                                PatternRewriter &rewriter) const override {
+    auto dstType = op.getType();
+    if (dstType.getRank() != 1 || !dstType.cast<VectorType>().isScalable())
+      return failure();
+    IntegerType idxType =
+        indexOptimizations ? rewriter.getI32Type() : rewriter.getI64Type();
+    auto loc = op->getLoc();
+    Value indices = rewriter.create<LLVM::StepVectorOp>(
+        loc, LLVM::getVectorType(idxType, dstType.getShape()[0],
+                                 /*isScalable=*/true));
+    auto bound =
+        createCastToIndexLike(rewriter, loc, idxType, op.getOperand(0));
+    Value bounds = rewriter.create<SplatOp>(loc, indices.getType(), bound);
+    Value comp = rewriter.create<arith::CmpIOp>(loc, arith::CmpIPredicate::slt,
+                                                indices, bounds);
+    rewriter.replaceOp(op, comp);
+    return success();
+  }
+
+private:
+  const bool indexOptimizations;
+};
+
 class VectorPrintOpConversion : public ConvertOpToLLVMPattern<vector::PrintOp> {
 public:
   using ConvertOpToLLVMPattern<vector::PrintOp>::ConvertOpToLLVMPattern;
 
   // Proof-of-concept lowering implementation that relies on a small
   // runtime support library, which only needs to provide a few
   // printing methods (single value for all data types, opening/closing
   // bracket, comma, newline). The lowering fully unrolls a vector
matchAndRewrite(SplatOp splatOp, OpAdaptor adaptor,
     rewriter.replaceOp(splatOp, desc);
     return success();
   }
 };
 
 } // namespace
 
 /// Populate the given list with patterns that convert from Vector to LLVM.
-void mlir::populateVectorToLLVMConversionPatterns(
-    LLVMTypeConverter &converter, RewritePatternSet &patterns,
-    bool reassociateFPReductions) {
+void mlir::populateVectorToLLVMConversionPatterns(LLVMTypeConverter &converter,
+                                                  RewritePatternSet &patterns,
+                                                  bool reassociateFPReductions,
+                                                  bool indexOptimizations) {
   MLIRContext *ctx = converter.getDialect()->getContext();
   patterns.add<VectorFMAOpNDRewritePattern>(ctx);
   populateVectorInsertExtractStridedSliceTransforms(patterns);
   patterns.add<VectorReductionOpConversion>(converter, reassociateFPReductions);
+  patterns.add<VectorCreateMaskOpRewritePattern>(ctx, indexOptimizations);
   patterns
       .add<VectorBitCastOpConversion, VectorShuffleOpConversion,
            VectorExtractElementOpConversion, VectorExtractOpConversion,
            VectorFMAOp1DConversion, VectorInsertElementOpConversion,
            VectorInsertOpConversion, VectorPrintOpConversion,
            VectorTypeCastOpConversion, VectorScaleOpConversion,
            VectorLoadStoreConversion<vector::LoadOp, vector::LoadOpAdaptor>,
            VectorLoadStoreConversion<vector::MaskedLoadOp,

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp

void LowerVectorToLLVMPass::runOnOperation() {
   }
 
   // Convert to the LLVM IR dialect.
   LLVMTypeConverter converter(&getContext());
   RewritePatternSet patterns(&getContext());
   populateVectorMaskMaterializationPatterns(patterns, indexOptimizations);
   populateVectorTransferLoweringPatterns(patterns);
   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
-  populateVectorToLLVMConversionPatterns(converter, patterns,
-                                         reassociateFPReductions);
+  populateVectorToLLVMConversionPatterns(
+      converter, patterns, reassociateFPReductions, indexOptimizations);
   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
 
   // Architecture specific augmentations.
   LLVMConversionTarget target(getContext());
   target.addLegalDialect<arith::ArithmeticDialect>();
   target.addLegalDialect<memref::MemRefDialect>();
   target.addLegalDialect<StandardOpsDialect>();
   target.addLegalOp<UnrealizedConversionCastOp>();

mlir/lib/Dialect/Vector/IR/VectorOps.cpp

return emitOpError("expected all mask dim sizes to be zeros, "
                        "as a result of conjunction with zero mask dim");
   return success();
 }
 
 //===----------------------------------------------------------------------===//
 // CreateMaskOp
 //===----------------------------------------------------------------------===//
 
 LogicalResult CreateMaskOp::verify() {
   auto vectorType = getResult().getType().cast<VectorType>();
   // Verify that an operand was specified for each result vector each dimension.
   if (vectorType.getRank() == 0) {
     if (getNumOperands() != 1)
       return emitOpError(
           "must specify exactly one operand for 0-D create_mask");
   } else if (getNumOperands() !=
              getResult().getType().cast<VectorType>().getRank()) {
public:
   LogicalResult matchAndRewrite(CreateMaskOp createMaskOp,
                                 PatternRewriter &rewriter) const override {
     // Return if any of 'createMaskOp' operands are not defined by a constant.
     auto isNotDefByConstant = [](Value operand) {
       return !isa_and_nonnull<arith::ConstantIndexOp>(operand.getDefiningOp());
     };
     if (llvm::any_of(createMaskOp.operands(), isNotDefByConstant))
       return failure();
+    // Return if CreateMaskOp is scalable, folding makes no sense
+    if (createMaskOp.getType().cast<VectorType>().isScalable())
+      return failure();
     // Gather constant mask dimension sizes.
     SmallVector<int64_t, 4> maskDimSizes;
     for (auto it : llvm::zip(createMaskOp.operands(),
                              createMaskOp.getType().getShape())) {
       auto *defOp = std::get<0>(it).getDefiningOp();
       int64_t maxDimSize = std::get<1>(it);
       int64_t dimSize = cast<arith::ConstantIndexOp>(defOp).value();
       dimSize = std::min(dimSize, maxDimSize);
       // If one of dim sizes is zero, set all dims to zero.
       if (dimSize <= 0) {
         maskDimSizes.assign(createMaskOp.getType().getRank(), 0);
         break;
       }

mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp

 //===- VectorTransforms.cpp - Conversion within the Vector dialect --------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements target-independent rewrites as 1->N patterns.
 //
 //===----------------------------------------------------------------------===//
 
 #include <type_traits>
 
 #include "mlir/Dialect/Affine/IR/AffineOps.h"
 #include "mlir/Dialect/Arithmetic/IR/Arithmetic.h"
+#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
 #include "mlir/Dialect/Linalg/IR/Linalg.h"
 #include "mlir/Dialect/MemRef/IR/MemRef.h"
 #include "mlir/Dialect/SCF/SCF.h"
 #include "mlir/Dialect/Utils/StructuredOpsUtils.h"
 
 #include "mlir/Dialect/Vector/Transforms/VectorTransforms.h"
 #include "mlir/IR/ImplicitLocOpBuilder.h"
 #include "mlir/IR/Matchers.h"
if (rank == 0) {
       rewriter.replaceOpWithNewOp<arith::ConstantOp>(
           op, dstType,
           DenseIntElementsAttr::get(
               VectorType::get(ArrayRef<int64_t>{}, rewriter.getI1Type()),
               ArrayRef<bool>{value}));
       return success();
     }
 
     int64_t trueDim = std::min(dstType.getDimSize(0),
                                dimSizes[0].cast<IntegerAttr>().getInt());
 
     if (rank == 1) {
       // Express constant 1-D case in explicit vector form:
       //   [T,..,T,F,..,F].
       SmallVector<bool, 4> values(dstType.getDimSize(0));
       for (int64_t d = 0; d < trueDim; d++)
         values[d] = true;
LogicalResult matchAndRewrite(vector::BitCastOp bitcastOp,
     rewriter.replaceOpWithNewOp<vector::InsertStridedSliceOp>(
         bitcastOp, bitcastOp.getType(), newCastSrcOp, newCastDstOp, newOffsets,
         insertOp.strides());
 
     return success();
   }
 };
 
-static Value createCastToIndexLike(PatternRewriter &rewriter, Location loc,
-                                   Type targetType, Value value) {
+Value mlir::vector::createCastToIndexLike(PatternRewriter &rewriter,
+                                          Location loc, Type targetType,
+                                          Value value) {
   if (targetType == value.getType())
     return value;
 
   bool targetIsIndex = targetType.isIndex();
   bool valueIsIndex = value.getType().isIndex();
   if (targetIsIndex ^ valueIsIndex)
     return rewriter.create<arith::IndexCastOp>(loc, targetType, value);
 
public:
   explicit VectorCreateMaskOpConversion(MLIRContext *context,
                                         bool enableIndexOpt)
       : mlir::OpRewritePattern<vector::CreateMaskOp>(context),
         indexOptimizations(enableIndexOpt) {}
 
   LogicalResult matchAndRewrite(vector::CreateMaskOp op,
                                 PatternRewriter &rewriter) const override {
     auto dstType = op.getType();
+    if (dstType.cast<VectorType>().isScalable())
+      return failure();
     int64_t rank = dstType.getRank();
     if (rank > 1)
       return failure();
     rewriter.replaceOp(
         op, buildVectorComparison(rewriter, op, indexOptimizations,
                                   rank == 0 ? 0 : dstType.getDimSize(0),
                                   op.getOperand(0)));
     return success();

mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir

 // CMP64: %[[T4:.*]] = arith.cmpi slt, %[[T0]], %[[T3]] : vector<11xi64>
 // CMP64: return %[[T4]] : vector<11xi1>
 
 func @genbool_var_1d(%arg0: index) -> vector<11xi1> {
   %0 = vector.create_mask %arg0 : vector<11xi1>
   return %0 : vector<11xi1>
 }
 
+// CMP32-LABEL: @genbool_var_1d_scalable(
+// CMP32-SAME: %[[ARG:.*]]: index)
+// CMP32: %[[T0:.*]] = llvm.intr.experimental.stepvector : vector<[11]xi32>
+// CMP32: %[[T1:.*]] = arith.index_cast %[[ARG]] : index to i32
+// CMP32: %[[T2:.*]] = llvm.insertelement %[[T1]], %{{.*}}[%{{.*}} : i32] : vector<[11]xi32>
+// CMP32: %[[T3:.*]] = llvm.shufflevector %[[T2]], %{{.*}} [0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32] : vector<[11]xi32>, vector<[11]xi32>
+// CMP32: %[[T4:.*]] = arith.cmpi slt, %[[T0]], %[[T3]] : vector<[11]xi32>
+// CMP32: return %[[T4]] : vector<[11]xi1>
+
+// CMP64-LABEL: @genbool_var_1d_scalable(
+// CMP64-SAME: %[[ARG:.*]]: index)
+// CMP64: %[[T0:.*]] = llvm.intr.experimental.stepvector : vector<[11]xi64>
+// CMP64: %[[T1:.*]] = arith.index_cast %[[ARG]] : index to i64
+// CMP64: %[[T2:.*]] = llvm.insertelement %[[T1]], %{{.*}}[%{{.*}} : i32] : vector<[11]xi64>
+// CMP64: %[[T3:.*]] = llvm.shufflevector %[[T2]], %{{.*}} [0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32, 0 : i32] : vector<[11]xi64>, vector<[11]xi64>
+// CMP64: %[[T4:.*]] = arith.cmpi slt, %[[T0]], %[[T3]] : vector<[11]xi64>
+// CMP64: return %[[T4]] : vector<[11]xi1>
+
+func @genbool_var_1d_scalable(%arg0: index) -> vector<[11]xi1> {
+  %0 = vector.create_mask %arg0 : vector<[11]xi1>
+  return %0 : vector<[11]xi1>
+}
+
 // CMP32-LABEL: @transfer_read_1d
 // CMP32: %[[C:.*]] = arith.constant dense<[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]> : vector<16xi32>
 // CMP32: %[[A:.*]] = arith.addi %{{.*}}, %[[C]] : vector<16xi32>
 // CMP32: %[[M:.*]] = arith.cmpi slt, %[[A]], %{{.*}} : vector<16xi32>
 // CMP32: %[[L:.*]] = llvm.intr.masked.load %{{.*}}, %[[M]], %{{.*}}
 // CMP32: return %[[L]] : vector<16xf32>
 
 // CMP64-LABEL: @transfer_read_1d

mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir

 // CHECK: return %[[VAL_0]] : vector<8xi1>
 
 // -----
 
 func @genbool_2d() -> vector<4x4xi1> {
   %v = vector.constant_mask [2, 2] : vector<4x4xi1>
   return %v: vector<4x4xi1>
 }
 
 // CHECK-LABEL: func @genbool_2d
 // CHECK: %[[VAL_0:.*]] = arith.constant dense<[true, true, false, false]> : vector<4xi1>
 // CHECK: %[[VAL_1:.*]] = arith.constant dense<false> : vector<4x4xi1>
 // CHECK: %[[VAL_2:.*]] = builtin.unrealized_conversion_cast %[[VAL_1]] : vector<4x4xi1> to !llvm.array<4 x vector<4xi1>>
 // CHECK: %[[VAL_3:.*]] = llvm.insertvalue %[[VAL_0]], %[[VAL_2]][0] : !llvm.array<4 x vector<4xi1>>
 // CHECK: %[[VAL_4:.*]] = llvm.insertvalue %[[VAL_0]], %[[VAL_3]][1] : !llvm.array<4 x vector<4xi1>>
 // CHECK: %[[VAL_5:.*]] = builtin.unrealized_conversion_cast %[[VAL_4]] : !llvm.array<4 x vector<4xi1>> to vector<4x4xi1>
 // CHECK: return %[[VAL_5]] : vector<4x4xi1>

 // CHECK-SAME: %[[arg:.*]]: index
 // CHECK:  %[[indices:.*]] = arith.constant dense<[0, 1, 2, 3]> : vector<4xi32>
 // CHECK:  %[[arg_i32:.*]] = arith.index_cast %[[arg]] : index to i32
 // CHECK:  %[[boundsInsert:.*]] = llvm.insertelement %[[arg_i32]]
 // CHECK:  %[[bounds:.*]] = llvm.shufflevector %[[boundsInsert]]
 // CHECK:  %[[result:.*]] = arith.cmpi slt, %[[indices]], %[[bounds]] : vector<4xi32>
 // CHECK:  return %[[result]] : vector<4xi1>
 
+func @create_mask_1d_scalable(%a : index) -> vector<[4]xi1> {
+  %v = vector.create_mask %a : vector<[4]xi1>
+  return %v: vector<[4]xi1>
+}
+
+// CHECK-LABEL: func @create_mask_1d_scalable
+// CHECK-SAME: %[[arg:.*]]: index
+// CHECK:  %[[indices:.*]] = llvm.intr.experimental.stepvector : vector<[4]xi32>
+// CHECK:  %[[arg_i32:.*]] = arith.index_cast %[[arg]] : index to i32
+// CHECK:  %[[boundsInsert:.*]] = llvm.insertelement %[[arg_i32]], {{.*}} : vector<[4]xi32>
+// CHECK:  %[[bounds:.*]] = llvm.shufflevector %[[boundsInsert]], {{.*}} : vector<[4]xi32>, vector<[4]xi32>
+// CHECK:  %[[result:.*]] = arith.cmpi slt, %[[indices]], %[[bounds]] : vector<[4]xi32>
+// CHECK: return %[[result]] : vector<[4]xi1>
+
 // -----
 
 func @flat_transpose(%arg0: vector<16xf32>) -> vector<16xf32> {
   %0 = vector.flat_transpose %arg0 { rows = 4: i32, columns = 4: i32 }
      : vector<16xf32> -> vector<16xf32>
   return %0 : vector<16xf32>
 }