[XCOFF][FastISel] make fast isel can lower general intrinsics

[shchenz]

Summary

This patch is to make fast isel for 64bit XCOFF have the ability to select general intrinsics which will not be generated as function entry and function descriptor in the final assembly.

This hides some issues in SelectBasicBlock() -> Scheduler->EmitSchedule() for a single debug related intrinsic call, for example DBG_LABEL in D114685 and DBG_VALUE in D114686.

For example, for DBG_VALUE in patch D114686, the DBG_VALUE will be wrongly generated at the end of the function instead of the front like the IR shows, thus later DWARF info generation will miss generating some DWARF info(arguments/local variables) for the inlined subroutine.

We can fix this issue in EmitSchedule of course, but I think for our XCOFF case, the most sensible way is to let fast ISEL can lower these intrinsics calls so that we don't need to use DAG isel for these not well handled debug intrinsic calls in SelectBasicBlock() -> Scheduler->EmitSchedule().

[qiucf]

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

1784

• In this case, no extra instruction will be really emitted from this intrinsic, but what if it's an intrinsic producing a real function call?
• Is it necessary to put the check here, not in PPCFastISel::fastSelectInstruction?

llvm/test/CodeGen/PowerPC/debug-label-fast-isel.ll

3

nit: remove top empty line and use llc < %s -mtriple ... | FileCheck ...

[nemanjai]

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

1784

• In this case, no extra instruction will be really emitted from this intrinsic, but what if it's an intrinsic producing a real function call?

I don't think this is an issue since FastISel::selectIntrinsicCall() only handles a fixed list of intrinsics and the rest are handled in FastISel::fastLowerIntrinsicCall() which we don't override.

• Is it necessary to put the check here, not in PPCFastISel::fastSelectInstruction?

+1
The fact that we have the same check in both places seems odd and problematic. And the fact that we are now diverging with those two checks is even stranger.

[shchenz]

address comments

[shchenz]

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

1784

I deleted the redundant logic in PPCFastISel::fastSelectInstruction for Instruction::Call. It is exactly the same as the one in the target-independent one. And PowerPC will also use the target-independent ISel.

[shchenz]

gentle ping

[shchenz]

gentle ping

[shchenz]

gentle ping

[shchenz]

gentle ping

[craig.topper]

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

1784

Use isa instead of dyn_cast.

[shchenz]

comment address

[qiucf]

nit: Rename debug-label-fast-isel.ll to debug-label-fast-isel-xcoff.ll?

[shchenz]

In D114778#3226718, @qiucf wrote:

nit: Rename debug-label-fast-isel.ll to debug-label-fast-isel-xcoff.ll?

Is this renaming from a public guideline? To me, it should be easy to know that this file is AIX only after checking the file.

[qiucf]

LGTM.

In D114778#3226719, @shchenz wrote:

Is this renaming from a public guideline? To me, it should be easy to know that this file is AIX only after checking the file.

Not necessary.

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

case Instruction::Alloca:
     // FunctionLowering has the static-sized case covered.
     if (FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(I)))
       return true;
 
     // Dynamic-sized alloca is not handled yet.
     return false;
 
   case Instruction::Call:
-    // On AIX, call lowering uses the DAG-ISEL path currently so that the
+    // On AIX, normal call lowering uses the DAG-ISEL path currently so that the
     // callee of the direct function call instruction will be mapped to the
     // symbol for the function's entry point, which is distinct from the
     // function descriptor symbol. The latter is the symbol whose XCOFF symbol
     // name is the C-linkage name of the source level function.
-    if (TM.getTargetTriple().isOSAIX())
+    // But fast isel still has the ability to do selection for intrinsics.
+    if (TM.getTargetTriple().isOSAIX() && !isa<IntrinsicInst>(I))
       return false;
     return selectCall(I);
 
   case Instruction::BitCast:
     return selectBitCast(I);
 
   case Instruction::FPToSI:
     return selectCast(I, ISD::FP_TO_SINT);

llvm/lib/Target/PowerPC/PPCFastISel.cpp

switch (I->getOpcode()) {
     case Instruction::FPToUI:
       return SelectFPToI(I, /*IsSigned*/ false);
     case Instruction::Add:
       return SelectBinaryIntOp(I, ISD::ADD);
     case Instruction::Or:
       return SelectBinaryIntOp(I, ISD::OR);
     case Instruction::Sub:
       return SelectBinaryIntOp(I, ISD::SUB);
-    case Instruction::Call:
-      // On AIX, call lowering uses the DAG-ISEL path currently so that the
-      // callee of the direct function call instruction will be mapped to the
-      // symbol for the function's entry point, which is distinct from the
-      // function descriptor symbol. The latter is the symbol whose XCOFF symbol
-      // name is the C-linkage name of the source level function.
-      if (TM.getTargetTriple().isOSAIX())
-        break;
-      return selectCall(I);
     case Instruction::Ret:
       return SelectRet(I);
     case Instruction::Trunc:
       return SelectTrunc(I);
     case Instruction::ZExt:
     case Instruction::SExt:
       return SelectIntExt(I);
     // Here add other flavors of Instruction::XXX that automated

llvm/test/CodeGen/PowerPC/debug-label-fast-isel.ll

+; RUN: llc < %s -mtriple powerpc64-ibm-aix-xcoff | FileCheck %s --check-prefix=CHECKASM
+
+; This is a case copied from test/DebugInfo/Generic/debug-label-mi.ll. This test
+; is to explicitly check that fast isel for XCOFF works as expected for debug
+; related intrinsics.
+
+; CHECKASM: DEBUG_LABEL: foo:top
+; CHECKASM: DEBUG_LABEL: foo:done
+
+source_filename = "debug-label-mi.c"
+
+; Function Attrs: noinline nounwind optnone
+define i32 @foo(i32 signext %a, i32 signext %b) #0 !dbg !4 {
+entry:
+  %a.addr = alloca i32, align 4
+  %b.addr = alloca i32, align 4
+  %sum = alloca i32, align 4
+  store i32 %a, i32* %a.addr, align 4
+  store i32 %b, i32* %b.addr, align 4
+  br label %top
+
+top:                                              ; preds = %entry
+  call void @llvm.dbg.label(metadata !8), !dbg !9
+  %0 = load i32, i32* %a.addr, align 4
+  %1 = load i32, i32* %b.addr, align 4
+  %add = add nsw i32 %0, %1
+  store i32 %add, i32* %sum, align 4
+  br label %done
+
+done:                                             ; preds = %top
+  call void @llvm.dbg.label(metadata !10), !dbg !11
+  %2 = load i32, i32* %sum, align 4
+  ret i32 %2
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.label(metadata)
+
+attributes #0 = { noinline nounwind optnone uwtable }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "debug-label-mi.c", directory: "./")
+!2 = !{}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, isOptimized: false, unit: !0, retainedNodes: !2)
+!5 = !DISubroutineType(types: !6)
+!6 = !{!7, !7, !7}
+!7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!8 = !DILabel(scope: !4, name: "top", file: !1, line: 4)
+!9 = !DILocation(line: 4, column: 1, scope: !4)
+!10 = !DILabel(scope: !4, name: "done", file: !1, line: 7)
+!11 = !DILocation(line: 7, column: 1, scope: !4)