[ELF][PPC64] Remove unneeded PPC64PCRelLongBranchThunk

[MaskRay]

Summary

This reverts the PPC64PCRelLongBranchThunk part from D86706.
PPC64PCRelLongBranchThunk is the same as PPC64R12SetupStub.

Use __gep_setup_ instead of __long_branch_pcrel_ for the stub symbol name
as it more closely indicates the operation.
(Note: GNU ld uses *.long_branch.* and *.plt_branch.*).

[nemanjai]

How important is it for the thunk symbol names to match ld.bfd/ld.gold?

lld/ELF/Thunks.cpp

986

I am really not a fan of the name. The reason we emit this has nothing to do with long branches and the code we emit is not necessarily PC-Relative.

We emit this thunk when we need to branch to a GEP (Global Entry Point) of local function Function1 simply because the caller doesn't maintain a TOC pointer and Function1 does.

The existing name makes sense because the GEP assumes that r12 contains the address of the GEP itself (i.e. at the first instruction in the GEP, r12 == pc).

[MaskRay]

In D114656#3158291, @nemanjai wrote:

How important is it for the thunk symbol names to match ld.bfd/ld.gold?

Not important. If linkers can have a common name which is reasonable to both parties, I am happy to do so so that users would need to learn less stuff.

PPC64R12SetupStub is not only used by NOTOC->TOC code, but is also used by NOTOC->NOTOC long branches, so __long_branch_pcrel is not that bad. That said, if __gep_setup makes more sense, I am happy to use it, too.

[nemanjai]

In D114656#3159300, @MaskRay wrote:

PPC64R12SetupStub is not only used by NOTOC->TOC code, but is also used by NOTOC->NOTOC long branches, so __long_branch_pcrel is not that bad. That said, if __gep_setup makes more sense, I am happy to use it, too.

Ah yes, that's a good point. In fact, that is the more common use for this thunk (I neglected the fact that we are removing the check for st_other > 1).

LGTM.

[NeHuang]

This comment was removed by NeHuang.

lld/ELF/Thunks.cpp

986

+1, the existing name makes more sense which is consistent the functionality of the thunk. Would be better we keep __gep_setup_ as the name.

[NeHuang]

lld/ELF/Thunks.cpp

986

Just noticed (s.stOther >> 5) > 1 got removed. LGTM and approved. Thank you for fixing it,

[MaskRay]

Pick __gep_setup_ instead of __long_branch_pcrel_

lld/ELF/Thunks.cpp

 class PPC64PDLongBranchThunk final : public PPC64LongBranchThunk {
 public:
   PPC64PDLongBranchThunk(Symbol &dest, int64_t addend)
       : PPC64LongBranchThunk(dest, addend) {
     in.ppc64LongBranchTarget->addEntry(&dest, addend);
   }
 };
 
-// A bl instruction uses a signed 24 bit offset, with an implicit 4 byte
-// alignment. This gives a possible 26 bits of 'reach'. If the caller and
-// callee do not use toc and the call offset is larger than 26 bits,
-// we need to emit a pc-rel based long-branch thunk. The target address of
-// the callee is computed with a PC-relative offset.
-class PPC64PCRelLongBranchThunk final : public Thunk {
-public:
-  PPC64PCRelLongBranchThunk(Symbol &dest, int64_t addend)
-      : Thunk(dest, addend) {
-    alignment = 16;
-  }
-  uint32_t size() override { return 32; }
-  void writeTo(uint8_t *buf) override;
-  void addSymbols(ThunkSection &isec) override;
-  bool isCompatibleWith(const InputSection &isec,
-                        const Relocation &rel) const override;
-};
-
 } // end anonymous namespace
 
 Defined *Thunk::addSymbol(StringRef name, uint8_t type, uint64_t value,
                           InputSectionBase &section) {
   Defined *d = addSyntheticLocal(name, type, value, /*size=*/0, section);
   syms.push_back(d);
   return d;
 }
if (!config->power10Stubs) {
     nextInstOffset = 8;
   }
   write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
   write32(buf + nextInstOffset + 4, BCTR);  // bctr
 }
 
 void PPC64R12SetupStub::addSymbols(ThunkSection &isec) {
   addSymbol(saver.save("__gep_setup_" + destination.getName()), STT_FUNC, 0,
             isec);
 }
 
 bool PPC64R12SetupStub::isCompatibleWith(const InputSection &isec,
                                          const Relocation &rel) const {
   return rel.type == R_PPC64_REL24_NOTOC;
 }
 
 void PPC64PCRelPLTStub::writeTo(uint8_t *buf) {
addSymbol(saver.save("__long_branch_" + destination.getName()), STT_FUNC, 0,
             isec);
 }
 
 bool PPC64LongBranchThunk::isCompatibleWith(const InputSection &isec,
                                             const Relocation &rel) const {
   return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14;
 }
 
-void PPC64PCRelLongBranchThunk::writeTo(uint8_t *buf) {
-  int64_t offset = destination.getVA() - getThunkTargetSym()->getVA();
-  if (!isInt<34>(offset))
-    reportRangeError(buf, offset, 34, destination,
-                     "PC-relative long branch stub offset");
-
-  int nextInstOffset;
-  if (!config->power10Stubs) {
-    uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8;
-    write32(buf + 0, 0x7c0802a6);                      // mflr r12
-    write32(buf + 4, 0x429f0005);                      // bcl 20,31,.+4
-    write32(buf + 8, 0x7d6802a6);                      // mflr r11
-    write32(buf + 12, 0x7d8803a6);                     // mtlr r12
-    write32(buf + 16, 0x3d8b0000 | computeHiBits(off)); // addis r12,r11,off@ha
-    write32(buf + 20, 0x398c0000 | (off & 0xffff));    // addi r12,r12,off@l
-    nextInstOffset = 24;
-  } else {
-    uint64_t paddi = PADDI_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) |
-                     (offset & 0xffff);
-    writePrefixedInstruction(buf + 0, paddi); // paddi r12, 0, func@pcrel, 1
-    nextInstOffset = 8;
-  }
-  write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12
-  write32(buf + nextInstOffset + 4, BCTR);  // bctr
-}
-
-void PPC64PCRelLongBranchThunk::addSymbols(ThunkSection &isec) {
-  addSymbol(saver.save("__long_branch_pcrel_" + destination.getName()),
-            STT_FUNC, 0, isec);
-}
-
-bool PPC64PCRelLongBranchThunk::isCompatibleWith(const InputSection &isec,
-                                                 const Relocation &rel) const {
-  return rel.type == R_PPC64_REL24_NOTOC;
-}
-
 Thunk::Thunk(Symbol &d, int64_t a) : destination(d), addend(a), offset(0) {}
 
 Thunk::~Thunk() = default;
 
 static Thunk *addThunkAArch64(RelType type, Symbol &s, int64_t a) {
   if (type != R_AARCH64_CALL26 && type != R_AARCH64_JUMP26 &&
       type != R_AARCH64_PLT32)
     fatal("unrecognized relocation type");
static Thunk *addThunkPPC64(RelType type, Symbol &s, int64_t a) {
 
   // This check looks at the st_other bits of the callee. If the value is 1
   // then the callee clobbers the TOC and we need an R2 save stub when RelType
   // is R_PPC64_REL14 or R_PPC64_REL24.
   if ((type == R_PPC64_REL14 || type == R_PPC64_REL24) && (s.stOther >> 5) == 1)
     return make<PPC64R2SaveStub>(s, a);
 
   if (type == R_PPC64_REL24_NOTOC)
-    return (s.stOther >> 5) > 1
-               ? (Thunk *)make<PPC64R12SetupStub>(s)
-               : (Thunk *)make<PPC64PCRelLongBranchThunk>(s, a);
+    return make<PPC64R12SetupStub>(s);
 
   if (config->picThunk)
     return make<PPC64PILongBranchThunk>(s, a);
 
   return make<PPC64PDLongBranchThunk>(s, a);
 }
 
 Thunk *elf::addThunk(const InputSection &isec, Relocation &rel) {

lld/test/ELF/ppc64-pcrel-cross-link.s

 # NOSWAP:         bl 0x1001000
 # NOSWAP:         blr
 # NOSWAP-LABEL: 10030000 <caller_notoc>:
 # NOSWAP-NEXT:    bl 0x10030010
 # NOSWAP-NEXT:    bl 0x10030030
 # NOSWAP-NEXT:    blr
 # NOSWAP-LABEL: 10030010 <__gep_setup_callee_toc>:
 # NOSWAP:         bctr
-# NOSWAP-LABEL: 10030030 <__long_branch_pcrel_callee_notoc>:
+# NOSWAP-LABEL: 10030030 <__gep_setup_callee_notoc>:
 # NOSWAP:         bctr
 # NOSWAP-LABEL: 10040000 <caller_toc>:
 # NOSWAP:         bl 0x10040020
 # NOSWAP-NEXT:    nop
 # NOSWAP-NEXT:    bl 0x10040040
 # NOSWAP-NEXT:    ld 2, 24(1)
 # NOSWAP-NEXT:    blr
 # NOSWAP-LABEL: 10040020 <__long_branch_callee_toc>:

 # SWAP-NEXT:    std 2, 24(1)
 # SWAP:         bctr
 # SWAP-LABEL: 10040000 <caller_notoc>:
 # SWAP-NEXT:    bl 0x10040010
 # SWAP-NEXT:    bl 0x10040030
 # SWAP-NEXT:    blr
 # SWAP-LABEL: 10040010 <__gep_setup_callee_toc>:
 # SWAP:         bctr
-# SWAP-LABEL: 10040030 <__long_branch_pcrel_callee_notoc>:
+# SWAP-LABEL: 10040030 <__gep_setup_callee_notoc>:
 # SWAP:         bctr
 
 #--- lds
 SECTIONS {
   .text_func         0x1001000 : { *(.text_func) }
   .text_callee       0x1002000 : { *(.text_callee) }
   .text_caller_notoc 0x10030000 : { *(.text_caller_notoc) }
   .text_caller_toc   0x10040000 : { *(.text_caller_toc) }

lld/test/ELF/ppc64-pcrel-long-branch-error.s

 # RUN: not ld.lld --script %t/lds %t.o -o %t1 2>&1 | FileCheck %s
 # RUN: ld.lld --script %t/lds %t.o -o %t1 --noinhibit-exec
 # RUN: rm %t.o %t1
 # RUN: llvm-mc -filetype=obj -triple=ppc64 -defsym HIDDEN=1 %t/asm -o %t.o
 # RUN: not ld.lld -shared --script %t/lds %t.o -o %t1 2>&1 | FileCheck %s
 # RUN: ld.lld -shared --script %t/lds %t.o -o %t1 --noinhibit-exec
 # RUN: rm %t.o %t1
 
-# CHECK: error: PC-relative long branch stub offset is out of range: 8589934592 is not in [-8589934592, 8589934591]; references high
+## Note: GNU ld uses sldi 11, 11, 34 and add 12, 11, 12 to support offsets beyond +-2**33.
+# CHECK: error: R12 setup stub offset is out of range: 8589934592 is not in [-8589934592, 8589934591]; references high
 # CHECK-NEXT: >>> defined in {{.*}}.o
 
 //--- asm
 .section .text_low, "ax", %progbits
 .globl _start
 _start:
   bl high@notoc
   blr

lld/test/ELF/ppc64-pcrel-long-branch.s

 
 # CHECK-LABEL: <_start>:
 # CHECK-NEXT:    2000: bl 0x2010
 # CHECK-NEXT:          blr
 # CHECK-NEXT:          trap
 # CHECK-NEXT:          trap
 
 ## Callee address - program counter = 0x2002000 - 0x2010 = 33554416
-# CHECK-LABEL: <__long_branch_pcrel_high>:
+# CHECK-LABEL: <__gep_setup_high>:
 # CHECK-NEXT:    2010: paddi 12, 0, 33554416, 1
 # CHECK-NEXT:          mtctr 12
 # CHECK-NEXT:          bctr
 
 # CHECK-LABEL: <high>:
 # CHECK-NEXT:    2002000: blr
 
 .section .text_low, "ax", %progbits