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NeHuang (Victor Huang)
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User Since
Mar 7 2019, 9:07 AM (110 w, 5 d)

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Wed, Apr 14

NeHuang updated the diff for D100214: [AIX][TLS] Add support for TLSGD relocations to XCOFF objects.

Address the review comments to remove unnecessary changes for ELF.

Wed, Apr 14, 2:07 PM · Restricted Project

Fri, Apr 9

NeHuang updated the summary of D100214: [AIX][TLS] Add support for TLSGD relocations to XCOFF objects.
Fri, Apr 9, 9:48 AM · Restricted Project
NeHuang updated the summary of D100214: [AIX][TLS] Add support for TLSGD relocations to XCOFF objects.
Fri, Apr 9, 9:47 AM · Restricted Project
NeHuang requested review of D100214: [AIX][TLS] Add support for TLSGD relocations to XCOFF objects.
Fri, Apr 9, 9:47 AM · Restricted Project

Tue, Apr 6

NeHuang accepted D99880: [PowerPC, test] Fix use of undef FileCheck var.

LGTM. Thanks! Please give it another 24 hours before commit to wait for the other reviewers' comment.

Tue, Apr 6, 12:19 PM · Restricted Project
NeHuang committed rGf98567b3fecb: [AIX][TLS] Add support for TLS variables to XCOFF object writer (authored by NeHuang).
[AIX][TLS] Add support for TLS variables to XCOFF object writer
Tue, Apr 6, 8:47 AM
NeHuang closed D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Tue, Apr 6, 8:47 AM · Restricted Project

Wed, Mar 31

NeHuang added a comment to D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Gentle ping.

Wed, Mar 31, 5:55 AM · Restricted Project

Mon, Mar 29

NeHuang updated the summary of D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Mon, Mar 29, 9:43 AM · Restricted Project
NeHuang updated the diff for D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
  • Fix the starting address for .tdata and .tbss sections to match the behaviour of the AIX assembler.
  • Update the CHECK for ContainingCsectSymbolIndex using INDX
Mon, Mar 29, 9:42 AM · Restricted Project

Fri, Mar 26

NeHuang added a comment to D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Thanks @hubert.reinterpretcast for the good catch! Just confirmed locally the section address and csect addresss for .tdata and .tbss do not match the results generated by AIX system assembler.
Working on computing proper physical/virtual addresses for the two new sections .tdata and .tbss

Fri, Mar 26, 12:15 PM · Restricted Project

Thu, Mar 25

NeHuang updated the diff for D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Addressed review comment to

  • Define a constatnt variable in the test case to ensure .text section size not zero.
  • Add a case with an alias to a thread-local variable as discussed offline.
Thu, Mar 25, 11:23 AM · Restricted Project

Wed, Mar 24

NeHuang updated the diff for D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Update the assert message.

Wed, Mar 24, 11:51 AM · Restricted Project
NeHuang added inline comments to D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Wed, Mar 24, 7:37 AM · Restricted Project
NeHuang updated the diff for D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Address review comment to

  • Change prefix name from OBJ to SECTION
  • Only keep one 64 bits object file check for data sections on
  • clang-format
Wed, Mar 24, 7:37 AM · Restricted Project

Tue, Mar 23

NeHuang updated the diff for D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Address review comment to

  • Remove header check
  • Combine into one test case
  • Fix the assert condition
  • Check for llvm-objdump outputs
  • Print XMC_UL in the symbol table
Tue, Mar 23, 6:32 AM · Restricted Project
NeHuang added inline comments to D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Tue, Mar 23, 6:22 AM · Restricted Project
NeHuang updated the diff for D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.

Address review comments.

Tue, Mar 23, 6:18 AM · Restricted Project

Mon, Mar 22

NeHuang updated the summary of D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Mon, Mar 22, 10:38 AM · Restricted Project
NeHuang abandoned D99090: [llvm-readobj] Add XMC_UL in the enum entry of CsectStorageMapping class.

Thanks Digger! I will integrate the fix to D98946 with test cases added and abandon this one

Mon, Mar 22, 10:36 AM · Restricted Project
NeHuang removed a reviewer for D99090: [llvm-readobj] Add XMC_UL in the enum entry of CsectStorageMapping class: jhenderson.
Mon, Mar 22, 10:29 AM · Restricted Project
NeHuang updated the summary of D99090: [llvm-readobj] Add XMC_UL in the enum entry of CsectStorageMapping class.
Mon, Mar 22, 10:29 AM · Restricted Project
NeHuang requested review of D99090: [llvm-readobj] Add XMC_UL in the enum entry of CsectStorageMapping class.
Mon, Mar 22, 10:17 AM · Restricted Project
NeHuang added inline comments to D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Mon, Mar 22, 9:07 AM · Restricted Project
NeHuang added inline comments to D98791: [PowerPC][NFC] Do not enter prefix selection if it cannot do better..
Mon, Mar 22, 7:18 AM · Restricted Project

Mar 19 2021

NeHuang added inline comments to D98791: [PowerPC][NFC] Do not enter prefix selection if it cannot do better..
Mar 19 2021, 2:00 PM · Restricted Project
NeHuang updated the summary of D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Mar 19 2021, 6:12 AM · Restricted Project
NeHuang requested review of D98946: [AIX][TLS] Add support for TLS variables to XCOFF object writer.
Mar 19 2021, 6:06 AM · Restricted Project

Mar 8 2021

NeHuang committed rG621023b21853: [AIX][TLS] Add assert check of valid csect type for the storage mapping class… (authored by NeHuang).
[AIX][TLS] Add assert check of valid csect type for the storage mapping class…
Mar 8 2021, 12:23 PM
NeHuang closed D94711: [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register .

Patch committed on Jan 19, 2021
Commit hash: 909d6c86eae32ef350ac35ba8564ed728544ac63

Mar 8 2021, 6:18 AM · Restricted Project
NeHuang closed D91420: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue.

Patch committed on Nov 24th 2020.
Commit hash: 1f5c4a0d04ac0384218bf56e78e3c1d9c3c2f53f

Mar 8 2021, 6:16 AM · Restricted Project

Mar 2 2021

NeHuang committed rG1756b2adc9c1: [AIX][TLS] Generate TLS variables in assembly files (authored by NeHuang).
[AIX][TLS] Generate TLS variables in assembly files
Mar 2 2021, 4:23 PM
NeHuang closed D96184: [AIX][TLS] Generate TLS variables in assembly files.
Mar 2 2021, 4:23 PM · Restricted Project, Restricted Project
NeHuang updated the diff for D96184: [AIX][TLS] Generate TLS variables in assembly files.

Addressed the review comments to

  • Fix the storaging map class for zero-initialized TLS data with external/weak linkage and update the test cases.
  • Renaming the test cases with proper description (zero-initialized, val-initialized and uninitialized
  • Add more comments for the implementation and correct some minors.
Mar 2 2021, 4:13 PM · Restricted Project, Restricted Project
NeHuang added inline comments to D96184: [AIX][TLS] Generate TLS variables in assembly files.
Mar 2 2021, 2:20 PM · Restricted Project, Restricted Project
NeHuang updated the diff for D96184: [AIX][TLS] Generate TLS variables in assembly files.
Mar 2 2021, 5:52 AM · Restricted Project, Restricted Project

Feb 23 2021

NeHuang added inline comments to D96184: [AIX][TLS] Generate TLS variables in assembly files.
Feb 23 2021, 1:22 PM · Restricted Project, Restricted Project
NeHuang updated the diff for D96184: [AIX][TLS] Generate TLS variables in assembly files.

Rebased the patch to be aligned with interface change of function getXCOFFSection

Feb 23 2021, 8:14 AM · Restricted Project, Restricted Project

Feb 22 2021

NeHuang added inline comments to D96184: [AIX][TLS] Generate TLS variables in assembly files.
Feb 22 2021, 4:20 PM · Restricted Project, Restricted Project
NeHuang added inline comments to D96184: [AIX][TLS] Generate TLS variables in assembly files.
Feb 22 2021, 5:37 AM · Restricted Project, Restricted Project
NeHuang updated the diff for D96184: [AIX][TLS] Generate TLS variables in assembly files.
  • Fix the missing directives printing for weak linkage.
  • Update the test case accordingly.
Feb 22 2021, 5:36 AM · Restricted Project, Restricted Project

Feb 19 2021

NeHuang added inline comments to D95115: [PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests.
Feb 19 2021, 8:19 AM · Restricted Project, Restricted Project

Feb 18 2021

NeHuang updated the diff for D96184: [AIX][TLS] Generate TLS variables in assembly files.

@daltenty As per discussion offline

  • Update the code to check isLocalLinkage
  • More test coverage for weak linkage and update test case
  • clangformat the patch
Feb 18 2021, 2:57 PM · Restricted Project, Restricted Project

Feb 17 2021

NeHuang added a comment to rG0e3d7e61867d: Fix gcc build after de3a485d9 due to a gcc bug: https://gcc.gnu..

Thanks @dyung for fixing it!

Feb 17 2021, 7:04 AM

Feb 16 2021

NeHuang committed rGde3a485d9c39: [NFC][PPC] Refactor TOC representation to allow several entries for the same… (authored by NeHuang).
[NFC][PPC] Refactor TOC representation to allow several entries for the same…
Feb 16 2021, 1:34 PM
NeHuang closed D96346: [NFC][PPC] Refactor TOC representation to allow several entries for the same symbol.
Feb 16 2021, 1:34 PM · Restricted Project, Restricted Project
NeHuang commandeered D96184: [AIX][TLS] Generate TLS variables in assembly files.
Feb 16 2021, 8:24 AM · Restricted Project, Restricted Project
NeHuang commandeered D96346: [NFC][PPC] Refactor TOC representation to allow several entries for the same symbol.
Feb 16 2021, 8:24 AM · Restricted Project, Restricted Project

Jan 20 2021

NeHuang added inline comments to D94980: [PowerPC] Do not emit HW loop with half precision operations.
Jan 20 2021, 8:10 AM · Restricted Project
NeHuang added inline comments to D95004: [PowerPC] Add missing negate for VPERMXOR on little endian subtargets.
Jan 20 2021, 8:09 AM · Restricted Project
NeHuang accepted D95004: [PowerPC] Add missing negate for VPERMXOR on little endian subtargets.

LGTM

Jan 20 2021, 8:00 AM · Restricted Project

Jan 19 2021

NeHuang committed rG909d6c86eae3: [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register (authored by NeHuang).
[PowerPC] Fix the check for the instruction using FRSP/XSRSP output register
Jan 19 2021, 7:20 AM
NeHuang updated the diff for D94711: [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register .

Address comments in the test case.

Jan 19 2021, 6:51 AM · Restricted Project

Jan 18 2021

NeHuang updated the diff for D94711: [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register .

Address review comment in the test case.

Jan 18 2021, 1:14 PM · Restricted Project

Jan 15 2021

NeHuang updated the diff for D94711: [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register .

Thanks @nemanjai. Test case added.

Jan 15 2021, 4:13 PM · Restricted Project
NeHuang accepted D94498: [PowerPC][NFC] Update atomic patterns to use the refactored load/store implementation.

LGTM.
nit: Update atomics patterns -> Update atomic patterns in commit title.

Jan 15 2021, 2:08 PM · Restricted Project, Restricted Project

Jan 14 2021

NeHuang requested review of D94711: [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register .
Jan 14 2021, 12:28 PM · Restricted Project

Jan 8 2021

NeHuang accepted D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10.

LGTM and please wait for Nemanja's approval before committing this patch.

Jan 8 2021, 1:37 PM · Restricted Project, Restricted Project, Restricted Project

Jan 6 2021

NeHuang added inline comments to D93300: [PowerPC] Exploit paddi instruction on Power 10 for constant materialization.
Jan 6 2021, 11:36 AM · Restricted Project

Dec 7 2020

NeHuang accepted D91983: [PowerPC] Fix missing nop after call to weak callee..

LGTM.

Dec 7 2020, 1:40 PM · Restricted Project

Dec 4 2020

NeHuang accepted D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.

LGTM other than one minor can be addressed when committing.

Dec 4 2020, 9:16 AM · Restricted Project

Dec 1 2020

NeHuang abandoned D92139: [PowerPC] Add `hasSideEffects=0` for PLXVP and PSTXVP instructions definition .
Dec 1 2020, 8:47 AM · Restricted Project

Nov 26 2020

NeHuang added inline comments to D91983: [PowerPC] Fix missing nop after call to weak callee..
Nov 26 2020, 12:30 PM · Restricted Project
NeHuang requested changes to D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10.
Nov 26 2020, 12:23 PM · Restricted Project, Restricted Project, Restricted Project

Nov 25 2020

NeHuang requested review of D92139: [PowerPC] Add `hasSideEffects=0` for PLXVP and PSTXVP instructions definition .
Nov 25 2020, 3:18 PM · Restricted Project

Nov 24 2020

NeHuang committed rG1f5c4a0d04ac: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2… (authored by NeHuang).
[PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2…
Nov 24 2020, 9:35 AM
NeHuang retitled D91420: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue from [PowerPC][PCRelative] Add new seudo instructions for PCRel TLS to fix R2 clobber issue to [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue.
Nov 24 2020, 8:48 AM · Restricted Project
NeHuang updated the diff for D91420: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue.

Add the missing test case.

Nov 24 2020, 8:11 AM · Restricted Project
NeHuang updated the diff for D91420: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue.

Address review comments to create the class.

Nov 24 2020, 7:00 AM · Restricted Project

Nov 20 2020

NeHuang updated the diff for D91420: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue.

Addressed review comment to merge common code.

Nov 20 2020, 9:53 AM · Restricted Project

Nov 18 2020

NeHuang added inline comments to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.
Nov 18 2020, 3:45 PM · Restricted Project
NeHuang added inline comments to D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC..
Nov 18 2020, 1:14 PM · Restricted Project

Nov 17 2020

NeHuang accepted D91386: [PowerPC] Add peephole to remove redundant accumulator prime/unprime instructions.

LGTM.

Nov 17 2020, 11:56 AM · Restricted Project, Restricted Project

Nov 16 2020

NeHuang committed rG6bb2ceac9087: Fix the compilation assertion due to unreachable BB pruning not deleting the… (authored by NeHuang).
Fix the compilation assertion due to unreachable BB pruning not deleting the…
Nov 16 2020, 8:36 AM

Nov 13 2020

NeHuang added inline comments to D91279: [PowerPC] DForm instructions should be preferred when using zero register.
Nov 13 2020, 9:37 AM · Restricted Project, Restricted Project, Restricted Project
NeHuang added a comment to D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10.

Please clang-format the patch to pass pre-merge checks.

Nov 13 2020, 9:33 AM · Restricted Project, Restricted Project, Restricted Project
NeHuang added inline comments to D91386: [PowerPC] Add peephole to remove redundant accumulator prime/unprime instructions.
Nov 13 2020, 9:28 AM · Restricted Project, Restricted Project
NeHuang updated the diff for D90498: Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables.

Addressed review comments for the nits.

Nov 13 2020, 8:29 AM · Restricted Project
NeHuang added a reviewer for D90498: Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables: majnemer.
Nov 13 2020, 8:20 AM · Restricted Project
NeHuang requested review of D91420: [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue.
Nov 13 2020, 6:47 AM · Restricted Project

Nov 6 2020

NeHuang added a comment to D90498: Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables.

ping

Nov 6 2020, 2:33 PM · Restricted Project

Nov 4 2020

NeHuang added inline comments to D82035: [PowerPC] Add Sema checks for MMA types.
Nov 4 2020, 3:21 PM · Restricted Project, Restricted Project

Nov 3 2020

NeHuang updated the diff for D90498: Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables.

Add the test case.

Nov 3 2020, 2:34 PM · Restricted Project

Oct 30 2020

NeHuang requested review of D90498: Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables.
Oct 30 2020, 2:13 PM · Restricted Project

Oct 27 2020

NeHuang committed rG2e1a737f4646: [PowerPC][PCRelative] Turn on TLS support for PCRel by default (authored by NeHuang).
[PowerPC][PCRelative] Turn on TLS support for PCRel by default
Oct 27 2020, 11:59 AM
NeHuang closed D88738: [PowerPC][PCRelative] Turn on TLS support for PCRel by default.
Oct 27 2020, 11:59 AM · Restricted Project

Oct 23 2020

NeHuang accepted D87705: [PowerPC] Implement Set Boolean Condition Instructions.

LGTM. please address Lei's comment on commit.

Oct 23 2020, 9:58 AM · Restricted Project, Restricted Project
NeHuang committed rG7a74bb899abe: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP… (authored by NeHuang).
[PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP…
Oct 23 2020, 9:34 AM
NeHuang closed D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .
Oct 23 2020, 9:34 AM · Restricted Project

Oct 21 2020

NeHuang added inline comments to D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .
Oct 21 2020, 7:24 AM · Restricted Project
NeHuang updated the diff for D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .
Oct 21 2020, 7:21 AM · Restricted Project

Oct 20 2020

NeHuang updated the diff for D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .

Add a test to disable prefix-instrs.

Oct 20 2020, 3:10 PM · Restricted Project
NeHuang updated the summary of D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .
Oct 20 2020, 3:06 PM · Restricted Project
NeHuang updated the summary of D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .
Oct 20 2020, 1:06 PM · Restricted Project

Oct 19 2020

NeHuang added a reviewer for D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions : steven.zhang.
Oct 19 2020, 1:45 PM · Restricted Project
NeHuang requested review of D89727: [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions .
Oct 19 2020, 1:44 PM · Restricted Project

Oct 5 2020

NeHuang added inline comments to D87705: [PowerPC] Implement Set Boolean Condition Instructions.
Oct 5 2020, 12:54 PM · Restricted Project, Restricted Project
NeHuang accepted D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.
Oct 5 2020, 12:34 PM · Restricted Project
NeHuang added a comment to D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

LGTM but of course please wait to hear from @sfertile/@MaskRay before committing it.

Oct 5 2020, 12:34 PM · Restricted Project

Oct 2 2020

NeHuang requested review of D88738: [PowerPC][PCRelative] Turn on TLS support for PCRel by default.
Oct 2 2020, 7:51 AM · Restricted Project