[DebugInfo][1/N] Instruction referencing test changes: DBG_VALUE to DBG_INSTR_REF

[jmorse]

Summary

This is the first patch in a series of test updates, to change X86 tests to look for instruction referencing variable locations. This patch contains a bunch of replacements of:

DBG_VALUE $somereg

with,

SOMEINST debug-instr-number1
DBG_INSTR_REF 1, 0, ...

It's mostly SelectionDAG tests that are making sure that the variable location assignment is placed in the correct position in the instructions.

[jmorse]

llvm/test/DebugInfo/X86/pr34545.ll

44

Added this because various parts of instruction referencing try to skip doing any work if there are no instructions in scope -- and no "real" instructions in this function are in scope.

[djtodoro]

llvm/test/DebugInfo/X86/pr40427.ll

24

Are we losing the test coverage for the DBG_VALUEs by doing this? I guess it is OK for the targets that will use this feature ON by default, right?

[jmorse]

llvm/test/DebugInfo/X86/pr40427.ll

24

Yes and no -- the debug instruction placement code is shared between instruction referencing and DBG_VALUEs, so it's sort-of being covered. On the other hand, that might change, and I don't think any other architectures cover these parts of SelectionDAG.

I suppose I can leave the CHECK lines in from DBG_VALUE mode, and it's not going to harm anything / over-test, and that'll ensure that SelectionDAG is doing the right thing in DBG_VALUE mode, does that sound alright? (I'd prefer to not do that for the tests in the other patches)

[jmorse]

llvm/test/DebugInfo/X86/pr40427.ll

24

(... and to be clear, that preference is because as far as I'm aware, SelectionDAG is the only thing really shared between DBG_VALUE and instr-ref)

[djtodoro]

llvm/test/DebugInfo/X86/pr40427.ll

24

OK, sounds good to me. Let's add two checks for both modes in SelectionDAG.

[jmorse]

Updated these tests to keep the DBG_VALUE outputs for SelectionDAG outputs.

llvm/test/DebugInfo/X86/pr34545.ll

-; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 -o - %s -stop-after=livedebugvars -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 \
+; RUN:    -o - %s -stop-after=livedebugvars \
+; RUN:    -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 \
+; RUN:    -o - %s -stop-after=livedebugvars \
+; RUN:    -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
-; CHECK: $eax = MOV32rm
-; CHECK: DBG_VALUE $eax
-; CHECK: $eax = SHL32rCL killed renamable $eax
-; CHECK: DBG_VALUE $eax
-; CHECK: DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
-; CHECK: DBG_VALUE $eax
-; CHECK: $eax = SHL32rCL killed renamable $eax
-; CHECK: DBG_VALUE $eax
-; CHECK: RET64 $eax
+; CHECK:         $eax = MOV32rm
+; INSTRREF-SAME:      debug-instr-number 1
+; INSTRREF:      DBG_INSTR_REF 1, 0
+; CHECK:         DBG_VALUE $eax
+; CHECK:         $eax = SHL32rCL killed renamable $eax,
+; INSTRREF-SAME:      debug-instr-number 2
+; INSTRREF:      DBG_INSTR_REF 2, 0
+; CHECK:         DBG_VALUE $eax
+; CHECK:         DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
+; CHECK:         DBG_VALUE $eax
+; CHECK:         $eax = SHL32rCL killed renamable $eax,
+; INSTRREF-SAME:      debug-instr-number 3
+; INSTRREF:      DBG_INSTR_REF 3, 0
+; CHECK:         DBG_VALUE $eax
+; CHECK:         RET64 $eax
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 @var = local_unnamed_addr global i32 8, !dbg !0
 @sc = local_unnamed_addr global i32 1, !dbg !6
 
 define i32 @main() local_unnamed_addr !dbg !14 {
 entry:
   %0 = load i32, i32* @var
   tail call void @llvm.dbg.value(metadata i32 %0, metadata !18, metadata !DIExpression()), !dbg !20
   %1 = load i32, i32* @sc
   %shl = shl i32 %0, %1
   tail call void @llvm.dbg.value(metadata i32 %shl, metadata !18, metadata !DIExpression()), !dbg !20
   tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"(), !srcloc !25
   %2 = load i32, i32* @sc
   %shl2 = shl i32 %shl, %2
   tail call void @llvm.dbg.value(metadata i32 %shl2, metadata !18, metadata !DIExpression()), !dbg !20
   store i32 %shl2, i32* @var
-  ret i32 %shl2
+  ret i32 %shl2, !dbg !20
 }
 
 declare void @llvm.dbg.value(metadata, metadata, metadata)
 
 !llvm.dbg.cu = !{!2}
 !llvm.module.flags = !{!10, !11, !12}
 
 !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())

llvm/test/DebugInfo/X86/pr40427.ll

-; RUN: llc -start-after=codegenprepare -stop-before=finalize-isel -o - < %s -experimental-debug-variable-locations=false | FileCheck %s
-; Test for correct placement of DBG_VALUE, which in PR40427 is placed before
-; the load instruction it refers to. The circumstance replicated here is where
-; two instructions in a row, trunc and add, begin with no-op Copy{To,From}Reg
-; SDNodes that produce no instructions.
-; The DBG_VALUE instruction should come immediately after the load instruction
-; because the truncate is optimised out, and the DBG_VALUE should be placed
-; in front of the first instruction that occurs after the dbg.value.
+; RUN: llc -start-after=codegenprepare -stop-before=finalize-isel -o - < %s \
+; RUN:     -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before=finalize-isel -o - < %s \
+; RUN:     -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
+;
+;; Test for correct placement of DBG_VALUE, which in PR40427 is placed before
+;; the load instruction it refers to. The circumstance replicated here is where
+;; two instructions in a row, trunc and add, begin with no-op Copy{To,From}Reg
+;; SDNodes that produce no instructions.
+;; The DBG_VALUE instruction should come immediately after the load instruction
+;; because the truncate is optimised out, and the DBG_VALUE should be placed
+;; in front of the first instruction that occurs after the dbg.value.
+;
 
 ; CHECK: ![[DBGVAR:[0-9]+]] = !DILocalVariable(name: "bees",
 
 target triple = "x86_64-unknown-linux-gnu"
 
 define i16 @lolwat(i1 %spoons, i64 *%bees, i16 %yellow, i64 *%more) {
 entry:
   br i1 %spoons, label %trueb, label %falseb
 trueb:
   br label %block
 falseb:
   br label %block
 block:
 ; CHECK:      [[PHIREG:%[0-9]+]]:gr64 = PHI %6, %bb.2, %4, %bb.1
-; CHECK-NEXT: [[LOADR:%[0-9]+]]:gr16 = MOV16rm %0
-; CHECK-NEXT: DBG_VALUE [[LOADR]], $noreg, ![[DBGVAR]]
+; CHECK-NEXT: [[LOADR:%[0-9]+]]:gr16 = MOV16rm %0,
+; INSTRREF-SAME: debug-instr-number 1
+; DBGVALUE-NEXT: DBG_VALUE [[LOADR]], $noreg, ![[DBGVAR]]
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[DBGVAR]]
 ; CHECK-NEXT: %{{[0-9]+}}:gr32 = IMPLICIT_DEF
   %foo = phi i64 *[%bees, %trueb], [%more, %falseb]
   %forks = bitcast i64 *%foo to i32 *
   %ret = load i32, i32 *%forks, !dbg !6
   %cast = trunc i32 %ret to i16, !dbg !6
   call void @llvm.dbg.value(metadata i16 %cast, metadata !1, metadata !DIExpression()), !dbg !6
   %orly2 = add i16 %yellow, 1
   br label %bb1

llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll

-; RUN: llc %s -stop-before finalize-isel -o - -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc %s -stop-before finalize-isel -o - \
+; RUN:    -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc %s -stop-before finalize-isel -o - \
+; RUN:    -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ;--------------------------------------------------------------------
 ; This test case is basically generated from the following C code.
 ; Compiled with "--target=x86_64-apple-darwin -S -g -O3" to get debug
 ; info for optimized code.
 ;
 ; struct SS {
 ;   int a;

 %struct.SS = type { i32, i32 }
 
 @S = global %struct.SS { i32 23, i32 -17 }, align 4, !dbg !0
 
 ; Verify that the def comes before the for foo1.
 define i32 @test1() local_unnamed_addr #0 !dbg !17 {
 ; CHECK-LABEL: bb.0.entry1
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[BAR1]], !DIExpression()
-; CHECK-NEXT:    [[REG1:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression()
+; CHECK-NEXT:    [[REG1:%[0-9]+]]:gr64 = LEA64r 
+; INSTRREF-SAME:    debug-instr-number 1
+; INSTRREF-NEXT:  DBG_INSTR_REF 1, 0, ![[FOO1]], !DIExpression()
+; DBGVALUE-NEXT:  DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression()
 entry1:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !20, metadata !DIExpression()), !dbg !23
   call void @llvm.dbg.value(metadata %struct.SS* null, metadata !22, metadata !DIExpression()), !dbg !24
   ret i32 ptrtoint (%struct.SS* @S to i32), !dbg !25
 }
 
 ; Verify that the def comes before the for foo2 and bar2.
 define i32 @test2() local_unnamed_addr #0 !dbg !26 {
 ; CHECK-LABEL: bb.0.entry2
-; CHECK-NEXT:    [[REG2:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression()
-; CHECK-NEXT:    DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression()
+; CHECK-NEXT:    [[REG2:%[0-9]+]]:gr64 = LEA64r
+; INSTRREF-SAME:    debug-instr-number 1
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO2]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR2]], !DIExpression()
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression
 entry2:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !28, metadata !DIExpression()), !dbg !30
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !29, metadata !DIExpression()), !dbg !31
   ret i32 add (i32 ptrtoint (%struct.SS* @S to i32), i32 ptrtoint (%struct.SS* @S to i32)), !dbg !32
 }
 
 ; Verify that the def comes before the for foo3 and bar3.
 define i32 @test3() local_unnamed_addr #0 !dbg !33 {
 ; CHECK-LABEL: bb.0.entry3
-; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression()
-; CHECK-NEXT:    DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression()
+; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr64 = LEA64r
+; INSTRREF-SAME:    debug-instr-number 1
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR3]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO3]], !DIExpression()
+; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression()
+; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression()
 entry3:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !36, metadata !DIExpression()), !dbg !38
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !35, metadata !DIExpression()), !dbg !37
   ret i32 add (i32 ptrtoint (%struct.SS* @S to i32), i32 ptrtoint (%struct.SS* @S to i32)), !dbg !39
 }
 
 ; Verify that the def comes before the for bar4.
 define i32 @test4() local_unnamed_addr #0 !dbg !40 {
 ; CHECK-LABEL: bb.0.entry4
 ; CHECK-NEXT:    DBG_VALUE $noreg, $noreg, ![[FOO4]], !DIExpression()
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[FOO4]], !DIExpression()
-; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression()
+; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr64 = LEA64r
+; INSTRREF-SAME:    debug-instr-number 1
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR4]], !DIExpression()
+; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression()
 entry4:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !42, metadata !DIExpression()), !dbg !44
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !43, metadata !DIExpression()), !dbg !45
   call void @llvm.dbg.value(metadata %struct.SS* null, metadata !42, metadata !DIExpression()), !dbg !44
   ret i32 ptrtoint (%struct.SS* @S to i32), !dbg !46
 }
 
 ; Verify that we do not get a DBG_VALUE that maps foo5 to @S here.
 define i32 @test5() local_unnamed_addr #0 !dbg !47 {
 ; CHECK-LABEL: bb.0.entry5:
 ; CHECK-NEXT:    DBG_VALUE $noreg, $noreg, ![[FOO5]], !DIExpression()
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[FOO5]], !DIExpression()
-; CHECK-NEXT:    [[REG5:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression()
-; CHECK-NOT:     DBG_VALUE [[REG5]], $noreg, ![[FOO5]], !DIExpression()
+; CHECK-NEXT:    [[REG5:%[0-9]+]]:gr64 = LEA64r
+; INSTRREF-SAME:    debug-instr-number 1
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR5]], !DIExpression()
+; DBGVALUE-NEXT: DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression()
+; CHECK-NOT:     DBG_{{.*}} ![[FOO5]], !DIExpression()
 ; CHECK:         RET
 entry5:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !49, metadata !DIExpression()), !dbg !51
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !50, metadata !DIExpression()), !dbg !52
   call void @llvm.dbg.value(metadata %struct.SS* null, metadata !50, metadata !DIExpression()), !dbg !52
   ret i32 ptrtoint (%struct.SS* @S to i32), !dbg !53
 }
 

llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll

-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:    -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:    -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; This test case was generated from the following debug.c program,
 ; using: clang debug.c -g -O1 -S -o dbg_value_phi_isel1.ll -emit-llvm
 ; --------------------------------------
 ; int end = 10;
 ;
 ; int main() {
 ;   int x = 9;
entry:
   br i1 %cmp20, label %for.body.lr.ph, label %for.cond.cleanup, !dbg !36
 
 for.body.lr.ph:                                   ; preds = %entry
   %1 = load i32, i32* @end, align 4, !tbaa !31
   br label %for.body, !dbg !36
 
 for.cond.cleanup:                                 ; preds = %for.body, %entry
 ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
-; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG1]]
+; CHECK:         [[REG1:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 7
+; INSTRREF-NEXT: DBG_INSTR_REF 7, 0
+; DBGVALUE-NEXT: DBG_VALUE [[REG1]]
   %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
   %2 = bitcast [80 x i32]* %arr to i8*, !dbg !37
   call void @llvm.lifetime.start.p0i8(i64 320, i8* nonnull %2) #3, !dbg !37
   call void @llvm.dbg.declare(metadata [80 x i32]* %arr, metadata !19, metadata !DIExpression()), !dbg !38
   call void @llvm.dbg.value(metadata i32 0, metadata !24, metadata !DIExpression()), !dbg !39
   br label %for.body4, !dbg !40
 
 for.body:                                         ; preds = %for.body.lr.ph, %for.body
 ; CHECK-LABEL: bb.{{.*}}.for.body:
-; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG2]]
-; CHECK-NEXT: DBG_VALUE [[REG3]]
-; CHECK-NEXT: DBG_VALUE [[REG4]]
+; CHECK:        [[REG2:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:   debug-instr-number 3
+; CHECK-NEXT:   [[REG3:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:   debug-instr-number 4
+; CHECK-NEXT:   [[REG4:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:   debug-instr-number 5
+; INSTRREF-NEXT: DBG_INSTR_REF 3, 0
+; INSTRREF-NEXT: DBG_INSTR_REF 4, 0
+; INSTRREF-NEXT: DBG_INSTR_REF 5, 0
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]]
+; DBGVALUE-NEXT: DBG_VALUE [[REG3]]
+; DBGVALUE-NEXT: DBG_VALUE [[REG4]]
   %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
   %x.021 = phi i32 [ 9, %for.body.lr.ph ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %u.023, metadata !17, metadata !DIExpression()), !dbg !28
   call void @llvm.dbg.value(metadata i32 %y.022, metadata !16, metadata !DIExpression()), !dbg !27
   call void @llvm.dbg.value(metadata i32 %x.021, metadata !15, metadata !DIExpression()), !dbg !26
   %add = add nuw nsw i32 %y.022, %x.021, !dbg !41
   %mul = mul nsw i32 %y.022, 3, !dbg !43

llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll

-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:     -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:     -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; This test case is a modified version of dbg_value_phi_isel1.ll
 ; where the llvm.dbg.value nodes in for.body has been moved.
 
 ; ModuleID = 'debug.c'
 source_filename = "debug.c"
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
entry:
   br i1 %cmp20, label %for.body.lr.ph, label %for.cond.cleanup, !dbg !36
 
 for.body.lr.ph:                                   ; preds = %entry
   %1 = load i32, i32* @end, align 4, !tbaa !31
   br label %for.body, !dbg !36
 
 for.cond.cleanup:                                 ; preds = %for.body, %entry
 ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
-; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG1]]
+; CHECK:         [[REG1:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:      debug-instr-number 7
+; INSTRREF-NEXT: DBG_INSTR_REF 7, 0
+; DBGVALUE-NEXT: DBG_VALUE [[REG1]]
   %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
   %2 = bitcast [80 x i32]* %arr to i8*, !dbg !37
   call void @llvm.lifetime.start.p0i8(i64 320, i8* nonnull %2) #3, !dbg !37
   call void @llvm.dbg.declare(metadata [80 x i32]* %arr, metadata !19, metadata !DIExpression()), !dbg !38
   call void @llvm.dbg.value(metadata i32 0, metadata !24, metadata !DIExpression()), !dbg !39
   br label %for.body4, !dbg !40
 
 for.body:                                         ; preds = %for.body.lr.ph, %for.body
 ; CHECK-LABEL: bb.{{.*}}.for.body:
-; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !16
-; CHECK-NEXT: DBG_VALUE 555, $noreg, !17
-; CHECK-NEXT: [[ADDREG:%[0-9]+]]:gr32 = nuw nsw ADD32rr
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !17
-; CHECK:      [[MULREG:%[0-9]+]]:gr32 = LEA64_32r
-; CHECK-NEXT: DBG_VALUE 777, $noreg, !17
-; XXX: The following DBG_VALUE should have stayed below the INC32r
-; CHECK-NEXT: DBG_VALUE [[MULREG]], $noreg, !16
-; CHECK-NEXT: [[INCREG:%[0-9]+]]:gr32 = nuw nsw INC32r
-; CHECK-NEXT: DBG_VALUE [[INCREG]], $noreg, !17
-; CHECK-NEXT: DBG_VALUE [[ADDREG]], $noreg, !15
-; CHECK-NEXT: implicit-def $eflags,
-; CHECK-NEXT: DBG_VALUE [[REG4]]
+; CHECK:         [[REG2:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 4
+; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 3
+; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 6
+; INSTRREF-NEXT: DBG_INSTR_REF 3, 0, !16
+; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !16
+; CHECK-NEXT:    DBG_VALUE 555, $noreg, !17
+; CHECK-NEXT:    [[ADDREG:%[0-9]+]]:gr32 = nuw nsw ADD32rr
+; INSTRREF-SAME:    debug-instr-number 5
+; INSTRREF-NEXT: DBG_INSTR_REF 4, 0, !17
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !17
+; CHECK:         [[MULREG:%[0-9]+]]:gr32 = LEA64_32r
+; INSTRREF-SAME:    debug-instr-number 1
+; CHECK-NEXT:    DBG_VALUE 777, $noreg, !17
+;;; XXX: The following DBG_INSTR_REF should have stayed below the INC32r
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !16
+; DBGVALUE-NEXT: DBG_VALUE [[MULREG]], $noreg, !16
+; CHECK-NEXT:    [[INCREG:%[0-9]+]]:gr32 = nuw nsw INC32r
+; INSTRREF-SAME:    debug-instr-number 2
+; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !17
+; INSTRREF-NEXT: DBG_INSTR_REF 5, 0, !15
+; DBGVALUE-NEXT: DBG_VALUE [[INCREG]], $noreg, !17
+; DBGVALUE-NEXT: DBG_VALUE [[ADDREG]], $noreg, !15
+; CHECK-NEXT:    implicit-def $eflags,
+; INSTRREF-NEXT: DBG_INSTR_REF 6, 0
+; DBGVALUE-NEXT: DBG_VALUE [[REG4]]
   %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
   %x.021 = phi i32 [ 9, %for.body.lr.ph ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %y.022, metadata !16, metadata !DIExpression()), !dbg !27
   ; This dbg.value has been manually added compared to dbg_value_phi_isel1.ll
   call void @llvm.dbg.value(metadata i32 555, metadata !17, metadata !DIExpression()), !dbg !28
   %add = add nuw nsw i32 %y.022, %x.021, !dbg !41
   ; This dbg.value has been manually moved compared to dbg_value_phi_isel1.ll

llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll

-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:     -experimental-debug-variable-locations=false  \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:     -experimental-debug-variable-locations=true  \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; This test case was generated from the following phi-split.c program,
 ; using: clang phi-split.c -g -O1 -S -o - --target=i386 -emit-llvm
 ; --------------------------------------
 ; long long end = 10;
 ;
 ; int main() {
 ;   long long x = 9;
for.cond.cleanup:                                 ; preds = %for.cond.cleanup.loopexit, %entry
   %x.0.lcssa.off0 = phi i32 [ 9, %entry ], [ %extract.t, %for.cond.cleanup.loopexit ]
   call void @llvm.dbg.value(metadata i64 undef, metadata !17, metadata !DIExpression()), !dbg !28
   %2 = bitcast [80 x i64]* %arr to i8*, !dbg !39
   call void @llvm.dbg.value(metadata i64 0, metadata !26, metadata !DIExpression()), !dbg !41
   br label %for.body4, !dbg !42
 
 for.body:                                         ; preds = %for.body.lr.ph, %for.body
 ; CHECK-LABEL: bb.{{.*}}.for.body:
-; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG5:%[0-9]+]]:gr32_nosp = PHI
-; CHECK-NEXT: [[REG6:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG7:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; CHECK-NEXT: DBG_VALUE [[REG4]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG5]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; CHECK-NEXT: DBG_VALUE [[REG6]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG7]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; CHECK:         [[REG2:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 5
+; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 6
+; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 7
+; CHECK-NEXT:    [[REG5:%[0-9]+]]:gr32_nosp = PHI
+; INSTRREF-SAME:    debug-instr-number 8
+; CHECK-NEXT:    [[REG6:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 9
+; CHECK-NEXT:    [[REG7:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 10
+; INSTRREF-NEXT: DBG_INSTR_REF 5, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 6, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 7, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 8, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 9, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 10, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG5]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG6]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG7]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
   %u.023 = phi i64 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i64 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
   %x.021 = phi i64 [ 9, %for.body.lr.ph ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i64 %u.023, metadata !19, metadata !DIExpression()), !dbg !30
   call void @llvm.dbg.value(metadata i64 %y.022, metadata !18, metadata !DIExpression()), !dbg !29
   call void @llvm.dbg.value(metadata i64 %x.021, metadata !17, metadata !DIExpression()), !dbg !28
   %add = add nuw nsw i64 %y.022, %x.021, !dbg !43
   %mul = mul nsw i64 %y.022, 3, !dbg !45

llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll

-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:    -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:    -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; This is a reproducer based on the test case from PR37321.
 
 ; We verify that the fragment for the last DBG_VALUE is limited depending
 ; on the size of the original fragment (and that we do not emit more
 ; DBG_VALUE instructions than needed in case we cover the whole original
 ; fragment with just a few DBG_VALUE instructions).
 
 ; CHECK-LABEL: bb.{{.*}}.if.end36:
-; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
-; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
-; CHECK-NOT:  DBG_VALUE
+; CHECK:         [[REG1:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 1
+; CHECK-NEXT:    [[REG2:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 2
+; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr32 = PHI
+; INSTRREF-SAME:    debug-instr-number 3
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 3, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
+; DBGVALUE-NEXT: DBG_VALUE [[REG1]], $noreg,  !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg,  !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg,  !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
+; DBGVALUE-NEXT: DBG_VALUE [[REG1]], $noreg,  !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
+; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg,  !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
+; CHECK-NOT:  DBG_
 
 target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
 target triple = "i686-w64-windows-gnu"
 
 ; Function Attrs: nounwind readnone
 define dso_local i64 @nextafterl(i80 %a) local_unnamed_addr #0 !dbg !6 {
 entry:
   br i1 undef, label %if.else, label %if.then13, !dbg !28

llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll

-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:    -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:    -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; Test that dbg.values of an SSA variable that's not used in a basic block,
 ; is converted to a DBG_VALUE in that same basic block. We know that %1 is
 ; live from the entry bb to the exit bb, is allocated a vreg because it's
 ; used across basic blocks. We should be able to produce a DBG_VALUE that
 ; refers to it in the nextbb block.
 
 source_filename = "debug.c"
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind uwtable
 define dso_local i32 @main(i32 %arg0, i32 %arg1) local_unnamed_addr !dbg !11 {
 entry:
+; CHECK-LABEL: bb.0.entry:
+; INSTRREF: ADD32ri8 {{.*}} debug-instr-number 1
   %0 = add i32 %arg0, 42, !dbg !26
   %1 = add i32 %arg1, 101, !dbg !26
   %cmp = icmp eq i32 %1, 0
   br i1 %cmp, label %nextbb, label %exit, !dbg !26
 
 nextbb:
 ; CHECK-LABEL: bb.{{.*}}.nextbb
   %2 = mul i32 %0, %arg1, !dbg !26
 ; CHECK: IMUL32rr
   call void @llvm.dbg.value(metadata i32 %1, metadata !16, metadata !DIExpression()), !dbg !27
-; CHECK-NEXT: DBG_VALUE
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; DBGVALUE-NEXT: DBG_VALUE
   br label %exit, !dbg !26
 
 ; CHECK-LABEL: bb.{{.*}}.exit
 exit:
   %3 = phi i32 [ 12, %entry ], [ %2, %nextbb ], !dbg !26
   %4 = add i32 %1, %3, !dbg !26
   ret i32 %4, !dbg !26
 }

llvm/test/DebugInfo/X86/sdag-ir-salvage.ll

-; RUN: llc -mtriple=x86_64-unknown-unknown -start-after=codegenprepare -stop-before finalize-isel %s -o -  -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -start-after=codegenprepare \
+; RUN:    -stop-before finalize-isel %s -o -  \
+; RUN:    -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -mtriple=x86_64-unknown-unknown -start-after=codegenprepare \
+; RUN:    -stop-before finalize-isel %s -o -  \
+; RUN:    -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; Test that the dbg.value for %baz, which doesn't exist in the 'next' bb,
 ; can be salvaged back to the underlying argument vreg.
 
 ; CHECK:       ![[AAAVAR:.*]] = !DILocalVariable(name: "aaa",
+; CHECK-LABEL: bb.0.entry:
+; INSTRREF:    DBG_PHI $rdi, 1
 ; CHECK-LABEL: bb.1.next:
-; CHECK:       DBG_VALUE %{{[0-9]+}}, $noreg, ![[AAAVAR]]
+; INSTRREF:    DBG_INSTR_REF 1, 0, ![[AAAVAR]]
+; DBGVALUE:    DBG_VALUE %{{[0-9]+}}, $noreg, ![[AAAVAR]]
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-linux-gnu"
 
 define i8 @f(i32* %foo) local_unnamed_addr !dbg !6 {
 entry:
   %bar = getelementptr i32, i32* %foo, i32 4
   %baz = bitcast i32* %bar to i8*

llvm/test/DebugInfo/X86/sdag-salvage-add.ll

-; RUN: llc -mtriple=x86_64-unknown-unknown -stop-before livedebugvalues %s -o - -experimental-debug-variable-locations=false \
-; RUN:   | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -stop-before livedebugvalues %s -o -\
+; RUN:     -experimental-debug-variable-locations=false \
+; RUN:   | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -mtriple=x86_64-unknown-unknown -stop-before livedebugvalues %s -o -\
+; RUN:     -experimental-debug-variable-locations=true \
+; RUN:   | FileCheck %s --check-prefixes=CHECK,INSTRREF
 ;
 ; Generated at -O1 from:
 ; typedef struct {
 ;   unsigned long long c;
 ; } S1;
 ; struct S3 {
 ;   unsigned long long packed;
 ; };
 ; struct S6 {
 ;   struct S0 *b;
 ; };
 ; void f(struct S3 *a3)
 ; {
 ;   struct S4 *s4 = (struct S4 *)(a3->packed + 0x1000UL);
 ;   struct S6 *myVar = (struct S6 *)s4;
 ;   struct S0 *b = myVar->b;
 ;   use(b);
 ; }
 ;
 ; The debug info is attached to the ADD 4096 operation, which doesn't survive
-; instruction selection as it is folded into the load.
+; instruction selection as it is folded into the load. As a result, we should
+; refer to s4 and myVar with complex expressions.
+;
+; NB: instruction referencing and DBG_VALUE modes produce debug insts in a
+; different order.
 ;
-; CHECK:   ![[S4:.*]] = !DILocalVariable(name: "s4", 
-; CHECK:   ![[MYVAR:.*]] = !DILocalVariable(name: "myVar", 
-; CHECK:      DBG_VALUE $rax, $noreg, ![[MYVAR]],
-; CHECK-SAME:           !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
-; CHECK-NEXT: DBG_VALUE $rax, $noreg, ![[S4]],
+; CHECK:         ![[S4:.*]] = !DILocalVariable(name: "s4", 
+; CHECK:         ![[MYVAR:.*]] = !DILocalVariable(name: "myVar", 
+; CHECK:         $rax = MOV64rm
+; INSTRREF-SAME: debug-instr-number 2,
+; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, ![[S4]],
+; DBGVALUE-NEXT: DBG_VALUE $rax, $noreg, ![[MYVAR]],
+; CHECK-SAME:       !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+
+; INSTRREF:      DBG_INSTR_REF 2, 0, ![[MYVAR]],
+; DBGVALUE:      DBG_VALUE $rax, $noreg, ![[S4]],
 ; CHECK-SAME:           !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
 ; CHECK-NEXT: $rdi = MOV64rm killed renamable $rax, 1, $noreg, 4096, $noreg,
 
 source_filename = "test.c"
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.13.0"
 
 %struct.S3 = type { i64 }

llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll

-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:     -experimental-debug-variable-locations=false \
+; RUN: | FileCheck %s --check-prefixes=CHECK,DBGVALUE
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s \
+; RUN:     -experimental-debug-variable-locations=true \
+; RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREF
 
 ; This tests that transferDbgValues() changes order of SDDbgValue transferred
 ; to another node and debug info for 'ADD32ri' appears *after* the instruction.
 ;
 ; This test case was generated from the following program
 ; using: clang -g -O3 -S -emit-llvm test.c
 ;
 ; int foo(int a, int *b) {
 ;   int c = a + 512;
 ;   if (c != 0)
 ;     *b = a;
 ;   return c;
 ; }
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; CHECK-LABEL: bb.0.entry:
-; CHECK:       %[[REG:[0-9]+]]:gr32 = ADD32ri %1, 512
-; CHECK-NEXT:  DBG_VALUE %[[REG]]
+; CHECK:         %[[REG:[0-9]+]]:gr32 = ADD32ri %1, 512,
+; INSTRREF-SAME:   debug-instr-number 1
+; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; DBGVALUE-NEXT: DBG_VALUE %[[REG]]
 
 ; Function Attrs: nofree norecurse nounwind uwtable writeonly
 define dso_local i32 @foo(i32 %a, i32* nocapture %b) local_unnamed_addr !dbg !7 {
 entry:
   %add = add nsw i32 %a, 512, !dbg !18
   call void @llvm.dbg.value(metadata i32 %add, metadata !16, metadata !DIExpression()), !dbg !17
   %cmp = icmp eq i32 %add, 0, !dbg !18
   br i1 %cmp, label %if.end, label %if.then, !dbg !18