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[DebugInfo][3/N] Instruction referencing tests: add extra instr-ref mode lines to several tests

Authored by jmorse on Nov 19 2021, 9:57 AM.



In these test updates for instruction referencing, I've added specific instruction-referencing modes, and kept the DBG_VALUE-based variable location check lines. This is because argument handling is really fiddly, and I figured it's worth duplicating the testing to ensure it's definitely correct. There's also (dbg-value-superreg-copy2.mir) a test for where variable locations go when virtual registers are coalesced together. I don't think there's an instruction referencing specific test for this, so figured that's worth duplicating too.

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jmorse created this revision.Nov 19 2021, 9:57 AM
jmorse requested review of this revision.Nov 19 2021, 9:57 AM
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This revision is now accepted and ready to land.Nov 24 2021, 12:25 AM
sapey added a subscriber: sapey.Sep 22 2023, 12:13 AM

Hi Snow Rider 3D
Your help is much appreciated.

;; In instruction referencing mode, we should refer to the instruction number
;; of the earlier DBG_PHIs.
; INSTRREF-DAG: DBG_INSTR_REF 1, 0, ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 0, 64)
; INSTRREF-DAG: DBG_INSTR_REF 2, 0, ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 64, 64)

; And then no more DBG_ instructions before the add.
; COMMON:     ADD32rr
Herald added a project: Restricted Project. · View Herald TranscriptSep 22 2023, 12:13 AM