[IR] Allow all integer types for stepvector intrinsic

[david-arm]

Summary

This patch changes the Verifier and LangRef to permit any integer
element types when creating the experimental stepvector intrinsic.

When compiling some SPEC benchmark code the vectoriser was attempting
to vectorise loops with unusual integer types, i.e. i3, and create
corresponding vector induction variables. For scalable vectors this
requires generating a stepvector intrisic for vectors with i3 element
types.

Tests added here:

CodeGen/AArch64/sve-stepvector.ll

[sdesmalen]

llvm/test/CodeGen/AArch64/sve-stepvector.ll

50

Should the code that promotes this value also mask the low 3 bits, thus anding this value with splat(7) ?

[david-arm]

llvm/test/CodeGen/AArch64/sve-stepvector.ll

50

We could do, but whenever the type is promoted to something that has to be stored out to memory there will have to be a zero- or sign-extend. At that point the and will definitely appear. I wasn't sure if this is something that we need to do explicitly as part of lowering stepvector because I just assumed that the remaining bits would be treated as undefined.

Having said that, if you still think it's worthwhile adding an explicit mask I can look into it.

[paulwalker-arm]

Hi @david-arm, the problem with this patch is you're enabling a route into code generation that was previously not available. For example, the removed stepvector_i1 test is something that we'll need to support and is likely to fail for SVE because <vscale x 16 x i1> is a legal type and thus will not use the same type promotion logic that your new stepvector_nxv2i3 test covers.

[david-arm]

I'm abandoning this patch in favour of a different approach for now.

llvm/docs/LangRef.rst

 ::
 
       declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
       declare <vscale x 8 x i16> @llvm.experimental.stepvector.nxv8i16()
 
 The '``llvm.experimental.stepvector``' intrinsics are used to create vectors
 of integers whose elements contain a linear sequence of values starting from 0
 with a step of 1.  This experimental intrinsic can only be used for vectors
-with integer elements that are at least 8 bits in size. If the sequence value
-exceeds the allowed limit for the element type then the result for that lane is
-undefined.
+with integer elements. If the sequence value exceeds the allowed limit for
+the element type then the result for that lane is undefined.
 
 These intrinsics work for both fixed and scalable vectors. While this intrinsic
 is marked as experimental, the recommended way to express this operation for
 fixed-width vectors is still to generate a constant vector instead.
 
 
 Arguments:
 """"""""""

llvm/lib/IR/Verifier.cpp

case Intrinsic::matrix_column_major_store: {
     if (Stride)
       Assert(Stride->getZExtValue() >= NumRows->getZExtValue(),
              "Stride must be greater or equal than the number of rows!", IF);
 
     break;
   }
   case Intrinsic::experimental_stepvector: {
     VectorType *VecTy = dyn_cast<VectorType>(Call.getType());
-    Assert(VecTy && VecTy->getScalarType()->isIntegerTy() &&
-               VecTy->getScalarSizeInBits() >= 8,
-           "experimental_stepvector only supported for vectors of integers "
-           "with a bitwidth of at least 8.",
+    Assert(VecTy && VecTy->getScalarType()->isIntegerTy(),
+           "experimental_stepvector only supported for vectors of integers.",
            &Call);
     break;
   }
   case Intrinsic::experimental_vector_insert: {
     Value *Vec = Call.getArgOperand(0);
     Value *SubVec = Call.getArgOperand(1);
     Value *Idx = Call.getArgOperand(2);
     unsigned IdxN = cast<ConstantInt>(Idx)->getZExtValue();

llvm/test/CodeGen/AArch64/sve-stepvector.ll

 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    index z0.b, #0, #1
 ; CHECK-NEXT:    ret
 entry:
   %0 = call <vscale x 16 x i8> @llvm.experimental.stepvector.nxv16i8()
   ret <vscale x 16 x i8> %0
 }
 
+; Integer element types that need promoting
+define <vscale x 2 x i3> @stepvector_nxv2i3() {
+; CHECK-LABEL: stepvector_nxv2i3:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    index z0.d, #0, #1
+; CHECK-NEXT:    ret
+entry:
+  %0 = call <vscale x 2 x i3> @llvm.experimental.stepvector.nxv2i3()
+  ret <vscale x 2 x i3> %0
+}
+
+define <vscale x 4 x i31> @stepvector_nxv4i31() {
+; CHECK-LABEL: stepvector_nxv4i31:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    index z0.s, #0, #1
+; CHECK-NEXT:    ret
+entry:
+  %0 = call <vscale x 4 x i31> @llvm.experimental.stepvector.nxv4i31()
+  ret <vscale x 4 x i31> %0
+}
+
 ; ILLEGAL INTEGER TYPES
 
 define <vscale x 4 x i64> @stepvector_nxv4i64() {
 ; CHECK-LABEL: stepvector_nxv4i64:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    index z0.d, #0, #1
 ; CHECK-NEXT:    mov z1.d, z0.d
 ; CHECK-NEXT:    incd z1.d
entry:
   %1 = sub <vscale x 16 x i32> zeroinitializer, %0
   ret <vscale x 16 x i32> %1
 }
 
 declare <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
 declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
 declare <vscale x 8 x i16> @llvm.experimental.stepvector.nxv8i16()
 declare <vscale x 16 x i8> @llvm.experimental.stepvector.nxv16i8()
+declare <vscale x 2 x i3> @llvm.experimental.stepvector.nxv2i3()
+declare <vscale x 4 x i31> @llvm.experimental.stepvector.nxv4i31()
 
 declare <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
 declare <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
 declare <vscale x 2 x i32> @llvm.experimental.stepvector.nxv2i32()
 declare <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
 declare <vscale x 4 x i16> @llvm.experimental.stepvector.nxv4i16()

llvm/test/Verifier/stepvector-intrinsic.ll

 ; RUN: not opt -S -verify < %s 2>&1 | FileCheck %s
 
 ; Reject stepvector intrinsics that return a scalar
 
 define i32 @stepvector_i32() {
 ; CHECK: Intrinsic has incorrect return type!
   %1 = call i32 @llvm.experimental.stepvector.i32()
   ret i32 %1
 }
 
 ; Reject vectors with non-integer elements
 
 define <vscale x 4 x float> @stepvector_float() {
-; CHECK: experimental_stepvector only supported for vectors of integers with a bitwidth of at least 8
+; CHECK: experimental_stepvector only supported for vectors of integers.
   %1 = call <vscale x 4 x float> @llvm.experimental.stepvector.nxv4f32()
   ret <vscale x 4 x float> %1
 }
 
-; Reject vectors of integers less than 8 bits in width
-
-define <vscale x 16 x i1> @stepvector_i1() {
-; CHECK: experimental_stepvector only supported for vectors of integers with a bitwidth of at least 8
-  %1 = call <vscale x 16 x i1> @llvm.experimental.stepvector.nxv16i1()
-  ret <vscale x 16 x i1> %1
-}
-
 declare i32 @llvm.experimental.stepvector.i32()
 declare <vscale x 4 x float> @llvm.experimental.stepvector.nxv4f32()
-declare <vscale x 16 x i1> @llvm.experimental.stepvector.nxv16i1()