[IR] Remove unbounded as possible value for vscale_range minimum

[c-rhodes]

Summary

The default for min is changed to 1. The behaviour of -mvscale-{min,max}
in Clang is also changed such that 16 is the max vscale when targeting
SVE and no max is specified.

[sdesmalen]

It would be nice if the LLVM interfaces could be updated as well (could also be done in a follow-up patch)

From:

std::pair<unsigned, unsigned> getVScaleRangeArgs()

To:

Optional<unsigned> getVScaleRangeMax();
unsigned getVScaleRangeMin();

Since that would simplify some of the queries to this interface.

clang/include/clang/Basic/DiagnosticDriverKinds.td

597

nit: must be an unsigned integer than 0

clang/lib/Frontend/CompilerInvocation.cpp

4130

I'd suggest parsing the value as an integer, and checking that it's > 1. See StringRef::getAsInteger().

llvm/docs/LangRef.rst

2137–2141

A maximum value of 0 means unbounded.

I'd also add that min must be greater than 0.

llvm/lib/IR/Verifier.cpp

2064

must be greater than 0

[c-rhodes]

Address comments

[c-rhodes]

In D113294#3115354, @sdesmalen wrote:

It would be nice if the LLVM interfaces could be updated as well (could also be done in a follow-up patch)

Thanks for reviewing, I'll create a follow-up patch to update the interfaces.

[paulwalker-arm]

clang/lib/Basic/Targets/AArch64.cpp

476–484

This looks like a change of behaviour to me. Previously the command line flags would override the "sve" default but now that only happens when the user specifies a maximum value. That means the interface can no longer be used to force truly width agnostic values.

[c-rhodes]

clang/lib/Basic/Targets/AArch64.cpp

476–484

This looks like a change of behaviour to me. Previously the command line flags would override the "sve" default but now that only happens when the user specifies a maximum value. That means the interface can no longer be used to force truly width agnostic values.

I think the issue here is the default of 1 for min would always trigger if (LangOpts.VScaleMin || LangOpts.VScaleMax) overriding the SVE default. Perhaps the default can be removed from the driver option and handled here, i.e.

if (LangOpts.VScaleMin || LangOpts.VScaleMax)
    return std::pair<unsigned, unsigned>(LangOpts.VScaleMin ? LangOpts.VScaleMin : 1,
                                         LangOpts.VScaleMax);

[paulwalker-arm]

I agree, it's the change to VScaleMin that has caused the issue. If the LangOpts default can remain as 0 and you can still achieve what you're after then that would be perfect.

[c-rhodes]

Revert to previous behaviour where both the min/max Clang flags override SVE.

[c-rhodes]

In D113294#3170007, @paulwalker-arm wrote:

I agree, it's the change to VScaleMin that has caused the issue. If the LangOpts default can remain as 0 and you can still achieve what you're after then that would be perfect.

Not sure why this was an issue when I first looked at it, fresh eyes maybe, fixed now. Thanks for raising.

[paulwalker-arm]

clang/lib/Basic/Targets/AArch64.cpp

476–484

Is this enough? I'm not sure it'll work because LangOpts.VScaleMin defaults to 1 and thus you'll always end up passing the first check, unless the user specifically uses -mvscale-min=0 which they cannot because that'll result in diag::err_cc1_unbounded_vscale_min.

Do we need to link the LangOpt defaults to the attribute defaults? I'm think that having the LangOpts default to zero is a good way to represent "value is unspecified" with regards to the LangOpts.VScaleMin.

[c-rhodes]

clang/lib/Basic/Targets/AArch64.cpp

476–484

Is this enough? I'm not sure it'll work because LangOpts.VScaleMin defaults to 1 and thus you'll always end up passing the first check, unless the user specifically uses -mvscale-min=0 which they cannot because that'll result in diag::err_cc1_unbounded_vscale_min.

It works, I removed the default from the driver option:

diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 3b85b15739d4..3ec90d42d6ab 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3338,7 +3338,7 @@ def msve_vector_bits_EQ : Joined<["-"], "msve-vector-bits=">, Group<m_aarch64_Fe
 def mvscale_min_EQ : Joined<["-"], "mvscale-min=">,
   Group<m_aarch64_Features_Group>, Flags<[NoXarchOption,CC1Option]>,
   HelpText<"Specify the vscale minimum. Defaults to \"1\". (AArch64 only)">,
-  MarshallingInfoInt<LangOpts<"VScaleMin">, "1">;
+  MarshallingInfoInt<LangOpts<"VScaleMin">>;

and updated clang/test/CodeGen/arm-sve-vector-bits-vscale-range.c.

Do we need to link the LangOpt defaults to the attribute defaults? I'm think that having the LangOpts default to zero is a good way to represent "value is unspecified" with regards to the LangOpts.VScaleMin.

I'm not sure the LangOpt.VScaleMin default is having any affect, if it were the last CHECK-NONE test in clang/test/CodeGen/arm-sve-vector-bits-vscale-range.c wouldn't pass. I'll revert it back to zero anyway.

[c-rhodes]

Revert LangOpt.VScaleMin default to 0.

[paulwalker-arm]

One minor issue but otherwise looks good.

clang/lib/Basic/Targets/AArch64.cpp

484

This part is no longer needed because to get here you already know LangOpts.VScaleMin==0 && LangOpts.VScaleMax==0.

[c-rhodes]

clang/lib/Basic/Targets/AArch64.cpp

484

This part is no longer needed because to get here you already know LangOpts.VScaleMin==0 && LangOpts.VScaleMax==0.

Ah of course, I'll fix before committing, cheers!

clang/include/clang/Basic/DiagnosticDriverKinds.td

 def remark_cc1_round_trip_generated : Remark<
   "generated arguments #%0 in round-trip: %1">, InGroup<RoundTripCC1Args>;
 def err_cc1_round_trip_fail_then_ok : Error<
   "original arguments parse failed, then succeeded in round-trip">;
 def err_cc1_round_trip_ok_then_fail : Error<
   "generated arguments parse failed in round-trip">;
 def err_cc1_round_trip_mismatch : Error<
   "generated arguments do not match in round-trip">;
+
+def err_cc1_unbounded_vscale_min : Error<
+  "minimum vscale must be an unsigned integer greater than 0">;
 }

clang/include/clang/Basic/LangOptions.def

ENUM_LANGOPT(SignReturnAddressKey, SignReturnAddressKeyKind, 1, SignReturnAddressKeyKind::AKey,
              "Key used for return address signing")
 LANGOPT(BranchTargetEnforcement, 1, 0, "Branch-target enforcement enabled")
 
 LANGOPT(SpeculativeLoadHardening, 1, 0, "Speculative load hardening enabled")
 
 LANGOPT(RelativeCXXABIVTables, 1, 0,
         "Use an ABI-incompatible v-table layout that uses relative references")
 
-LANGOPT(VScaleMin, 32, 0, "Minimum vscale value")
+LANGOPT(VScaleMin, 32, 1, "Minimum vscale value")
 LANGOPT(VScaleMax, 32, 0, "Maximum vscale value")
 
 ENUM_LANGOPT(ExtendIntArgs, ExtendArgsKind, 1, ExtendArgsKind::ExtendTo32,
              "Controls how scalar integer arguments are extended in calls "
              "to unprototyped and varargs functions")
 
 VALUE_LANGOPT(FuchsiaAPILevel, 32, 0, "Fuchsia API level")
 

clang/include/clang/Driver/Options.td

def fcall_saved_x#i : Flag<["-"], "fcall-saved-x"#i>, Group<m_aarch64_Features_Group>,
     HelpText<"Make the x"#i#" register call-saved (AArch64 only)">;
 
 def msve_vector_bits_EQ : Joined<["-"], "msve-vector-bits=">, Group<m_aarch64_Features_Group>,
   HelpText<"Specify the size in bits of an SVE vector register. Defaults to the"
            " vector length agnostic value of \"scalable\". (AArch64 only)">;
 
 def mvscale_min_EQ : Joined<["-"], "mvscale-min=">,
   Group<m_aarch64_Features_Group>, Flags<[NoXarchOption,CC1Option]>,
-  HelpText<"Specify the vscale minimum. Defaults to the"
-           " vector length agnostic value of \"0\". (AArch64 only)">,
-  MarshallingInfoInt<LangOpts<"VScaleMin">>;
+  HelpText<"Specify the vscale minimum. Defaults to \"1\". (AArch64 only)">,
+  MarshallingInfoInt<LangOpts<"VScaleMin">, "1">;
 def mvscale_max_EQ : Joined<["-"], "mvscale-max=">,
   Group<m_aarch64_Features_Group>, Flags<[NoXarchOption,CC1Option]>,
   HelpText<"Specify the vscale maximum. Defaults to the"
            " vector length agnostic value of \"0\". (AArch64 only)">,
   MarshallingInfoInt<LangOpts<"VScaleMax">>;
 
 def msign_return_address_EQ : Joined<["-"], "msign-return-address=">,
   Flags<[CC1Option]>, Group<m_Group>, Values<"none,all,non-leaf">,

clang/lib/Basic/Targets/AArch64.cpp

 
 ArrayRef<Builtin::Info> AArch64TargetInfo::getTargetBuiltins() const {
   return llvm::makeArrayRef(BuiltinInfo, clang::AArch64::LastTSBuiltin -
                                              Builtin::FirstTSBuiltin);
 }
 
 Optional<std::pair<unsigned, unsigned>>
 AArch64TargetInfo::getVScaleRange(const LangOptions &LangOpts) const {
-  if (LangOpts.VScaleMin || LangOpts.VScaleMax)
+  assert(LangOpts.VScaleMin && "vscale min must be greater than 0!");
+
+  if (LangOpts.VScaleMax)
     return std::pair<unsigned, unsigned>(LangOpts.VScaleMin,
                                          LangOpts.VScaleMax);
+
   if (hasFeature("sve"))
-    return std::pair<unsigned, unsigned>(0, 16);
+    return std::pair<unsigned, unsigned>(LangOpts.VScaleMin, 16);
+
   return None;
 }
 
 bool AArch64TargetInfo::hasFeature(StringRef Feature) const {
   return Feature == "aarch64" || Feature == "arm64" || Feature == "arm" ||
          (Feature == "neon" && (FPU & NeonMode)) ||
          ((Feature == "sve" || Feature == "sve2" || Feature == "sve2-bitperm" ||
            Feature == "sve2-aes" || Feature == "sve2-sha3" ||

clang/lib/Frontend/CompilerInvocation.cpp

Opts.RelativeCXXABIVTables =
                    TargetCXXABI::usesRelativeVTables(T));
 
   for (const auto &A : Args.getAllArgValues(OPT_fmacro_prefix_map_EQ)) {
     auto Split = StringRef(A).split('=');
     Opts.MacroPrefixMap.insert(
         {std::string(Split.first), std::string(Split.second)});
   }
 
+  // Error if -mvscale-min is unbounded.
+  if (Arg *A = Args.getLastArg(options::OPT_mvscale_min_EQ)) {
+    unsigned VScaleMin;
+    if (StringRef(A->getValue()).getAsInteger(10, VScaleMin) ||
+        (VScaleMin == 0))
+      Diags.Report(diag::err_cc1_unbounded_vscale_min);
+  }
+
   return Diags.getNumErrors() == NumErrorsBefore;
 }
 
 static bool isStrictlyPreprocessorAction(frontend::ActionKind Action) {
   switch (Action) {
   case frontend::ASTDeclList:
   case frontend::ASTDump:
   case frontend::ASTPrint:

clang/test/CodeGen/arm-sve-vector-bits-vscale-range.c

 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=1 -mvscale-max=1 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=1
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=2 -mvscale-max=2 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=2
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=4 -mvscale-max=4 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=4
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=8 -mvscale-max=8 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=8
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=16 -mvscale-max=16 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=16
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -mvscale-min=1 -mvscale-max=1 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=1
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -mvscale-min=2 -mvscale-max=2 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=2
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=1 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=1 --check-prefix=CHECK-NOMAX
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=2 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=2 --check-prefix=CHECK-NOMAX
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=4 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=4 --check-prefix=CHECK-NOMAX
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=8 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=8 --check-prefix=CHECK-NOMAX
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=16 -S -emit-llvm -o - %s | FileCheck %s -D#VBITS=16 --check-prefix=CHECK-NOMAX
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -mvscale-min=0 -mvscale-max=0 -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-NONE
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=0 -mvscale-max=0 -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-NONE
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -mvscale-min=1 -mvscale-max=0 -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-NONE
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=1 -mvscale-max=0 -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-NONE
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-NONE
 
 // CHECK-LABEL: @func() #0
 // CHECK: attributes #0 = { {{.*}} vscale_range([[#VBITS]],[[#VBITS]]) {{.*}} }
-// CHECK-NOMAX: attributes #0 = { {{.*}} vscale_range([[#VBITS]],0) {{.*}} }
-// CHECK-NONE: attributes #0 = { {{.*}} vscale_range(0,16) {{.*}} }
+// CHECK-NOMAX: attributes #0 = { {{.*}} vscale_range([[#VBITS]],16) {{.*}} }
+// CHECK-NONE: attributes #0 = { {{.*}} vscale_range(1,16) {{.*}} }
 void func() {}

clang/test/Frontend/aarch64-vscale-min.c

+// -----------------------------------------------------------------------------
+// Tests for the -mvscale-min flag
+// -----------------------------------------------------------------------------
+
+// Error out if value is unbounded.
+// -----------------------------------------------------------------------------
+// RUN: not %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
+// RUN:  -mvscale-min=0 2>&1 | FileCheck %s
+
+// CHECK: error: minimum vscale must be an unsigned integer greater than 0

llvm/docs/LangRef.rst

 ``"warn-stack-size"="<threshold>"``
     This attribute sets a threshold to emit diagnostics once the frame size is
     known should the frame size exceed the specified value.  It takes one
     required integer value, which should be a non-negative integer, and less
     than `UINT_MAX`.  It's unspecified which threshold will be used when
     duplicate definitions are linked together with differing values.
 ``vscale_range(<min>[, <max>])``
     This attribute indicates the minimum and maximum vscale value for the given
-    function. A value of 0 means unbounded. If the optional max value is omitted
-    then max is set to the value of min. If the attribute is not present, no
-    assumptions are made about the range of vscale.
+    function. The min must be greater than 0. A maximum value of 0 means
+    unbounded. If the optional max value is omitted then max is set to the
+    value of min. If the attribute is not present, no assumptions are made
+    about the range of vscale.
 
 Call Site Attributes
 ----------------------
 
 In addition to function attributes the following call site only
 attributes are supported:
 
 ``vector-function-abi-variant``
     This attribute can be attached to a :ref:`call <i_call>` to list

llvm/include/llvm/IR/Attributes.h

public:
   /// Returns the number of dereferenceable_or_null bytes from the
   /// dereferenceable_or_null attribute.
   uint64_t getDereferenceableOrNullBytes() const;
 
   /// Returns the argument numbers for the allocsize attribute (or pair(0, 0)
   /// if not known).
   std::pair<unsigned, Optional<unsigned>> getAllocSizeArgs() const;
 
-  /// Returns the argument numbers for the vscale_range attribute (or pair(0, 0)
+  /// Returns the argument numbers for the vscale_range attribute (or pair(1, 0)
   /// if not known).
   std::pair<unsigned, unsigned> getVScaleRangeArgs() const;
 
   /// The Attribute is converted to a string of equivalent mnemonic. This
   /// is, presumably, for writing out the mnemonics for the assembly writer.
   std::string getAsString(bool InAttrGrp = false) const;
 
   /// Return true if this attribute belongs to the LLVMContext.
public:
   /// Retrieve the inalloca type.
   Type *getInAllocaType() const { return getTypeAttr(Attribute::InAlloca); }
 
   /// Retrieve the allocsize args, if the allocsize attribute exists.  If it
   /// doesn't exist, pair(0, 0) is returned.
   std::pair<unsigned, Optional<unsigned>> getAllocSizeArgs() const;
 
   /// Retrieve the vscale_range args, if the vscale_range attribute exists.  If
-  /// it doesn't exist, pair(0, 0) is returned.
+  /// it doesn't exist, pair(1, 0) is returned.
   std::pair<unsigned, unsigned> getVScaleRangeArgs() const;
 
   /// Add integer attribute with raw value (packed/encoded if necessary).
   AttrBuilder &addRawIntAttr(Attribute::AttrKind Kind, uint64_t Value);
 
   /// This turns an alignment into the form used internally in Attribute.
   /// This call has no effect if Align is not set.
   AttrBuilder &addAlignmentAttr(MaybeAlign Align);

llvm/lib/IR/Attributes.cpp

 
 std::pair<unsigned, Optional<unsigned>> AttributeSet::getAllocSizeArgs() const {
   return SetNode ? SetNode->getAllocSizeArgs()
                  : std::pair<unsigned, Optional<unsigned>>(0, 0);
 }
 
 std::pair<unsigned, unsigned> AttributeSet::getVScaleRangeArgs() const {
   return SetNode ? SetNode->getVScaleRangeArgs()
-                 : std::pair<unsigned, unsigned>(0, 0);
+                 : std::pair<unsigned, unsigned>(1, 0);
 }
 
 std::string AttributeSet::getAsString(bool InAttrGrp) const {
   return SetNode ? SetNode->getAsString(InAttrGrp) : "";
 }
 
 bool AttributeSet::hasParentContext(LLVMContext &C) const {
   assert(hasAttributes() && "empty AttributeSet doesn't refer to any context");
AttributeSetNode::getAllocSizeArgs() const {
   if (auto A = findEnumAttribute(Attribute::AllocSize))
     return A->getAllocSizeArgs();
   return std::make_pair(0, 0);
 }
 
 std::pair<unsigned, unsigned> AttributeSetNode::getVScaleRangeArgs() const {
   if (auto A = findEnumAttribute(Attribute::VScaleRange))
     return A->getVScaleRangeArgs();
-  return std::make_pair(0, 0);
+  return std::make_pair(1, 0);
 }
 
 std::string AttributeSetNode::getAsString(bool InAttrGrp) const {
   std::string Str;
   for (iterator I = begin(), E = end(); I != E; ++I) {
     if (I != begin())
       Str += ' ';
     Str += I->getAsString(InAttrGrp);

llvm/lib/IR/Verifier.cpp

if (Attrs.hasFnAttr(Attribute::AllocSize)) {
     if (Args.second && !CheckParam("number of elements", *Args.second))
       return;
   }
 
   if (Attrs.hasFnAttr(Attribute::VScaleRange)) {
     std::pair<unsigned, unsigned> Args =
         Attrs.getFnAttrs().getVScaleRangeArgs();
 
+    if (Args.first == 0)
+      CheckFailed("'vscale_range' minimum must be greater than 0", V);
+
     if (Args.first > Args.second && Args.second != 0)
       CheckFailed("'vscale_range' minimum cannot be greater than maximum", V);
   }
 
   if (Attrs.hasFnAttr("frame-pointer")) {
     StringRef FP = Attrs.getFnAttr("frame-pointer").getValueAsString();
     if (FP != "all" && FP != "non-leaf" && FP != "none")
       CheckFailed("invalid value for 'frame-pointer' attribute: " + FP, V);

llvm/test/Analysis/CostModel/AArch64/sve-gather.ll

;
 
   %res.nxv16i16 = call <vscale x 16 x i16> @llvm.masked.gather.nxv16i16(<vscale x 16 x i16*> undef, i32 1, <vscale x 16 x i1> undef, <vscale x 16 x i16> undef)
   %res.nxv8i16  = call <vscale x 8 x i16>  @llvm.masked.gather.nxv8i16(<vscale x 8 x i16*> undef, i32 1, <vscale x 8 x i1> undef, <vscale x 8 x i16> undef)
   %res.nxv4i16  = call <vscale x 4 x i16>  @llvm.masked.gather.nxv4i16(<vscale x 4 x i16*> undef, i32 1, <vscale x 4 x i1> undef, <vscale x 4 x i16> undef)
 
   ret void
 }
 
-attributes #0 = { "target-features"="+sve" vscale_range(0, 8) }
-attributes #1 = { "target-features"="+sve" vscale_range(0, 16) "tune-cpu"="generic" }
+attributes #0 = { "target-features"="+sve" vscale_range(1, 8) }
+attributes #1 = { "target-features"="+sve" vscale_range(1, 16) "tune-cpu"="generic" }
 attributes #2 = { "target-features"="+sve" }
 
 declare <vscale x 4 x i32> @llvm.masked.gather.nxv4i32(<vscale x 4 x i32*>, i32, <vscale x 4 x i1>, <vscale x 4 x i32>)
 declare <vscale x 8 x i32> @llvm.masked.gather.nxv8i32(<vscale x 8 x i32*>, i32, <vscale x 8 x i1>, <vscale x 8 x i32>)
 declare <vscale x 1 x i64> @llvm.masked.gather.nxv1i64(<vscale x 1 x i64*>, i32, <vscale x 1 x i1>, <vscale x 1 x i64>)
 declare <vscale x 4 x double> @llvm.masked.gather.nxv4f64(<vscale x 4 x double*>, i32, <vscale x 4 x i1>, <vscale x 4 x double>)
 declare <vscale x 2 x double> @llvm.masked.gather.nxv2f64(<vscale x 2 x double*>, i32, <vscale x 2 x i1>, <vscale x 2 x double>)
 declare <vscale x 8 x float> @llvm.masked.gather.nxv8f32(<vscale x 8 x float*>, i32, <vscale x 8 x i1>, <vscale x 8 x float>)
 declare <vscale x 4 x float> @llvm.masked.gather.nxv4f32(<vscale x 4 x float*>, i32, <vscale x 4 x i1>, <vscale x 4 x float>)
 declare <vscale x 2 x float> @llvm.masked.gather.nxv2f32(<vscale x 2 x float*>, i32, <vscale x 2 x i1>, <vscale x 2 x float>)
 declare <vscale x 16 x i16> @llvm.masked.gather.nxv16i16(<vscale x 16 x i16*>, i32, <vscale x 16 x i1>, <vscale x 16 x i16>)
 declare <vscale x 8 x i16> @llvm.masked.gather.nxv8i16(<vscale x 8 x i16*>, i32, <vscale x 8 x i1>, <vscale x 8 x i16>)
 declare <vscale x 4 x i16> @llvm.masked.gather.nxv4i16(<vscale x 4 x i16*>, i32, <vscale x 4 x i1>, <vscale x 4 x i16>)

llvm/test/Analysis/CostModel/AArch64/sve-scatter.ll

;
 
   call void @llvm.masked.scatter.nxv16i16(<vscale x 16 x i16> undef, <vscale x 16 x i16*> undef, i32 1, <vscale x 16 x i1> undef)
   call void @llvm.masked.scatter.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16*> undef, i32 1, <vscale x 8 x i1> undef)
   call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> undef, <vscale x 4 x i16*> undef, i32 1, <vscale x 4 x i1> undef)
 
   ret void
 }
 
-attributes #0 = { "target-features"="+sve" vscale_range(0, 8) }
-attributes #1 = { "target-features"="+sve" vscale_range(0, 16) "tune-cpu"="generic" }
+attributes #0 = { "target-features"="+sve" vscale_range(1, 8) }
+attributes #1 = { "target-features"="+sve" vscale_range(1, 16) "tune-cpu"="generic" }
 attributes #2 = { "target-features"="+sve" }
 
 declare void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32*>, i32, <vscale x 4 x i1>)
 declare void @llvm.masked.scatter.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32*>, i32, <vscale x 8 x i1>)
 declare void @llvm.masked.scatter.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64*>, i32, <vscale x 1 x i1>)
 declare void @llvm.masked.scatter.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double*>, i32, <vscale x 4 x i1>)
 declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double*>, i32, <vscale x 2 x i1>)
 declare void @llvm.masked.scatter.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float*>, i32, <vscale x 8 x i1>)
 declare void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float*>, i32, <vscale x 4 x i1>)
 declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float*>, i32, <vscale x 2 x i1>)
 declare void @llvm.masked.scatter.nxv16i16(<vscale x 16 x i16>, <vscale x 16 x i16*>, i32, <vscale x 16 x i1>)
 declare void @llvm.masked.scatter.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16*>, i32, <vscale x 8 x i1>)
 declare void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i16*>, i32, <vscale x 4 x i1>)

llvm/test/Bitcode/attributes.ll

 }
 
 ; CHECK: define void @f74() #47
 define void @f74() vscale_range(1,0)
 {
   ret void
 }
 
-; CHECK: define void @f75()
-; CHECK-NOT: define void @f75() #
-define void @f75() vscale_range(0,0)
-{
-  ret void
-}
-
 ; CHECK: define void @f76(i8* swiftasync %0)
 define void @f76(i8* swiftasync %0)
 {
   ret void;
 }
 
 ; CHECK: define void @f77() #48
 define void @f77() nosanitize_coverage

llvm/test/Transforms/InstCombine/icmp-vscale.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -instcombine -S < %s | FileCheck %s
 
-define i1 @ugt_vscale64_x_32() vscale_range(0,16) {
+define i1 @ugt_vscale64_x_32() vscale_range(1,16) {
 ; CHECK-LABEL: @ugt_vscale64_x_32(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 false
 ;
 entry:
   %vscale = call i64 @llvm.vscale.i64()
   %num_els = shl i64 %vscale, 5
   %res = icmp ugt i64 %num_els, 1024
   ret i1 %res
 }
 
-define i1 @ugt_vscale64_x_31() vscale_range(0,16) {
+define i1 @ugt_vscale64_x_31() vscale_range(1,16) {
 ; CHECK-LABEL: @ugt_vscale64_x_31(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 false
 ;
 entry:
   %vscale = call i64 @llvm.vscale.i64()
   %num_els = mul i64 %vscale, 31
   %res = icmp ugt i64 %num_els, 1024
   ret i1 %res
 }
 
-define i1 @ugt_vscale16_x_32() vscale_range(0,16) {
+define i1 @ugt_vscale16_x_32() vscale_range(1,16) {
 ; CHECK-LABEL: @ugt_vscale16_x_32(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 false
 ;
 entry:
   %vscale = call i16 @llvm.vscale.i16()
   %num_els = shl i16 %vscale, 5
   %res = icmp ugt i16 %num_els, 1024
   ret i1 %res
 }
 
-define i1 @ult_vscale16() vscale_range(0,16) {
+define i1 @ult_vscale16() vscale_range(1,16) {
 ; CHECK-LABEL: @ult_vscale16(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 false
 ;
 entry:
   %vscale = call i16 @llvm.vscale.i16()
   %res = icmp ult i16 1024, %vscale
   ret i1 %res
 }
 
-define i1 @ule_vscale64() vscale_range(0,16) {
+define i1 @ule_vscale64() vscale_range(1,16) {
 ; CHECK-LABEL: @ule_vscale64(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 false
 ;
 entry:
   %vscale = call i64 @llvm.vscale.i64()
   %res = icmp ule i64 1024, %vscale
   ret i1 %res
 }
 
 define i1 @ueq_vscale64_range4_4() vscale_range(4,4) {
 ; CHECK-LABEL: @ueq_vscale64_range4_4(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 true
 ;
 entry:
   %vscale = call i64 @llvm.vscale.i64()
   %res = icmp eq i64 %vscale, 4
   ret i1 %res
 }
 
-define i1 @ne_vscale64_x_32() vscale_range(0,16) {
+define i1 @ne_vscale64_x_32() vscale_range(1,16) {
 ; CHECK-LABEL: @ne_vscale64_x_32(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    ret i1 true
 ;
 entry:
   %vscale = call i64 @llvm.vscale.i64()
   %num_els = mul i64 %vscale, 32
   %res = icmp ne i64 %num_els, 39488
   ret i1 %res
 }
 
 declare i8 @llvm.vscale.i8()
 declare i16 @llvm.vscale.i16()
 declare i32 @llvm.vscale.i32()
 declare i64 @llvm.vscale.i64()

llvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 ;
 ; Sign-extend
 ;
 
-define i32 @vscale_SExt_i8toi32() vscale_range(0, 127) {
+define i32 @vscale_SExt_i8toi32() vscale_range(1, 127) {
 ; CHECK-LABEL: @vscale_SExt_i8toi32(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
 ; CHECK-NEXT:    ret i32 [[TMP0]]
 ;
 entry:
   %0 = call i8 @llvm.vscale.i8()
   %1 = sext i8 %0 to i32
   ret i32 %1
 }
 
-define i32 @vscale_SExt_i8toi32_poison() vscale_range(0, 128) {
+define i32 @vscale_SExt_i8toi32_poison() vscale_range(1, 128) {
 ; CHECK-LABEL: @vscale_SExt_i8toi32_poison(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
 ; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[TMP0]] to i32
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   entry:
   %0 = call i8 @llvm.vscale.i8()
   %1 = sext i8 %0 to i32
   ret i32 %1
 }
 
 ;
 ; Zero-extend
 ;
 
-define i32 @vscale_ZExt_i8toi32() vscale_range(0, 128) {
+define i32 @vscale_ZExt_i8toi32() vscale_range(1, 128) {
 ; CHECK-LABEL: @vscale_ZExt_i8toi32(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
 ; CHECK-NEXT:    ret i32 [[TMP0]]
 ;
 entry:
   %0 = call i8 @llvm.vscale.i8()
   %1 = zext i8 %0 to i32
   ret i32 %1
 }
 
-define i32 @vscale_ZExt_i8toi32_poison() vscale_range(0, 256) {
+define i32 @vscale_ZExt_i8toi32_poison() vscale_range(1, 256) {
 ; CHECK-LABEL: @vscale_ZExt_i8toi32_poison(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
 ; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[TMP0]] to i32
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   entry:
   %0 = call i8 @llvm.vscale.i8()
;
   %1 = zext i8 %0 to i32
   ret i32 %1
 }
 
 ;
 ; unbounded vscale_range maximum (0)
 ;
 
-define i32 @vscale_SExt_i8toi32_unbounded() vscale_range(0, 0) {
+define i32 @vscale_SExt_i8toi32_unbounded() vscale_range(1, 0) {
 ; CHECK-LABEL: @vscale_SExt_i8toi32_unbounded(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
 ; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[TMP0]] to i32
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   entry:
   %0 = call i8 @llvm.vscale.i8()
   %1 = sext i8 %0 to i32
   ret i32 %1
 }
 
-define i32 @vscale_ZExt_i8toi32_unbounded() vscale_range(0, 0) {
+define i32 @vscale_ZExt_i8toi32_unbounded() vscale_range(1, 0) {
 ; CHECK-LABEL: @vscale_ZExt_i8toi32_unbounded(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
 ; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[TMP0]] to i32
 ; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   entry:
   %0 = call i8 @llvm.vscale.i8()
   %1 = zext i8 %0 to i32
   ret i32 %1
 }
 
 declare i8  @llvm.vscale.i8()

llvm/test/Transforms/InstCombine/vscale_trunc.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
-define i8 @vscale_trunc_i32toi8() vscale_range(0, 255) {
+define i8 @vscale_trunc_i32toi8() vscale_range(1, 255) {
 ; CHECK-LABEL: @vscale_trunc_i32toi8(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
 ; CHECK-NEXT:    ret i8 [[TMP0]]
 entry:
   %0 = call i32 @llvm.vscale.i32()
   %1 = trunc i32 %0 to i8
   ret i8 %1
 }
 
 
-define i8 @vscale_trunc_i32toi8_poison() vscale_range(0, 256) {
+define i8 @vscale_trunc_i32toi8_poison() vscale_range(1, 256) {
 ; CHECK-LABEL: @vscale_trunc_i32toi8_poison(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
 ; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
 ; CHECK-NEXT:    ret i8 [[TMP1]]
   entry:
   %0 = call i32 @llvm.vscale.i32()
   %1 = trunc i32 %0 to i8

llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll

for.body:
   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
   %exitcond = icmp eq i64 %indvars.iv.next, %n
   br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
 
 for.end:
   ret void
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 !0 = distinct !{!0, !1}
 !1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}

llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll

for.body:                                         ; preds = %entry, %for.body
   %exitcond.not = icmp eq i64 %iv.next, %n
   br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
 
 for.end:                                         ; preds = %for.body
   %rdx = phi float [ %add3, %for.body ]
   ret float %rdx
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 !0 = distinct !{!0, !3, !6, !8}
 !1 = distinct !{!1, !3, !7, !8}
 !2 = distinct !{!2, !4, !6, !8}
 !3 = !{!"llvm.loop.vectorize.width", i32 8}
 !4 = !{!"llvm.loop.vectorize.width", i32 4}
 !5 = !{!"llvm.loop.vectorize.width", i32 2}
 !6 = !{!"llvm.loop.interleave.count", i32 1}
 !7 = !{!"llvm.loop.interleave.count", i32 4}
 !8 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}

llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization.ll

loop:
   %iv.next = add nuw nsw i64 %iv, 1
   %exitcond.not = icmp eq i64 %iv.next, 1024
   br i1 %exitcond.not, label %exit, label %loop
 
 exit:
   ret void
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }

llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll

loop:
   %iv.next = add nuw nsw i64 %iv, 1
   %exitcond.not = icmp eq i64 %iv.next, 1024
   br i1 %exitcond.not, label %exit, label %loop, !llvm.loop !21
 
 exit:
   ret void
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 !21 = !{!21, !22, !23}
 !22 = !{!"llvm.loop.vectorize.width", i32 4}
 !23 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}

llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll

for.inc:
   %iv.next = add nuw nsw i64 %iv, 1
   %exitcond.not = icmp eq i64 %iv.next, %n
   br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
 
 for.end:
   ret void
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 !0 = distinct !{!0, !1, !2, !3, !4, !5}
 !1 = !{!"llvm.loop.mustprogress"}
 !2 = !{!"llvm.loop.vectorize.width", i32 4}
 !3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
 !4 = !{!"llvm.loop.interleave.count", i32 1}
 !5 = !{!"llvm.loop.vectorize.enable", i1 true}

llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll

for.body:                                         ; preds = %entry, %for.body
   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
   %exitcond.not = icmp eq i64 %indvars.iv.next, %n
   br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
 
 for.cond.cleanup:                                 ; preds = %for.cond.cleanup.loopexit, %entry
   ret void
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 
 !0 = distinct !{!0, !1, !2, !3, !4, !5}
 !1 = !{!"llvm.loop.mustprogress"}
 !2 = !{!"llvm.loop.vectorize.width", i32 4}
 !3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
 !4 = !{!"llvm.loop.interleave.count", i32 1}
 !5 = !{!"llvm.loop.vectorize.enable", i1 true}

llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll

for.inc:                                          ; preds = %for.body, %if.then
   %inc = add nuw nsw i64 %i.09, 1
   %exitcond.not = icmp eq i64 %inc, %N
   br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
 
 for.end:                                          ; preds = %for.inc, %entry
   ret void
 }
 
-attributes #0 = { "target-features"="+neon,+sve" vscale_range(0, 16) }
+attributes #0 = { "target-features"="+neon,+sve" vscale_range(1, 16) }
 
 !0 = distinct !{!0, !1, !2, !3, !4, !5}
 !1 = !{!"llvm.loop.mustprogress"}
 !2 = !{!"llvm.loop.vectorize.width", i32 4}
 !3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
 !4 = !{!"llvm.loop.vectorize.enable", i1 true}
 !5 = !{!"llvm.loop.interleave.count", i32 1}
 

llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll

for.inc:                                          ; preds = %for.body, %if.then
   %inc = add nuw nsw i64 %i.07, 1
   %exitcond.not = icmp eq i64 %inc, %n
   br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !6
 
 for.end:                                          ; preds = %for.end.loopexit, %entry
   ret void
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 !0 = distinct !{!0, !1, !2, !3, !4, !5}
 !1 = !{!"llvm.loop.mustprogress"}
 !2 = !{!"llvm.loop.vectorize.width", i32 4}
 !3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
 !4 = !{!"llvm.loop.interleave.count", i32 1}
 !5 = !{!"llvm.loop.vectorize.enable", i1 true}
 !6 = distinct !{!6, !1, !7, !3, !4, !5}
 !7 = !{!"llvm.loop.vectorize.width", i32 2}

llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll

for.body:
   %iv.next = add nuw nsw i64 %iv, 1
   %exitcond.not = icmp eq i64 %iv.next, %n
   br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
 
 for.end:
   ret double %add
 }
 
-attributes #0 = { "target-features"="+sve" vscale_range(0, 16) }
+attributes #0 = { "target-features"="+sve" vscale_range(1, 16) }
 
 !0 = distinct !{!0, !1}
 !1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}

llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll

for.body:
   %cond = icmp slt i64 %i.next, %n
   br i1 %cond, label %for.body, label %for.end, !llvm.loop !6
 
 for.end:
   %tmp5 = phi i32 [ %tmp2, %for.body ]
   ret i32 %tmp5
 }
 
-attributes #0 = { vscale_range(0, 16) }
+attributes #0 = { vscale_range(1, 16) }
 !0 = distinct !{!0, !1, !2, !3, !4, !5}
 !1 = !{!"llvm.loop.mustprogress"}
 !2 = !{!"llvm.loop.vectorize.width", i32 4}
 !3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
 !4 = !{!"llvm.loop.vectorize.enable", i1 true}
 !5 = !{!"llvm.loop.interleave.count", i32 2}
 !6 = distinct !{!6, !1, !7, !3, !4, !5}
 !7 = !{!"llvm.loop.vectorize.width", i32 2}

llvm/test/Verifier/vscale_range.ll

 ; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
 
+; CHECK: 'vscale_range' minimum must be greater than 0
+declare i8* @a(i32*) vscale_range(0, 1)
+
 ; CHECK: 'vscale_range' minimum cannot be greater than maximum
 declare i8* @b(i32*) vscale_range(8, 1)