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Differential D112750

[SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4
ClosedPublic

Authored by nickdesaulniers on Oct 28 2021, 1:00 PM.

Details

Reviewers
venkatra
craig.topper
rengolin
Commits
rG39e5dd113f5c: [SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4
Summary

These compiler-rt-only symbols aren't available in libgcc. Similar to
D108842, D108844, and D108926.

Fixes: pr/52043

Diff Detail

Event Timeline

nickdesaulniers created this revision.Oct 28 2021, 1:00 PM
Herald added subscribers: jrtc27, fedor.sergeev, hiraditya, jyknight. · View Herald TranscriptOct 28 2021, 1:00 PM
nickdesaulniers requested review of this revision.Oct 28 2021, 1:00 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 28 2021, 1:00 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
nickdesaulniers added reviewers: venkatra, craig.topper.Oct 28 2021, 1:01 PM
nickdesaulniers added a subscriber: srhines.
nickdesaulniers added a reviewer: rengolin.Oct 28 2021, 1:05 PM
Harbormaster completed remote builds in B131274: Diff 383135.Oct 28 2021, 1:43 PM
rengolin accepted this revision.Oct 29 2021, 8:02 AM

Just like the others, LGTM. Thanks!

This revision is now accepted and ready to land.Oct 29 2021, 8:02 AM
craig.topper added inline comments.Oct 29 2021, 10:19 AM
llvm/lib/Target/Sparc/SparcISelLowering.cpp
1622

Is MULO_I64 a problem for 32-bit?

craig.topper added inline comments.Oct 29 2021, 10:20 AM
llvm/lib/Target/Sparc/SparcISelLowering.cpp
1622

Answering my own question. It is https://godbolt.org/z/bc9na1c5T

nickdesaulniers planned changes to this revision.Oct 29 2021, 10:28 AM
nickdesaulniers updated this revision to Diff 383457.Oct 29 2021, 12:14 PM
nickdesaulniers retitled this revision from [SparcISelLowering] avoid emitting libcalls to __muloti4() to [SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4.
nickdesaulniers edited the summary of this revision. (Show Details)
  • block __mulodi4 for 32b sparc, add test, rebase
This revision is now accepted and ready to land.Oct 29 2021, 12:14 PM
nickdesaulniers marked 2 inline comments as done.Oct 29 2021, 12:14 PM
Harbormaster completed remote builds in B131490: Diff 383457.Oct 29 2021, 12:46 PM
craig.topper accepted this revision.Oct 29 2021, 1:08 PM

LGTM

Closed by commit rG39e5dd113f5c: [SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4 (authored by nickdesaulniers). · Explain WhyOct 29 2021, 1:14 PM
This revision was automatically updated to reflect the committed changes.
nickdesaulniers added a commit: rG39e5dd113f5c: [SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4.

Revision Contents

PathSize
llvm/
lib/
Target/
Sparc/
2 lines
test/
CodeGen/
SPARC/
15 lines

Diff 383135

llvm/lib/Target/Sparc/SparcISelLowering.cpp

Show First 20 Lines • Show All 1,613 Lines • ▼ Show 20 LinesSparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
if (!Subtarget->is64Bit()) { if (!Subtarget->is64Bit()) {
// These libcalls are not available in 32-bit. // These libcalls are not available in 32-bit.
setLibcallName(RTLIB::SHL_I128, nullptr); setLibcallName(RTLIB::SHL_I128, nullptr);
setLibcallName(RTLIB::SRL_I128, nullptr); setLibcallName(RTLIB::SRL_I128, nullptr);
setLibcallName(RTLIB::SRA_I128, nullptr); setLibcallName(RTLIB::SRA_I128, nullptr);
} }
setLibcallName(RTLIB::MULO_I128, nullptr);
craig.topperUnsubmitted
Done
ReplyInline Actions

Is MULO_I64 a problem for 32-bit?

craig.topper: Is MULO_I64 a problem for 32-bit?
craig.topperUnsubmitted
Done
ReplyInline Actions

Answering my own question. It is https://godbolt.org/z/bc9na1c5T

craig.topper: Answering my own question. It is https://godbolt.org/z/bc9na1c5T
if (!Subtarget->isV9()) { if (!Subtarget->isV9()) {
// SparcV8 does not have FNEGD and FABSD. // SparcV8 does not have FNEGD and FABSD.
setOperationAction(ISD::FNEG, MVT::f64, Custom); setOperationAction(ISD::FNEG, MVT::f64, Custom);
setOperationAction(ISD::FABS, MVT::f64, Custom); setOperationAction(ISD::FABS, MVT::f64, Custom);
} }
setOperationAction(ISD::FSIN , MVT::f128, Expand); setOperationAction(ISD::FSIN , MVT::f128, Expand);
setOperationAction(ISD::FCOS , MVT::f128, Expand); setOperationAction(ISD::FCOS , MVT::f128, Expand);
▲ Show 20 Lines • Show All 1,802 Lines • Show Last 20 Lines

llvm/test/CodeGen/SPARC/overflow-intrinsic-optimizations.ll

  • This file was added.
; RUN: llc %s -mtriple=sparc -o - | FileCheck %s
; RUN: llc %s -mtriple=sparc64 -o - | FileCheck %s
declare { i128, i1 } @llvm.smul.with.overflow.i128(i128, i128)
define i32 @mul(i128 %a, i128 %b, i128* %r) {
; CHECK-LABEL: mul
; CHECK-NOT: call __muloti4
%mul4 = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 %a, i128 %b)
%mul.val = extractvalue { i128, i1 } %mul4, 0
%mul.ov = extractvalue { i128, i1 } %mul4, 1
%mul.not.ov = xor i1 %mul.ov, true
store i128 %mul.val, i128* %r, align 16
%conv = zext i1 %mul.not.ov to i32
ret i32 %conv
}