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Differential D111932

[RISCV][test] Add more tests of immediate materialisation
ClosedPublic

Authored by benshi001 on Oct 16 2021, 3:13 AM.

Details

Reviewers
craig.topper
luismarques
asb
MaskRay
Commits
rGb97a14427917: [RISCV][test] Add more tests of immediate materialisation

Diff Detail

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
120 lines
MC/
RISCV/
40 lines

Diff 382508

llvm/test/CodeGen/RISCV/imm.ll

Show First 20 Lines • Show All 1,572 Lines • ▼ Show 20 Lines
; RV64IZBS-LABEL: imm_50394234880: ; RV64IZBS-LABEL: imm_50394234880:
; RV64IZBS: # %bb.0: ; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 188 ; RV64IZBS-NEXT: lui a0, 188
; RV64IZBS-NEXT: addiw a0, a0, -1093 ; RV64IZBS-NEXT: addiw a0, a0, -1093
; RV64IZBS-NEXT: slli a0, a0, 16 ; RV64IZBS-NEXT: slli a0, a0, 16
; RV64IZBS-NEXT: ret ; RV64IZBS-NEXT: ret
ret i64 50394234880 ret i64 50394234880
} }
define i64 @imm_12900936431479() {
; RV32I-LABEL: imm_12900936431479:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 768955
; RV32I-NEXT: addi a0, a0, 1911
; RV32I-NEXT: lui a1, 1
; RV32I-NEXT: addi a1, a1, -1093
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_12900936431479:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 192239
; RV64I-NEXT: slli a0, a0, 2
; RV64I-NEXT: addi a0, a0, -1093
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 1911
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_12900936431479:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 192239
; RV64IZBA-NEXT: slli a0, a0, 2
; RV64IZBA-NEXT: addi a0, a0, -1093
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 1911
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_12900936431479:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 192239
; RV64IZBS-NEXT: slli a0, a0, 2
; RV64IZBS-NEXT: addi a0, a0, -1093
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 1911
; RV64IZBS-NEXT: ret
ret i64 12900936431479
}
define i64 @imm_12900918536874() {
; RV32I-LABEL: imm_12900918536874:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 764587
; RV32I-NEXT: addi a0, a0, -1366
; RV32I-NEXT: lui a1, 1
; RV32I-NEXT: addi a1, a1, -1093
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_12900918536874:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 188
; RV64I-NEXT: addiw a0, a0, -1093
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, -1365
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, -1366
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_12900918536874:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 188
; RV64IZBA-NEXT: addiw a0, a0, -1093
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, -1365
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, -1366
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_12900918536874:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 188
; RV64IZBS-NEXT: addiw a0, a0, -1093
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, -1365
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, -1366
; RV64IZBS-NEXT: ret
ret i64 12900918536874
}
define i64 @imm_12900925247761() {
; RV32I-LABEL: imm_12900925247761:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 766225
; RV32I-NEXT: addi a0, a0, 273
; RV32I-NEXT: lui a1, 1
; RV32I-NEXT: addi a1, a1, -1093
; RV32I-NEXT: ret
;
; RV64I-LABEL: imm_12900925247761:
; RV64I: # %bb.0:
; RV64I-NEXT: lui a0, 188
; RV64I-NEXT: addiw a0, a0, -1093
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 273
; RV64I-NEXT: slli a0, a0, 12
; RV64I-NEXT: addi a0, a0, 273
; RV64I-NEXT: ret
;
; RV64IZBA-LABEL: imm_12900925247761:
; RV64IZBA: # %bb.0:
; RV64IZBA-NEXT: lui a0, 188
; RV64IZBA-NEXT: addiw a0, a0, -1093
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 273
; RV64IZBA-NEXT: slli a0, a0, 12
; RV64IZBA-NEXT: addi a0, a0, 273
; RV64IZBA-NEXT: ret
;
; RV64IZBS-LABEL: imm_12900925247761:
; RV64IZBS: # %bb.0:
; RV64IZBS-NEXT: lui a0, 188
; RV64IZBS-NEXT: addiw a0, a0, -1093
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 273
; RV64IZBS-NEXT: slli a0, a0, 12
; RV64IZBS-NEXT: addi a0, a0, 273
; RV64IZBS-NEXT: ret
ret i64 12900925247761
}

llvm/test/MC/RISCV/rv64zba-aliases-valid.s

Show First 20 Lines • Show All 80 Lines • ▼ Show 20 Lines
# CHECK-S-OBJ-NOALIAS: lui t1, 611378 # CHECK-S-OBJ-NOALIAS: lui t1, 611378
# CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, 265 # CHECK-S-OBJ-NOALIAS-NEXT: addiw t1, t1, 265
# CHECK-S-OBJ-NOALIAS-NEXT: sh3add t1, t1, t1 # CHECK-S-OBJ-NOALIAS-NEXT: sh3add t1, t1, t1
# CHECK-S-OBJ: lui t1, 611378 # CHECK-S-OBJ: lui t1, 611378
# CHECK-S-OBJ-NEXT: addiw t1, t1, 265 # CHECK-S-OBJ-NEXT: addiw t1, t1, 265
# CHECK-S-OBJ-NEXT: sh3add t1, t1, t1 # CHECK-S-OBJ-NEXT: sh3add t1, t1, t1
li x6, -16116864687 li x6, -16116864687
# CHECK-S-OBJ-NOALIASZBS: lui t2, 192239
# CHECK-S-OBJ-NOALIASZBS-NEXT: slli t2, t2, 2
# CHECK-S-OBJ-NOALIASZBS-NEXT: addi t2, t2, -1093
# CHECK-S-OBJ-NOALIASZBS-NEXT: slli t2, t2, 12
# CHECK-S-OBJ-NOALIASZBS-NEXT: addi t2, t2, 1911
# CHECK-S-OBJ: lui t2, 192239
# CHECK-S-OBJ-NEXT: slli t2, t2, 2
# CHECK-S-OBJ-NEXT: addi t2, t2, -1093
# CHECK-S-OBJ-NEXT: slli t2, t2, 12
# CHECK-S-OBJ-NEXT: addi t2, t2, 1911
li x7, 12900936431479
# CHECK-S-OBJ-NOALIASZBS: lui t1, 188
# CHECK-S-OBJ-NOALIASZBS-NEXT: addiw t1, t1, -1093
# CHECK-S-OBJ-NOALIASZBS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIASZBS-NEXT: addi t1, t1, 273
# CHECK-S-OBJ-NOALIASZBS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIASZBS-NEXT: addi t1, t1, 273
# CHECK-S-OBJ: lui t1, 188
# CHECK-S-OBJ-NEXT: addiw t1, t1, -1093
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 273
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, 273
li x6, 12900925247761
# CHECK-S-OBJ-NOALIASZBS: lui t1, 188
# CHECK-S-OBJ-NOALIASZBS-NEXT: addiw t1, t1, -1093
# CHECK-S-OBJ-NOALIASZBS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIASZBS-NEXT: addi t1, t1, -1365
# CHECK-S-OBJ-NOALIASZBS-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NOALIASZBS-NEXT: addi t1, t1, -1366
# CHECK-S-OBJ: lui t1, 188
# CHECK-S-OBJ-NEXT: addiw t1, t1, -1093
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, -1365
# CHECK-S-OBJ-NEXT: slli t1, t1, 12
# CHECK-S-OBJ-NEXT: addi t1, t1, -1366
li x6, 12900918536874