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[mlir][Vector] Add support for lowering 0-d transfers to load/store.
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Authored by nicolasvasilache on Oct 11 2021, 11:34 PM.

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nicolasvasilache requested review of this revision.Oct 11 2021, 11:34 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 11 2021, 11:34 PM
pifon2a accepted this revision.Oct 12 2021, 12:19 AM
pifon2a added inline comments.
mlir/test/Dialect/Vector/vector-transfer-lowering.mlir
10

Are we modelling vector<f32> as vector<1xf32> for now?

This revision is now accepted and ready to land.Oct 12 2021, 12:19 AM
nicolasvasilache marked an inline comment as done.Oct 12 2021, 5:34 AM
nicolasvasilache added inline comments.
mlir/test/Dialect/Vector/vector-transfer-lowering.mlir
10

In the case of vector.transfer ops yes, for other ops it can be either vector<1xf32> or f32 depending on the op semantics.
When we have vector<f32>, things will be better.

This revision was landed with ongoing or failed builds.Oct 12 2021, 5:35 AM
This revision was automatically updated to reflect the committed changes.
nicolasvasilache marked an inline comment as done.