This is an archive of the discontinued LLVM Phabricator instance.

Differential D111140

[RISCV][test] Add more tests of (add (mul r, c0), c1)
ClosedPublic

Authored by benshi001 on Oct 5 2021, 5:42 AM.

Details

Reviewers
craig.topper
asb
luismarques
jrtc27
Commits
rG6f9b189aa645: [RISCV][test] Add more tests of (add (mul r, c0), c1)

Diff Detail

Event Timeline

benshi001 created this revision.Oct 5 2021, 5:42 AM
Herald added subscribers: achieveartificialintelligence, vkmr, frasercrmck and 22 others. · View Herald TranscriptOct 5 2021, 5:42 AM
benshi001 requested review of this revision.Oct 5 2021, 5:42 AM
Herald added a project: Restricted Project. · View Herald TranscriptOct 5 2021, 5:42 AM
Herald added subscribers: llvm-commits, MaskRay. · View Herald Transcript
benshi001 added a child revision: D111141: [RISCV] Optimize (add (mul r, c0), c1).Oct 5 2021, 5:44 AM
Harbormaster completed remote builds in B127024: Diff 377163.Oct 5 2021, 6:32 AM
craig.topper accepted this revision.Oct 7 2021, 11:10 AM

LGTM

This revision is now accepted and ready to land.Oct 7 2021, 11:10 AM
Closed by commit rG6f9b189aa645: [RISCV][test] Add more tests of (add (mul r, c0), c1) (authored by benshi001). · Explain WhyOct 7 2021, 6:27 PM
This revision was automatically updated to reflect the committed changes.
benshi001 added a commit: rG6f9b189aa645: [RISCV][test] Add more tests of (add (mul r, c0), c1).

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
324 lines

Diff 377163

llvm/test/CodeGen/RISCV/addimm-mulimm.ll

Show First 20 Lines • Show All 562 Lines • ▼ Show 20 Lines
; RV64IMB-NEXT: lui a1, 1 ; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -2048 ; RV64IMB-NEXT: addiw a1, a1, -2048
; RV64IMB-NEXT: sh3add a0, a0, a1 ; RV64IMB-NEXT: sh3add a0, a0, a1
; RV64IMB-NEXT: ret ; RV64IMB-NEXT: ret
%tmp0 = mul i64 %x, 24 %tmp0 = mul i64 %x, 24
%tmp1 = add i64 %tmp0, 2048 %tmp1 = add i64 %tmp0, 2048
ret i64 %tmp1 ret i64 %tmp1
} }
define i32 @mul3000_add8990_a(i32 %x) {
; RV32IMB-LABEL: mul3000_add8990_a:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1
; RV32IMB-NEXT: addi a1, a1, -1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 2
; RV32IMB-NEXT: addi a1, a1, 798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mul3000_add8990_a:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 2
; RV64IMB-NEXT: addiw a1, a1, 798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, 3000
%tmp1 = add i32 %tmp0, 8990
ret i32 %tmp1
}
define signext i32 @mul3000_add8990_b(i32 signext %x) {
; RV32IMB-LABEL: mul3000_add8990_b:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1
; RV32IMB-NEXT: addi a1, a1, -1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 2
; RV32IMB-NEXT: addi a1, a1, 798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mul3000_add8990_b:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 2
; RV64IMB-NEXT: addiw a1, a1, 798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, 3000
%tmp1 = add i32 %tmp0, 8990
ret i32 %tmp1
}
define i64 @mul3000_add8990_c(i64 %x) {
; RV32IMB-LABEL: mul3000_add8990_c:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a2, 1
; RV32IMB-NEXT: addi a2, a2, -1096
; RV32IMB-NEXT: mul a1, a1, a2
; RV32IMB-NEXT: mulhu a3, a0, a2
; RV32IMB-NEXT: add a1, a3, a1
; RV32IMB-NEXT: mul a2, a0, a2
; RV32IMB-NEXT: lui a0, 2
; RV32IMB-NEXT: addi a0, a0, 798
; RV32IMB-NEXT: add a0, a2, a0
; RV32IMB-NEXT: sltu a2, a0, a2
; RV32IMB-NEXT: add a1, a1, a2
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mul3000_add8990_c:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -1096
; RV64IMB-NEXT: mul a0, a0, a1
; RV64IMB-NEXT: lui a1, 2
; RV64IMB-NEXT: addiw a1, a1, 798
; RV64IMB-NEXT: add a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i64 %x, 3000
%tmp1 = add i64 %tmp0, 8990
ret i64 %tmp1
}
define i32 @mul3000_sub8990_a(i32 %x) {
; RV32IMB-LABEL: mul3000_sub8990_a:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1
; RV32IMB-NEXT: addi a1, a1, -1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 1048574
; RV32IMB-NEXT: addi a1, a1, -798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mul3000_sub8990_a:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 1048574
; RV64IMB-NEXT: addiw a1, a1, -798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, 3000
%tmp1 = add i32 %tmp0, -8990
ret i32 %tmp1
}
define signext i32 @mul3000_sub8990_b(i32 signext %x) {
; RV32IMB-LABEL: mul3000_sub8990_b:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1
; RV32IMB-NEXT: addi a1, a1, -1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 1048574
; RV32IMB-NEXT: addi a1, a1, -798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mul3000_sub8990_b:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 1048574
; RV64IMB-NEXT: addiw a1, a1, -798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, 3000
%tmp1 = add i32 %tmp0, -8990
ret i32 %tmp1
}
define i64 @mul3000_sub8990_c(i64 %x) {
; RV32IMB-LABEL: mul3000_sub8990_c:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a2, 1
; RV32IMB-NEXT: addi a2, a2, -1096
; RV32IMB-NEXT: mul a1, a1, a2
; RV32IMB-NEXT: mulhu a3, a0, a2
; RV32IMB-NEXT: add a1, a3, a1
; RV32IMB-NEXT: mul a2, a0, a2
; RV32IMB-NEXT: lui a0, 1048574
; RV32IMB-NEXT: addi a0, a0, -798
; RV32IMB-NEXT: add a0, a2, a0
; RV32IMB-NEXT: sltu a2, a0, a2
; RV32IMB-NEXT: add a1, a1, a2
; RV32IMB-NEXT: addi a1, a1, -1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mul3000_sub8990_c:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1
; RV64IMB-NEXT: addiw a1, a1, -1096
; RV64IMB-NEXT: mul a0, a0, a1
; RV64IMB-NEXT: lui a1, 1048574
; RV64IMB-NEXT: addiw a1, a1, -798
; RV64IMB-NEXT: add a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i64 %x, 3000
%tmp1 = add i64 %tmp0, -8990
ret i64 %tmp1
}
define i32 @mulneg3000_add8990_a(i32 %x) {
; RV32IMB-LABEL: mulneg3000_add8990_a:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1048575
; RV32IMB-NEXT: addi a1, a1, 1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 2
; RV32IMB-NEXT: addi a1, a1, 798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mulneg3000_add8990_a:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1048575
; RV64IMB-NEXT: addiw a1, a1, 1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 2
; RV64IMB-NEXT: addiw a1, a1, 798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, -3000
%tmp1 = add i32 %tmp0, 8990
ret i32 %tmp1
}
define signext i32 @mulneg3000_add8990_b(i32 signext %x) {
; RV32IMB-LABEL: mulneg3000_add8990_b:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1048575
; RV32IMB-NEXT: addi a1, a1, 1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 2
; RV32IMB-NEXT: addi a1, a1, 798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mulneg3000_add8990_b:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1048575
; RV64IMB-NEXT: addiw a1, a1, 1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 2
; RV64IMB-NEXT: addiw a1, a1, 798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, -3000
%tmp1 = add i32 %tmp0, 8990
ret i32 %tmp1
}
define i64 @mulneg3000_add8990_c(i64 %x) {
; RV32IMB-LABEL: mulneg3000_add8990_c:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a2, 1048575
; RV32IMB-NEXT: addi a2, a2, 1096
; RV32IMB-NEXT: mul a1, a1, a2
; RV32IMB-NEXT: mulhu a3, a0, a2
; RV32IMB-NEXT: sub a3, a3, a0
; RV32IMB-NEXT: add a1, a3, a1
; RV32IMB-NEXT: mul a2, a0, a2
; RV32IMB-NEXT: lui a0, 2
; RV32IMB-NEXT: addi a0, a0, 798
; RV32IMB-NEXT: add a0, a2, a0
; RV32IMB-NEXT: sltu a2, a0, a2
; RV32IMB-NEXT: add a1, a1, a2
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mulneg3000_add8990_c:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1048575
; RV64IMB-NEXT: addiw a1, a1, 1096
; RV64IMB-NEXT: mul a0, a0, a1
; RV64IMB-NEXT: lui a1, 2
; RV64IMB-NEXT: addiw a1, a1, 798
; RV64IMB-NEXT: add a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i64 %x, -3000
%tmp1 = add i64 %tmp0, 8990
ret i64 %tmp1
}
define i32 @mulneg3000_sub8990_a(i32 %x) {
; RV32IMB-LABEL: mulneg3000_sub8990_a:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1048575
; RV32IMB-NEXT: addi a1, a1, 1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 1048574
; RV32IMB-NEXT: addi a1, a1, -798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mulneg3000_sub8990_a:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1048575
; RV64IMB-NEXT: addiw a1, a1, 1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 1048574
; RV64IMB-NEXT: addiw a1, a1, -798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, -3000
%tmp1 = add i32 %tmp0, -8990
ret i32 %tmp1
}
define signext i32 @mulneg3000_sub8990_b(i32 signext %x) {
; RV32IMB-LABEL: mulneg3000_sub8990_b:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a1, 1048575
; RV32IMB-NEXT: addi a1, a1, 1096
; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: lui a1, 1048574
; RV32IMB-NEXT: addi a1, a1, -798
; RV32IMB-NEXT: add a0, a0, a1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mulneg3000_sub8990_b:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1048575
; RV64IMB-NEXT: addiw a1, a1, 1096
; RV64IMB-NEXT: mulw a0, a0, a1
; RV64IMB-NEXT: lui a1, 1048574
; RV64IMB-NEXT: addiw a1, a1, -798
; RV64IMB-NEXT: addw a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i32 %x, -3000
%tmp1 = add i32 %tmp0, -8990
ret i32 %tmp1
}
define i64 @mulneg3000_sub8990_c(i64 %x) {
; RV32IMB-LABEL: mulneg3000_sub8990_c:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: lui a2, 1048575
; RV32IMB-NEXT: addi a2, a2, 1096
; RV32IMB-NEXT: mul a1, a1, a2
; RV32IMB-NEXT: mulhu a3, a0, a2
; RV32IMB-NEXT: sub a3, a3, a0
; RV32IMB-NEXT: add a1, a3, a1
; RV32IMB-NEXT: mul a2, a0, a2
; RV32IMB-NEXT: lui a0, 1048574
; RV32IMB-NEXT: addi a0, a0, -798
; RV32IMB-NEXT: add a0, a2, a0
; RV32IMB-NEXT: sltu a2, a0, a2
; RV32IMB-NEXT: add a1, a1, a2
; RV32IMB-NEXT: addi a1, a1, -1
; RV32IMB-NEXT: ret
;
; RV64IMB-LABEL: mulneg3000_sub8990_c:
; RV64IMB: # %bb.0:
; RV64IMB-NEXT: lui a1, 1048575
; RV64IMB-NEXT: addiw a1, a1, 1096
; RV64IMB-NEXT: mul a0, a0, a1
; RV64IMB-NEXT: lui a1, 1048574
; RV64IMB-NEXT: addiw a1, a1, -798
; RV64IMB-NEXT: add a0, a0, a1
; RV64IMB-NEXT: ret
%tmp0 = mul i64 %x, -3000
%tmp1 = add i64 %tmp0, -8990
ret i64 %tmp1
}