[SelectionDAG] Remove PromoteIntOp_EXTRACT_SUBVECTOR.

[sdesmalen]

Summary

This code seems untested and is likely obsolete, because this case
should already be handled by the code that legalizes the result type
of EXTRACT_SUBVECTOR.

[craig.topper]

I'm not sure we can write a test for RISCV either. This can only happen if the element type needs to be promoted on the larger vector type, but not the narrower vector type used for the result. I don't even know to exercise this code with fixed vectors. The llvm-cov bot says its untested http://lab.llvm.org:8080/coverage/coverage-reports/coverage/Users/buildslave/jenkins/workspace/coverage/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp.html#L5001. Looks like it was added to support some case with mask vectors on X86, but that case no longer happens. Maybe we can just delete it?

[craig.topper]

llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

5099

The use of MVT instead of EVT here is also questionable. That's probably another vote for dropping it.

[sdesmalen]

Changed patch to remove PromoteIntOp_EXTRACT_SUBVECTOR.

[sdesmalen]

In D110061#3010295, @craig.topper wrote:

I'm not sure we can write a test for RISCV either. This can only happen if the element type needs to be promoted on the larger vector type, but not the narrower vector type used for the result. I don't even know to exercise this code with fixed vectors. The llvm-cov bot says its untested http://lab.llvm.org:8080/coverage/coverage-reports/coverage/Users/buildslave/jenkins/workspace/coverage/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp.html#L5001. Looks like it was added to support some case with mask vectors on X86, but that case no longer happens. Maybe we can just delete it?

Thanks, I wasn't aware of a code-coverage buildbot that actually showed this info, that's very useful. Is there a more friendly interface to get such a report? (Other than manually constructing the URL with a path to the file)

I've removed the function now and think it makes sense, because I can't think of any instance where the result type would be legal, and the (wider vector) input type requiring promotion.

[craig.topper]

In D110061#3011500, @sdesmalen wrote:

In D110061#3010295, @craig.topper wrote:

I'm not sure we can write a test for RISCV either. This can only happen if the element type needs to be promoted on the larger vector type, but not the narrower vector type used for the result. I don't even know to exercise this code with fixed vectors. The llvm-cov bot says its untested http://lab.llvm.org:8080/coverage/coverage-reports/coverage/Users/buildslave/jenkins/workspace/coverage/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp.html#L5001. Looks like it was added to support some case with mask vectors on X86, but that case no longer happens. Maybe we can just delete it?

Thanks, I wasn't aware of a code-coverage buildbot that actually showed this info, that's very useful. Is there a more friendly interface to get such a report? (Other than manually constructing the URL with a path to the file)

There's an "llvm-cov" link in the left hand column on llvm.org that should take you to a list of all files.

[craig.topper]

LGTM

[bsmith]

I have reverted this patch in 7c68d4b8ff906ee97aa14c6ec97e19aaa766c08a as this code is still required for extracting fixed types from illegal scalable types on SVE, which is used for ACLE predicate types. We are lacking tests for this case, which I shall add.

llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

SDValue DAGTypeLegalizer::PromoteIntOp_INSERT_SUBVECTOR(SDNode *N) {
   V0 = DAG.getAnyExtOrTrunc(V0, dl, PromVT);
   SDValue Ext = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, PromVT, V0, V1, Idx);
   return DAG.getAnyExtOrTrunc(Ext, dl, N->getValueType(0));
 }
 
 SDValue DAGTypeLegalizer::PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N) {
   SDLoc dl(N);
   SDValue V0 = GetPromotedInteger(N->getOperand(0));
   MVT InVT = V0.getValueType().getSimpleVT();
   MVT OutVT = MVT::getVectorVT(InVT.getVectorElementType(),
-                               N->getValueType(0).getVectorNumElements());
+                               N->getValueType(0).getVectorElementCount());
   SDValue Ext = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OutVT, V0, N->getOperand(1));
   return DAG.getNode(ISD::TRUNCATE, dl, N->getValueType(0), Ext);
 }
 
 SDValue DAGTypeLegalizer::PromoteIntOp_CONCAT_VECTORS(SDNode *N) {
   SDLoc dl(N);
 
   EVT ResVT = N->getValueType(0);