[ARM] Improve detection of fallthough when aligning blocks

[dmgreen]

Summary

We align non-fallthrough branches under Cortex-M at O3 to lead to fewer instruction fetches. This improves that for the block after a LE or LETP. These blocks will still have branches on until the LowOverheadLoops pass is run (as they are not handled by analyzeBranch, the branch is not removed until later), so canFallThrough will return false. These extra branches will eventually be removed, leaving a fallthrough, so treat them as such and don't add unnecessary alignments.

[samtebbs]

llvm/lib/Target/ARM/ARMConstantIslandPass.cpp

360

If my understanding is correct then the fall-through branch at the end of MBB isn't removed until the LowOverheadLoops pass. Do we therefore need to check if LOL are enabled?

[dmgreen]

llvm/lib/Target/ARM/ARMConstantIslandPass.cpp

360

Hmm. I was considering that all non-lob cases would already have been cleared up, handled by analyzeBranch, but perhaps you are right and this should be checking more specifically.

[dmgreen]

Check LOB instructions specifically.

[samtebbs]

Apologies for taking a long time to get back to you on this! LGTM

llvm/lib/Target/ARM/ARMConstantIslandPass.cpp

static bool AlignBlocks(MachineFunction *MF) {
 
   bool Changed = false;
   bool PrevCanFallthough = true;
   for (auto &MBB : *MF) {
     if (!PrevCanFallthough) {
       Changed = true;
       MBB.setAlignment(Alignment);
     }
-    PrevCanFallthough = MBB.canFallThrough();
+    PrevCanFallthough = is_contained(MBB.successors(), MBB.getNextNode());
   }
 
   return Changed;
 }
 
 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) {
   MF = &mf;
   MCP = mf.getConstantPool();

llvm/test/CodeGen/Thumb2/aligned-nonfallthrough.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=thumbv8.1-m.main-none-eabi -mcpu=cortex-m55 -O3 < %s | FileCheck %s
 
 define i32 @loop(i32* nocapture readonly %x) {
 ; CHECK-LABEL: loop:
 ; CHECK:       @ %bb.0: @ %entry
 ; CHECK-NEXT:    .save {r7, lr}
 ; CHECK-NEXT:    push {r7, lr}
 ; CHECK-NEXT:    mov.w lr, #500
 ; CHECK-NEXT:    movs r1, #0
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  .LBB0_1: @ %for.body
 ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    ldr r2, [r0], #4
 ; CHECK-NEXT:    add r1, r2
 ; CHECK-NEXT:    le lr, .LBB0_1
-; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.2: @ %for.cond.cleanup
 ; CHECK-NEXT:    mov r0, r1
 ; CHECK-NEXT:    pop {r7, pc}
 entry:
   br label %for.body
 
 for.cond.cleanup:                                 ; preds = %for.body
   ret i32 %add

 ; CHECK-NEXT:    movs r0, #0
 ; CHECK-NEXT:    movs r3, #0
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  .LBB1_2: @ %for.body
 ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    ldr r2, [r12], #4
 ; CHECK-NEXT:    smlal r0, r3, r2, r1
 ; CHECK-NEXT:    le lr, .LBB1_2
-; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.3: @ %for.cond.cleanup
 ; CHECK-NEXT:    mov r1, r3
 ; CHECK-NEXT:    pop {r7, pc}
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  .LBB1_4:
 ; CHECK-NEXT:    movs r0, #0
 ; CHECK-NEXT:    movs r3, #0
 ; CHECK-NEXT:    mov r1, r3