Fixing this after @foad reported that the oneuse restriction regressed some code. I couldn't reproduce this without essentially disabling reassociation since that ends up optimizing the test case anyway.
does this fix your internal regression?
There is now only a single case, where slightly worse code than is generated compared to before D105069: https://github.com/llvm/llvm-project/blob/c282d55a38577e076b48cd7a8113e5eb0a2039cd/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll#L4151-L4164
isLegalAddressingMode correctly returns false and the dead loads from the <64 x i32> load (which are multiple users of the G_PTR_ADD) are only removed later, after the G_PTR_ADD has long been converted to pseudo instructions. I guess there’s not much we can do about that.
Thinking more about it, maybe it makes sense to only skip the combine if isLegalAddressingMode(MaybeImm2Val->Value) && !isLegalAddressingMode(CombinedImm)?
(That should also fix the case I mentioned in the last comment.)