[objdump][ARM] Fix evaluating the target address of a Thumb BLX(i)

[ikudrin]

Summary

The instruction can be 16-bit aligned while targeting 32-bit aligned code. To calculate the target address correctly, the address of the instruction has to be adjusted.

[peter.smith]

Change looks good to me. There is some usage of BLX in the LLD test suite. If you've not done so already it will be worth doing a check-all including the LLD test suite to make sure that there are no tests that need updating.

[ikudrin]

Thanks for looking at it.

In D104446#2824311, @peter.smith wrote:

There is some usage of BLX in the LLD test suite. If you've not done so already it will be worth doing a check-all including the LLD test suite to make sure that there are no tests that need updating.

As far as I can see, such tests either have the BLX instructions 32-bit aligned or check only their immediates.

[peter.smith]

OK LGTM.

llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp

bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
     }
     if (!FoundImm)
       return false;
 
     // For ARM instructions the PC offset is 8 bytes, for Thumb instructions it
     // is 4 bytes.
     uint64_t Offset = ((Desc.TSFlags & ARMII::FormMask) == ARMII::ThumbFrm) ? 4 : 8;
 
+    // A Thumb instruction BLX(i) can be 16-bit aligned while targets Arm code
+    // which is 32-bit aligned. The target address for the case is calculated as
+    //   targetAddress = Align(PC,4) + imm32;
+    // where
+    //   Align(x, y) = y * (x DIV y);
+    if (Inst.getOpcode() == ARM::tBLXi)
+      Addr &= ~0x3;
+
     Target = Addr + Imm + Offset;
     return true;
   }
 };
 
 }
 
 static MCInstrAnalysis *createARMMCInstrAnalysis(const MCInstrInfo *Info) {

llvm/test/tools/llvm-objdump/ELF/ARM/tblxi-target.s

+## Check that the disassembler reports the target address of a Thumb BLX(i)
+## instruction correctly even if the instruction is not 32-bit aligned.
+
+# RUN: llvm-mc %s --triple=armv8a -filetype=obj | \
+# RUN:   llvm-objdump -dr - --triple armv8a --no-show-raw-insn | \
+# RUN:   FileCheck %s
+
+# CHECK:      <test>:
+# CHECK-NEXT:   4:  nop
+# CHECK-NEXT:   6:  blx  #-8 <foo>
+# CHECK-NEXT:   a:  blx  #4 <bar>
+
+  .arm
+foo:
+  nop
+
+  .thumb
+test:
+  nop
+  blx #-8
+  blx #4
+
+  .arm
+  .p2align 2
+bar:
+  nop