[AArch64] Support llvm-mc/llvm-objdump -M no-aliases

[MaskRay]

Summary

This enables the no-aliases forms of many instructions.

Depends on D103004

[tmatheson]

LGTM, I will leave it to the RISC-V people to approve the predecessor

llvm/test/MC/AArch64/alias-addsubimm.s

2

Why change the triple here?

[MaskRay]

Prefer -mtriple=aarch64 (generic ELF) to a Linux oriented triple.
Using a generic ELF triple emphasizes that the test is portable across various ELF OSes not just Linux glibc.

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h

 
 namespace llvm {
 
 class AArch64InstPrinter : public MCInstPrinter {
 public:
   AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                      const MCRegisterInfo &MRI);
 
+  bool applyTargetSpecificCLOption(StringRef Opt) override;
+
   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
                  const MCSubtargetInfo &STI, raw_ostream &O) override;
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
 
   // Autogenerated by tblgen.
   std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
   virtual void printInstruction(const MCInst *MI, uint64_t Address,
                                 const MCSubtargetInfo &STI, raw_ostream &O);

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

AArch64InstPrinter::AArch64InstPrinter(const MCAsmInfo &MAI,
                                        const MCRegisterInfo &MRI)
     : MCInstPrinter(MAI, MII, MRI) {}
 
 AArch64AppleInstPrinter::AArch64AppleInstPrinter(const MCAsmInfo &MAI,
                                                  const MCInstrInfo &MII,
                                                  const MCRegisterInfo &MRI)
     : AArch64InstPrinter(MAI, MII, MRI) {}
 
+bool AArch64InstPrinter::applyTargetSpecificCLOption(StringRef Opt) {
+  if (Opt == "no-aliases") {
+    PrintAliases = false;
+    return true;
+  }
+  return false;
+}
+
 void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   // This is for .cfi directives.
   OS << getRegisterName(RegNo);
 }
 
 void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                    StringRef Annot, const MCSubtargetInfo &STI,
                                    raw_ostream &O) {
void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
 
   // Instruction TSB is specified as a one operand instruction, but 'csync' is
   // not encoded, so for printing it is treated as a special case here:
   if (Opcode == AArch64::TSB) {
     O << "\ttsb\tcsync";
     return;
   }
 
-  if (!printAliasInstr(MI, Address, STI, O))
+  if (!PrintAliases || !printAliasInstr(MI, Address, STI, O))
     printInstruction(MI, Address, STI, O);
 
   printAnnotation(O, Annot);
 
   if (atomicBarrierDroppedOnZero(Opcode) &&
       (MI->getOperand(0).getReg() == AArch64::XZR ||
        MI->getOperand(0).getReg() == AArch64::WZR)) {
     printAnnotation(O, "acquire semantics dropped since destination is zero");

llvm/test/MC/AArch64/alias-addsubimm.s

-// RUN: llvm-mc -triple=aarch64-none-linux-gnu < %s | FileCheck %s
+// RUN: llvm-mc -triple=aarch64-none-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,ALIAS
+// RUN: llvm-mc -triple=aarch64 -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,NOALIAS
 // RUN: not llvm-mc -mattr=+no-neg-immediates -triple=aarch64-none-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-NEG-IMM
 
         add w0, w2, #4096
         sub w0, w2, #4096
 // CHECK: add w0, w2, #1, lsl #12
 // CHECK: sub w0, w2, #1, lsl #12
 
         add w0, w2, #-4096

 // CHECK: adds x1, x3, #4095
 // CHECK: adds x1, x3, #4095
 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
         adds x1, x3, #4095, lsl 0
         subs x1, x3, #-4095, lsl 0
 // CHECK: adds x2, x5, #0
         adds x2, x5, #0
 
-// CHECK: {{adds xzr,|cmn}} x5, #5
-// CHECK: {{adds xzr,|cmn}} x5, #5
+// ALIAS: cmn x5, #5
+// ALIAS: cmn x5, #5
+// NOALIAS: adds xzr, x5, #5
+// NOALIAS: adds xzr, x5, #5
 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
         cmn x5, #5
         cmp x5, #-5
-// CHECK: {{subs xzr,|cmp}} x6, #4095
-// CHECK: {{subs xzr,|cmp}} x6, #4095
+// ALIAS: cmp x6, #4095
+// ALIAS: cmp x6, #4095
+// NOALIAS: subs xzr, x6, #4095
+// NOALIAS: subs xzr, x6, #4095
 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
         cmp x6, #4095
         cmn x6, #-4095
-// CHECK: {{adds wzr,|cmn}} w7, #5
-// CHECK: {{adds wzr,|cmn}} w7, #5
+// ALIAS: cmn w7, #5
+// ALIAS: cmn w7, #5
+// NOALIAS: adds wzr, w7, #5
+// NOALIAS: adds wzr, w7, #5
 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
         cmn w7, #5
         cmp w7, #-5
-// CHECK: {{subs wzr,|cmp}} w8, #4095
-// CHECK: {{subs wzr,|cmp}} w8, #4095
+// ALIAS: cmp w8, #4095
+// ALIAS: cmp w8, #4095
+// NOALIAS: subs wzr, w8, #4095
+// NOALIAS: subs wzr, w8, #4095
 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
         cmp w8, #4095
         cmn w8, #-4095