[PowerPC] Turn Off PC Relative Linker Optimization by Default

[stefanp]

Summary

Currently the PC Relative Linker Optimization is on my default.
This patch turns it off by default.

[NeHuang]

LGTM, please ensure clang-format passing prior to committing the patch.

[amyk]

Also LGTM.

[saghir]

LGTM.

llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp

 //===--------- PPCPreEmitPeephole.cpp - Late peephole optimizations -------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // A pre-emit peephole for catching opportunities introduced by late passes such

 STATISTIC(NumRemovedInPreEmit,
           "Number of instructions deleted in pre-emit peephole");
 STATISTIC(NumberOfSelfCopies,
           "Number of self copy instructions eliminated");
 STATISTIC(NumFrameOffFoldInPreEmit,
           "Number of folding frame offset by using r+r in pre-emit peephole");
 
 static cl::opt<bool>
-EnablePCRelLinkerOpt("ppc-pcrel-linker-opt", cl::Hidden, cl::init(true),
+EnablePCRelLinkerOpt("ppc-pcrel-linker-opt", cl::Hidden, cl::init(false),
                      cl::desc("enable PC Relative linker optimization"));
 
 static cl::opt<bool>
 RunPreEmitPeephole("ppc-late-peephole", cl::Hidden, cl::init(true),
                    cl::desc("Run pre-emit peephole optimizations."));
 
 namespace {
 

llvm/test/CodeGen/PowerPC/p10-spill-crun.ll

 ; CHECK-NEXT:  # %bb.6: # %bb42
 ; CHECK-NEXT:    xxspltidp vs1, 1069547520
 ; CHECK-NEXT:    b .LBB0_13
 ; CHECK-NEXT:  .LBB0_7: # %bb19
 ; CHECK-NEXT:    setnbc r3, 4*cr2+un
 ; CHECK-NEXT:    paddi r4, 0, global_4@PCREL, 1
 ; CHECK-NEXT:    stw r3, 176(r1)
 ; CHECK-NEXT:    pld r3, global_3@got@pcrel(0), 1
-; CHECK-NEXT:  .Lpcrel0:
-; CHECK-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-NEXT:    ld r12, 0(r3)
 ; CHECK-NEXT:    mtctr r12
 ; CHECK-NEXT:    bctrl
 ; CHECK-NEXT:    cmpdi cr4, r3, 0
 ; CHECK-NEXT:    andi. r3, r28, 4
 ; CHECK-NEXT:    cmpwi cr2, r27, 0
 ; CHECK-NEXT:    mcrf cr3, cr0
 ; CHECK-NEXT:    .p2align 5

llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll

 ; CHECK-S-NEXT:    std r0, 16(r1)
 ; CHECK-S-NEXT:    stdu r1, -32(r1)
 ; CHECK-S-NEXT:    .cfi_def_cfa_offset 32
 ; CHECK-S-NEXT:    .cfi_offset lr, 16
 ; CHECK-S-NEXT:    add r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    bl localCall@notoc
 ; CHECK-S-NEXT:    pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT: .Lpcrel0:
-; CHECK-S-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-S-NEXT:    lwz r4, 0(r4)
 ; CHECK-S-NEXT:    mullw r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    addi r1, r1, 32
 ; CHECK-S-NEXT:    ld r0, 16(r1)
 ; CHECK-S-NEXT:    mtlr r0
 ; CHECK-S-NEXT:    blr
 entry:

 ; CHECK-S-NEXT:    std r0, 16(r1)
 ; CHECK-S-NEXT:    stdu r1, -32(r1)
 ; CHECK-S-NEXT:    .cfi_def_cfa_offset 32
 ; CHECK-S-NEXT:    .cfi_offset lr, 16
 ; CHECK-S-NEXT:    add r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    bl externCall@notoc
 ; CHECK-S-NEXT:    pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel1:
-; CHECK-S-NEXT:    .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
 ; CHECK-S-NEXT:    lwz r4, 0(r4)
 ; CHECK-S-NEXT:    mullw r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    addi r1, r1, 32
 ; CHECK-S-NEXT:    ld r0, 16(r1)
 ; CHECK-S-NEXT:    mtlr r0
 ; CHECK-S-NEXT:    blr
 entry:
entry:
   ret i32 %call
 }
 
 define dso_local signext i32 @TailCallLocal2(i32 signext %a) local_unnamed_addr {
 ; CHECK-ALL-LABEL: TailCallLocal2:
 ; CHECK-S:         .localentry     TailCallLocal2
 ; CHECK-S:       # %bb.0: # %entry
 ; CHECK-S:         pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel2:
-; CHECK-S-NEXT:    .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8)
 ; CHECK-S-NEXT:    lwz r4, 0(r4)
 ; CHECK-S-NEXT:    add r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    b localCall@notoc
 entry:
   %0 = load i32, i32* @externGlobalVar, align 4
   %add = add nsw i32 %0, %a
   %call = tail call signext i32 @localCall(i32 signext %add)
entry:
   ret i32 %call
 }
 
 define dso_local signext i32 @TailCallExtern2(i32 signext %a) local_unnamed_addr {
 ; CHECK-ALL-LABEL: TailCallExtern2:
 ; CHECK-S:         .localentry     TailCallExtern2
 ; CHECK-S:       # %bb.0: # %entry
 ; CHECK-S:         pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel3:
-; CHECK-S-NEXT:    .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8)
 ; CHECK-S-NEXT:    lwz r4, 0(r4)
 ; CHECK-S-NEXT:    add r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    b externCall@notoc
 entry:
   %0 = load i32, i32* @externGlobalVar, align 4
   %add = add nsw i32 %0, %a
   %call = tail call signext i32 @externCall(i32 signext %add)

 ; CHECK-S-NEXT:    .cfi_def_cfa_offset 32
 ; CHECK-S-NEXT:    .cfi_offset lr, 16
 ; CHECK-S-NEXT:    pld r12, indirectCall@PCREL(0), 1
 ; CHECK-S-NEXT:    add r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    mtctr r12
 ; CHECK-S-NEXT:    bctrl
 ; CHECK-S-NEXT:    pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel4:
-; CHECK-S-NEXT:    .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
 ; CHECK-S-NEXT:    lwz r4, 0(r4)
 ; CHECK-S-NEXT:    mullw r3, r4, r3
 ; CHECK-S-NEXT:    extsw r3, r3
 ; CHECK-S-NEXT:    addi r1, r1, 32
 ; CHECK-S-NEXT:    ld r0, 16(r1)
 ; CHECK-S-NEXT:    mtlr r0
 ; CHECK-S-NEXT:    blr
 entry:

llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll

 @array = external local_unnamed_addr global [10 x i32], align 4
 @structure = external local_unnamed_addr global %struct.Struct, align 4
 @ptrfunc = external local_unnamed_addr global void (...)*, align 8
 
 define dso_local signext i32 @ReadGlobalVarChar() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalVarChar:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, valChar@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel0:
-; LE-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; LE-NEXT:    lbz r3, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalVarChar:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, valChar@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel0:
-; BE-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; BE-NEXT:    lbz r3, 0(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i8, i8* @valChar, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
entry:
   store i8 3, i8* @valChar, align 1
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarShort() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalVarShort:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, valShort@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel1:
-; LE-NEXT:    .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
 ; LE-NEXT:    lha r3, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalVarShort:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, valShort@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel1:
-; BE-NEXT:    .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
 ; BE-NEXT:    lha r3, 0(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i16, i16* @valShort, align 2
   %conv = sext i16 %0 to i32
   ret i32 %conv
 }
 
entry:
   store i16 3, i16* @valShort, align 2
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarInt() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalVarInt:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, valInt@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel2:
-; LE-NEXT:    .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8)
 ; LE-NEXT:    lwa r3, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalVarInt:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, valInt@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel2:
-; BE-NEXT:    .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8)
 ; BE-NEXT:    lwa r3, 0(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* @valInt, align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalVarInt() local_unnamed_addr  {
entry:
   store i32 33, i32* @valInt, align 4
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarUnsigned() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalVarUnsigned:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, valUnsigned@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel3:
-; LE-NEXT:    .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8)
 ; LE-NEXT:    lwa r3, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalVarUnsigned:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, valUnsigned@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel3:
-; BE-NEXT:    .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8)
 ; BE-NEXT:    lwa r3, 0(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* @valUnsigned, align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalVarUnsigned() local_unnamed_addr  {
entry:
   store i32 33, i32* @valUnsigned, align 4
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarLong() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalVarLong:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, valLong@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel4:
-; LE-NEXT:    .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
 ; LE-NEXT:    lwa r3, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalVarLong:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, valLong@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel4:
-; BE-NEXT:    .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
 ; BE-NEXT:    lwa r3, 4(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i64, i64* @valLong, align 8
   %conv = trunc i64 %0 to i32
   ret i32 %conv
 }
 
entry:
   store i64 3333, i64* @valLong, align 8
   ret void
 }
 
 define dso_local i32* @ReadGlobalPtr() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalPtr:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, ptr@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel5:
-; LE-NEXT:    .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8)
 ; LE-NEXT:    ld r3, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalPtr:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, ptr@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel5:
-; BE-NEXT:    .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8)
 ; BE-NEXT:    ld r3, 0(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i32*, i32** @ptr, align 8
   ret i32* %0
 }
 
 define dso_local void @WriteGlobalPtr() local_unnamed_addr  {
 ; LE-LABEL: WriteGlobalPtr:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, ptr@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel6:
 ; LE-NEXT:    li r4, 3
-; LE-NEXT:    .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8)
 ; LE-NEXT:    ld r3, 0(r3)
 ; LE-NEXT:    stw r4, 0(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: WriteGlobalPtr:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, ptr@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel6:
 ; BE-NEXT:    li r4, 3
-; BE-NEXT:    .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8)
 ; BE-NEXT:    ld r3, 0(r3)
 ; BE-NEXT:    stw r4, 0(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i32*, i32** @ptr, align 8
   store i32 3, i32* %0, align 4
   ret void
 }

 entry:
   ret i32* @valInt
 }
 
 define dso_local signext i32 @ReadGlobalArray() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalArray:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, array@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel7:
-; LE-NEXT:    .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8)
 ; LE-NEXT:    lwa r3, 12(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalArray:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, array@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel7:
-; BE-NEXT:    .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8)
 ; BE-NEXT:    lwa r3, 12(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array, i64 0, i64 3), align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalArray() local_unnamed_addr  {
entry:
   store i32 5, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array, i64 0, i64 3), align 4
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalStruct() local_unnamed_addr  {
 ; LE-LABEL: ReadGlobalStruct:
 ; LE:       # %bb.0: # %entry
 ; LE-NEXT:    pld r3, structure@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel8:
-; LE-NEXT:    .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8)
 ; LE-NEXT:    lwa r3, 4(r3)
 ; LE-NEXT:    blr
 ;
 ; BE-LABEL: ReadGlobalStruct:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    pld r3, structure@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel8:
-; BE-NEXT:    .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8)
 ; BE-NEXT:    lwa r3, 4(r3)
 ; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @structure, i64 0, i32 2), align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalStruct() local_unnamed_addr  {
entry:
   ret void
 }
 
 define dso_local void @ReadFuncPtr() local_unnamed_addr  {
 ; LE-LABEL: ReadFuncPtr:
 ; LE:         .localentry ReadFuncPtr, 1
 ; LE-NEXT:  # %bb.0: # %entry
 ; LE-NEXT:    pld r3, ptrfunc@got@pcrel(0), 1
-; LE-NEXT:  .Lpcrel9:
-; LE-NEXT:    .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8)
 ; LE-NEXT:    ld r12, 0(r3)
 ; LE-NEXT:    mtctr r12
 ; LE-NEXT:    bctr
 ; LE-NEXT:    #TC_RETURNr8 ctr 0
 ;
 ; BE-LABEL: ReadFuncPtr:
 ; BE:         .localentry ReadFuncPtr, 1
 ; BE-NEXT:  # %bb.0: # %entry
 ; BE-NEXT:    pld r3, ptrfunc@got@pcrel(0), 1
-; BE-NEXT:  .Lpcrel9:
-; BE-NEXT:    .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8)
 ; BE-NEXT:    ld r12, 0(r3)
 ; BE-NEXT:    mtctr r12
 ; BE-NEXT:    bctr
 ; BE-NEXT:    #TC_RETURNr8 ctr 0
 entry:
   %0 = load void ()*, void ()** bitcast (void (...)** @ptrfunc to void ()**), align 8
   tail call void %0()
   ret void

llvm/test/CodeGen/PowerPC/pcrel-linkeropt-option.ll

 ; RUN:   -ppc-pcrel-linker-opt=false < %s | FileCheck %s --check-prefix=OFF
 
 @input8 = external local_unnamed_addr global i8, align 1
 
 define dso_local i8 @Read8() local_unnamed_addr {
 ; DEFAULT-LABEL: Read8:
 ; DEFAULT:       # %bb.0: # %entry
 ; DEFAULT-NEXT:    pld r3, input8@got@pcrel(0), 1
-; DEFAULT-NEXT:  .Lpcrel0:
-; DEFAULT-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; DEFAULT-NEXT:    lbz r3, 0(r3)
 ; DEFAULT-NEXT:    blr
 ;
 ; ON-LABEL: Read8:
 ; ON:       # %bb.0: # %entry
 ; ON-NEXT:    pld r3, input8@got@pcrel(0), 1
 ; ON-NEXT:  .Lpcrel0:
 ; ON-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)

llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
-; RUN:   < %s | FileCheck %s
+; RUN:   -ppc-pcrel-linker-opt=true < %s | FileCheck %s
 
 ; On future CPU with PC Relative addressing enabled, it is possible for the
 ; linker to optimize GOT indirect accesses. In order for the linker to do this
 ; the compiler needs to add a hint using the R_PPC64_PCREL_OPT relocation.
 ; This test checks that the compiler adds the R_PPC64_PCREL_OPT relocation
 ; correctly.
 
 @input8 = external local_unnamed_addr global i8, align 1

llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll

entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array2, i64 0, i64 -2), align 4
   ret i32 %0
 }
 
 define dso_local signext i32 @getElementExtern4() local_unnamed_addr {
 ; CHECK-S-LABEL: getElementExtern4:
 ; CHECK-S:       # %bb.0: # %entry
 ; CHECK-S-NEXT:    pld r3, array1@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel0:
-; CHECK-S-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-S-NEXT:    lwa r3, 16(r3)
 ; CHECK-S-NEXT:    blr
 ; CHECK-O-LABEL: <getElementExtern4>:
 ; CHECK-O:         pld 3, 0(0), 1
 ; CHECK-O-NEXT:      R_PPC64_GOT_PCREL34  array1
-; CHECK-O-NEXT:      R_PPC64_PCREL_OPT *ABS*+0x8
 ; CHECK-O:         lwa 3, 16(3)
 ; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array1, i64 0, i64 4), align 4
   ret i32 %0
 }
 
 define dso_local signext i32 @getElementExternNegative() local_unnamed_addr {
 ; CHECK-S-LABEL: getElementExternNegative:
 ; CHECK-S:       # %bb.0: # %entry
 ; CHECK-S-NEXT:    pld r3, array1@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel1:
-; CHECK-S-NEXT:    .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
 ; CHECK-S-NEXT:    lwa r3, -4(r3)
 ; CHECK-S-NEXT:    blr
 ; CHECK-O-LABEL: <getElementExternNegative>:
 ; CHECK-O:         pld 3, 0(0), 1
 ; CHECK-O-NEXT:      R_PPC64_GOT_PCREL34  array1
-; CHECK-O-NEXT:      R_PPC64_PCREL_OPT *ABS*+0x8
 ; CHECK-O:         lwa 3, -4(3)
 ; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array1, i64 0, i64 -1), align 4
   ret i32 %0
 }
 
 

llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll

entry:
   ret void
 }
 
 define dso_local void @TailCallExtrnFuncPtr() local_unnamed_addr {
 ; CHECK-LABEL: TailCallExtrnFuncPtr:
 ; CHECK:         .localentry TailCallExtrnFuncPtr, 1
 ; CHECK-NEXT:  # %bb.0: # %entry
 ; CHECK-NEXT:    pld r3, Func@got@pcrel(0), 1
-; CHECK-NEXT:  .Lpcrel0:
-; CHECK-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-NEXT:    ld r12, 0(r3)
 ; CHECK-NEXT:    mtctr r12
 ; CHECK-NEXT:    bctr
 ; CHECK-NEXT:    #TC_RETURNr8 ctr 0
 entry:
   %0 = load i32 ()*, i32 ()** bitcast (i32 (...)** @Func to i32 ()**), align 8
   %call = tail call signext i32 %0()
   ret void

llvm/test/CodeGen/PowerPC/pcrel.ll

entry:
   ret i32 %0
 }
 
 @valIntGlob = external global i32, align 4
 define dso_local signext i32 @ReadGlobalVarInt() local_unnamed_addr  {
 ; CHECK-S-LABEL: ReadGlobalVarInt
 ; CHECK-S:       # %bb.0: # %entry
 ; CHECK-S-NEXT:    pld r3, valIntGlob@got@pcrel(0), 1
-; CHECK-S-NEXT: .Lpcrel0:
-; CHECK-S-NEXT:    .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-S-NEXT:    lwa r3, 0(r3)
 ; CHECK-S-NEXT:    blr
 
 ; CHECK-O-LABEL: ReadGlobalVarInt
 ; CHECK-O:         pld 3, 0(0), 1
 ; CHECK-O-NEXT:    R_PPC64_GOT_PCREL34 valIntGlob
-; CHECK-O-NEXT:    R_PPC64_PCREL_OPT *ABS*+0x8
 ; CHECK-O-NEXT:    lwa 3, 0(3)
 ; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* @valIntGlob, align 4
   ret i32 %0
 }