[SVE][LoopVectorize] Verify support for vectorizing loops with invariant loads

[kmclaughlin]

Summary

D95598 added a cost model for broadcast shuffle, which should enable loops
such as the following to vectorize, where the load of b[42] is invariant
and can be done using a scalar load + splat:

for (int i=0; i<n; ++i)
  a[i] = b[i] + b[42];

This patch adds tests to verify that we can vectorize such loops.

[CarolineConcatto]

Hey Kerry,

Last time @david-arm asked me to test something like this with the reverse vector:

if (cond[i])
 a[i] = b[i] + b[42];

Is it valid to do the same here?

llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll

2

Should we add this:

; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t

; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.$
; WARN-NOT: warning

too?

7

Just in case...could any of these be CHECK-NEXT?
I believe the test gets stronger when we use CHECK-NEXT if possible.

[david-arm]

Hi @CarolineConcatto, it sounds like a good idea to the reverse vector case, but I guess that probably depends upon your patch (D95363)?

[joechrisellis]

Hi @kmclaughlin -- looks good to me modulo @david-arm's and @CarolineConcatto's comments. 🙂

[kmclaughlin]

• Added a CHECK line for warnings and another test for the following:

if (cond[i])
 a[i] = b[i] + b[42];

[david-arm]

LGTM!

llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll

+; RUN: opt -S -loop-vectorize -mattr=+sve -mtriple aarch64 < %s | FileCheck %s
+
+define void @invariant_load(i64 %n, i32* noalias nocapture %a, i32* nocapture readonly %b) {
+; CHECK-LABEL: @invariant_load
+; CHECK: vector.body:
+; CHECK: %[[GEP:.*]] = getelementptr inbounds i32, i32* %b, i64 42
+; CHECK: %[[INVLOAD:.*]] = load i32, i32* %[[GEP]]
+; CHECK: %[[SPLATINS:.*]] = insertelement <vscale x 4 x i32> poison, i32 %[[INVLOAD]], i32 0
+; CHECK: %[[SPLAT:.*]] = shufflevector <vscale x 4 x i32> %[[SPLATINS]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
+; CHECK: %[[LOAD:.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>*
+; CHECK: %[[ADD:.*]] = add nsw <vscale x 4 x i32> %[[SPLAT]], %[[LOAD]]
+; CHECK: store <vscale x 4 x i32> %[[ADD]], <vscale x 4 x i32>*
+entry:
+  br label %for.body
+
+for.body:                                         ; preds = %for.body.lr.ph, %for.body
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %arrayidx = getelementptr inbounds i32, i32* %b, i64 42
+  %0 = load i32, i32* %arrayidx, align 4
+  %arrayidx1 = getelementptr inbounds i32, i32* %b, i64 %iv
+  %1 = load i32, i32* %arrayidx1, align 4
+  %add = add nsw i32 %0, %1
+  %arrayidx2 = getelementptr inbounds i32, i32* %a, i64 %iv
+  store i32 %add, i32* %arrayidx2, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond.not = icmp eq i64 %iv.next, %n
+  br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !1
+
+for.end:                                          ; preds = %for.body
+  ret void
+}
+
+!1 = distinct !{!1, !2, !3, !4}
+!2 = !{!"llvm.loop.vectorize.width", i32 4}
+!3 = !{!"llvm.loop.interleave.count", i32 1}
+!4 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}