[MLIR][SPIRV] Rename `spv.selection` to `spv.mlir.selection`.

[ergawy]

Summary

To unify the naming scheme across all ops in the SPIR-V dialect, we are
moving from spv.camelCase to spv.CamelCase everywhere. For ops that
don't have a SPIR-V spec counterpart, we use spv.mlir.snake_case.

[antiagainst]

Could you rebase and land it?

[ergawy]

Rebase.

mlir/docs/Dialects/SPIR-V.md

 flow subsequently converges. These blocks delimit constructs that must nest, and
 can only be entered and exited in structured ways.
 
 In the SPIR-V dialect, we use regions to mark the boundary of a structured
 control flow construct. With this approach, it's easier to discover all blocks
 belonging to a structured control flow construct. It is also more idiomatic to
 MLIR system.
 
-We introduce a `spv.selection` and `spv.mlir.loop` op for structured selections and
+We introduce a `spv.mlir.selection` and `spv.mlir.loop` op for structured selections and
 loops, respectively. The merge targets are the next ops following them. Inside
 their regions, a special terminator, `spv.mlir.merge` is introduced for branching to
 the merge target.
 
 ### Selection
 
-`spv.selection` defines a selection construct. It contains one region. The
+`spv.mlir.selection` defines a selection construct. It contains one region. The
 region should contain at least two blocks: one selection header block and one
 merge block.
 
 *   The selection header block should be the first block. It should contain the
     `spv.BranchConditional` or `spv.Switch` op.
 *   The merge block should be the last block. The merge block should only
     contain a `spv.mlir.merge` op. Any block can branch to the merge block for early
     exit.

 
 ```mlir
 func @selection(%cond: i1) -> () {
   %zero = spv.Constant 0: i32
   %one = spv.Constant 1: i32
   %two = spv.Constant 2: i32
   %x = spv.Variable init(%zero) : !spv.ptr<i32, Function>
 
-  spv.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     spv.Store "Function" %x, %one : i32
     spv.Branch ^merge
 
   ^else:
     spv.Store "Function" %x, %two : i32

 ```
 
 It will be represented as:
 
 ```mlir
 func @foo() -> () {
   %var = spv.Variable : !spv.ptr<i32, Function>
 
-  spv.selection {
+  spv.mlir.selection {
     %true = spv.Constant true
     spv.BranchConditional %true, ^true, ^false
 
   ^true:
     %zero = spv.Constant 0 : i32
     spv.Branch ^phi(%zero: i32)
 
   ^false:
*   Attributes on `spv.module` are emitted as their corresponding SPIR-V
     instructions.
 *   Types are serialized into `OpType*` instructions in the SPIR-V binary module
     section for types, constants, and global variables.
 *   `spv.Constant`s are unified and placed in the SPIR-V binary module section
     for types, constants, and global variables.
 *   Attributes on ops, if not part of the op's binary encoding, are emitted as
     `OpDecorate*` instructions in the SPIR-V binary module section for
     decorations.
-*   `spv.selection`s and `spv.mlir.loop`s are emitted as basic blocks with `Op*Merge`
+*   `spv.mlir.selection`s and `spv.mlir.loop`s are emitted as basic blocks with `Op*Merge`
     instructions in the header block as required by the binary format.
 *   Block arguments are materialized as `OpPhi` instructions at the beginning of
     the corresponding blocks.
 
 Similarly, a few transformations are performed during deserialization:
 
 *   Instructions for execution environment requirements (extensions,
     capabilities, extended instruction sets, etc.) will be placed as attributes
     on `spv.module`.
 *   `OpType*` instructions will be converted into proper `mlir::Type`s.
 *   `OpConstant*` instructions are materialized as `spv.Constant` at each use
     site.
 *   `OpVariable` instructions will be converted to `spv.GlobalVariable` ops if
     in module-level; otherwise they will be converted into `spv.Variable` ops.
 *   Every use of a module-level `OpVariable` instruction will materialize a
     `spv.mlir.addressof` op to turn the symbol of the corresponding
     `spv.GlobalVariable` into an SSA value.
 *   Every use of a `OpSpecConstant` instruction will materialize a
     `spv.mlir.referenceof` op to turn the symbol of the corresponding
     `spv.SpecConstant` into an SSA value.
 *   `OpPhi` instructions are converted to block arguments.
-*   Structured control flow are placed inside `spv.selection` and `spv.mlir.loop`.
+*   Structured control flow are placed inside `spv.mlir.selection` and `spv.mlir.loop`.
 
 ## Conversions
 
 One of the main features of MLIR is the ability to progressively lower from
 dialects that capture programmer abstraction into dialects that are closer to a
 machine representation, like SPIR-V dialect. This progressive lowering through
 multiple dialects is enabled through the use of the
 [DialectConversion][MlirDialectConversion] framework in MLIR. To simplify

mlir/docs/SPIRVToLLVMDialectConversion.md

 
 `spv.FunctionCall` maps to `llvm.call`. For example:
 
 ```mlir
 %0 = spv.FunctionCall @foo() : () -> i32    =>    %0 = llvm.call @foo() : () -> f32
 spv.FunctionCall @bar(%0) : (i32) -> ()     =>    llvm.call @bar(%0) : (f32) -> ()
 ```
 
-### `spv.selection` and `spv.mlir.loop`
+### `spv.mlir.selection` and `spv.mlir.loop`
 
-Control flow within `spv.selection` and `spv.mlir.loop` is lowered directly to LLVM
+Control flow within `spv.mlir.selection` and `spv.mlir.loop` is lowered directly to LLVM
 via branch ops. The conversion can only be applied to selection or loop with all
 blocks being reachable. Moreover, selection and loop control attributes (such as
 `Flatten` or `Unroll`) are not supported at the moment.
 
 ```mlir
 // Conversion of selection
 %cond = spv.Constant true                               %cond = llvm.mlir.constant(true) : i1
-spv.selection {
+spv.mlir.selection {
   spv.BranchConditional %cond, ^true, ^false            llvm.cond_br %cond, ^true, ^false
 
 ^true:                                                                                              ^true:
   // True block code                                    // True block code
   spv.Branch ^merge                             =>      llvm.br ^merge
 
 ^false:                                               ^false:
   // False block code                                   // False block code

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td

 }
 
 // -----
 
 def SPV_MergeOp : SPV_Op<"mlir.merge", [NoSideEffect, Terminator]> {
   let summary = "A special terminator for merging a structured selection/loop.";
 
   let description = [{
-    We use `spv.selection`/`spv.mlir.loop` for modelling structured selection/loop.
+    We use `spv.mlir.selection`/`spv.mlir.loop` for modelling structured selection/loop.
     This op is a terminator used inside their regions to mean jumping to the
-    merge point, which is the next op following the `spv.selection` or
+    merge point, which is the next op following the `spv.mlir.selection` or
     `spv.mlir.loop` op. This op does not have a corresponding instruction in the
     SPIR-V binary format; it's solely for structural purpose.
   }];
 
   let arguments = (ins);
 
   let results = (outs);
 
let arguments = (ins
     SPV_Type:$value
   );
 
   let results = (outs);
 
   let assemblyFormat = "$value attr-dict `:` type($value)";
 }
 
-def SPV_SelectionOp : SPV_Op<"selection", [InFunctionScope]> {
+def SPV_SelectionOp : SPV_Op<"mlir.selection", [InFunctionScope]> {
   let summary = "Define a structured selection.";
 
   let description = [{
     SPIR-V can explicitly declare structured control-flow constructs using merge
     instructions. These explicitly declare a header block before the control
     flow diverges and a merge block where control flow subsequently converges.
     These blocks delimit constructs that must nest, and can only be entered
     and exited in structured ways. See "2.11. Structured Control Flow" of the
     SPIR-V spec for more details.
 
     Instead of having a `spv.SelectionMerge` op to directly model selection
     merge instruction for indicating the merge target, we use regions to delimit
     the boundary of the selection: the merge target is the next op following the
-    `spv.selection` op. This way it's easier to discover all blocks belonging to
+    `spv.mlir.selection` op. This way it's easier to discover all blocks belonging to
     the selection and it plays nicer with the MLIR system.
 
-    The `spv.selection` region should contain at least two blocks: one selection
+    The `spv.mlir.selection` region should contain at least two blocks: one selection
     header block, and one selection merge. The selection header block should be
     the first block. The selection merge block should be the last block.
     The merge block should only contain a `spv.mlir.merge` op.
   }];
 
   let arguments = (ins
     SPV_SelectionControlAttr:$selection_control
   );
 
   let results = (outs);
 
   let regions = (region AnyRegion:$body);
 
   let extraClassDeclaration = [{
     /// Returns the selection header block.
     Block *getHeaderBlock();
 
     /// Returns the selection merge block.
     Block *getMergeBlock();
 
     /// Adds a selection merge block containing one spv.mlir.merge op.
     void addMergeBlock();
 
-    /// Creates a spv.selection op for `if (<condition>) then { <thenBody> }`
+    /// Creates a spv.mlir.selection op for `if (<condition>) then { <thenBody> }`
     /// with `builder`. `builder`'s insertion point will remain at after the
-    /// newly inserted spv.selection op afterwards.
+    /// newly inserted spv.mlir.selection op afterwards.
     static SelectionOp createIfThen(
         Location loc, Value condition,
         function_ref<void(OpBuilder &builder)> thenBody,
         OpBuilder &builder);
   }];
 
   let hasOpcode = 0;
 
   let autogenSerialization = 0;
 
   let hasCanonicalizer = 1;
 }
 
 #endif // MLIR_DIALECT_SPIRV_IR_CONTROLFLOW_OPS

mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp

 
 //===----------------------------------------------------------------------===//
 // Context
 //===----------------------------------------------------------------------===//
 
 namespace mlir {
 struct ScfToSPIRVContextImpl {
   // Map between the spirv region control flow operation (spv.mlir.loop or
-  // spv.selection) to the VariableOp created to store the region results. The
-  // order of the VariableOp matches the order of the results.
+  // spv.mlir.selection) to the VariableOp created to store the region results.
+  // The order of the VariableOp matches the order of the results.
   DenseMap<Operation *, SmallVector<spirv::VariableOp, 8>> outputVars;
 };
 } // namespace mlir
 
 /// We use ScfToSPIRVContext to store information about the lowering of the scf
 /// region that need to be used later on. When we lower scf.for/scf.if we create
 /// VariableOp to store the results. We need to keep track of the VariableOp
 /// created as we need to insert stores into them when lowering Yield. Those
public:
   LogicalResult
   matchAndRewrite(scf::YieldOp terminatorOp, ArrayRef<Value> operands,
                   ConversionPatternRewriter &rewriter) const override;
 };
 } // namespace
 
 /// Helper function to replaces SCF op outputs with SPIR-V variable loads.
 /// We create VariableOp to handle the results value of the control flow region.
-/// spv.mlir.loop/spv.selection currently don't yield value. Right after the
-/// loop we load the value from the allocation and use it as the SCF op result.
+/// spv.mlir.loop/spv.mlir.selection currently don't yield value. Right after
+/// the loop we load the value from the allocation and use it as the SCF op
+/// result.
 template <typename ScfOp, typename OpTy>
 static void replaceSCFOutputValue(ScfOp scfOp, OpTy newOp,
                                   ConversionPatternRewriter &rewriter,
                                   ScfToSPIRVContextImpl *scfToSPIRVContext,
                                   ArrayRef<Type> returnTypes) {
 
   Location loc = scfOp.getLoc();
   auto &allocas = scfToSPIRVContext->outputVars[newOp];

 IfOpConversion::matchAndRewrite(scf::IfOp ifOp, ArrayRef<Value> operands,
                                 ConversionPatternRewriter &rewriter) const {
   // When lowering `scf::IfOp` we explicitly create a selection header block
   // before the control flow diverges and a merge block where control flow
   // subsequently converges.
   scf::IfOpAdaptor ifOperands(operands);
   auto loc = ifOp.getLoc();
 
-  // Create `spv.selection` operation, selection header block and merge block.
+  // Create `spv.mlir.selection` operation, selection header block and merge
+  // block.
   auto selectionControl = rewriter.getI32IntegerAttr(
       static_cast<uint32_t>(spirv::SelectionControl::None));
   auto selectionOp = rewriter.create<spirv::SelectionOp>(loc, selectionControl);
   auto *mergeBlock =
       rewriter.createBlock(&selectionOp.body(), selectionOp.body().end());
   rewriter.create<spirv::MergeOp>(loc);
 
   OpBuilder::InsertionGuard guard(rewriter);

mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp

matchAndRewrite(spirv::LoopOp loopOp, ArrayRef<Value> operands,
     rewriter.create<LLVM::BrOp>(loc, terminatorOperands, endBlock);
 
     rewriter.inlineRegionBefore(loopOp.body(), endBlock);
     rewriter.replaceOp(loopOp, endBlock->getArguments());
     return success();
   }
 };
 
-/// Converts `spv.selection` with `spv.BranchConditional` in its header block.
-/// All blocks within selection should be reachable for conversion to succeed.
+/// Converts `spv.mlir.selection` with `spv.BranchConditional` in its header
+/// block. All blocks within selection should be reachable for conversion to
+/// succeed.
 class SelectionPattern : public SPIRVToLLVMConversion<spirv::SelectionOp> {
 public:
   using SPIRVToLLVMConversion<spirv::SelectionOp>::SPIRVToLLVMConversion;
 
   LogicalResult
   matchAndRewrite(spirv::SelectionOp op, ArrayRef<Value> operands,
                   ConversionPatternRewriter &rewriter) const override {
     // There is no support for `Flatten` or `DontFlatten` selection control at
     // the moment. This are just compiler hints and can be performed during the
     // optimization passes.
     if (op.selection_control() != spirv::SelectionControl::None)
       return failure();
 
-    // `spv.selection` should have at least two blocks: one selection header
-    // block and one merge block. If no blocks are present, or control flow
-    // branches straight to merge block (two blocks are present), the op is
+    // `spv.mlir.selection` should have at least two blocks: one selection
+    // header block and one merge block. If no blocks are present, or control
+    // flow branches straight to merge block (two blocks are present), the op is
     // redundant and it is erased.
     if (op.body().getBlocks().size() <= 2) {
       rewriter.eraseOp(op);
       return success();
     }
 
     Location loc = op.getLoc();
 
-    // Split the current block after `spv.selection`. The remaining ops will be
-    // used in `continueBlock`.
+    // Split the current block after `spv.mlir.selection`. The remaining ops
+    // will be used in `continueBlock`.
     auto *currentBlock = rewriter.getInsertionBlock();
     rewriter.setInsertionPointAfter(op);
     auto position = rewriter.getInsertionPoint();
     auto *continueBlock = rewriter.splitBlock(currentBlock, position);
 
     // Extract conditional branch information from the header block. By SPIR-V
     // dialect spec, it should contain `spv.BranchConditional` or `spv.Switch`
     // op. Note that `spv.Switch op` is not supported at the moment in the

mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp

if (auto rhs = getScalarOrSplatBoolAttr(operands.back())) {
     if (!rhs.getValue())
       return operand1();
   }
 
   return Attribute();
 }
 
 //===----------------------------------------------------------------------===//
-// spv.selection
+// spv.mlir.selection
 //===----------------------------------------------------------------------===//
 
 namespace {
-// Blocks from the given `spv.selection` operation must satisfy the following
-// layout:
+// Blocks from the given `spv.mlir.selection` operation must satisfy the
+// following layout:
 //
 //       +-----------------------------------------------+
 //       | header block                                  |
 //       | spv.BranchConditionalOp %cond, ^case0, ^case1 |
 //       +-----------------------------------------------+
 //                            /   \
 //                             ...
 //

 struct ConvertSelectionOpToSelect
     : public OpRewritePattern<spirv::SelectionOp> {
   using OpRewritePattern<spirv::SelectionOp>::OpRewritePattern;
 
   LogicalResult matchAndRewrite(spirv::SelectionOp selectionOp,
                                 PatternRewriter &rewriter) const override {
     auto *op = selectionOp.getOperation();
     auto &body = op->getRegion(0);
-    // Verifier allows an empty region for `spv.selection`.
+    // Verifier allows an empty region for `spv.mlir.selection`.
     if (body.empty()) {
       return failure();
     }
 
     // Check that region consists of 4 blocks:
     // header block, `true` block, `false` block and merge block.
     if (std::distance(body.begin(), body.end()) != 4) {
       return failure();
auto storeOpAttributes =
         cast<spirv::StoreOp>(trueBlock->front())->getAttrs();
 
     auto selectOp = rewriter.create<spirv::SelectOp>(
         selectionOp.getLoc(), trueValue.getType(), brConditionalOp.condition(),
         trueValue, falseValue);
     rewriter.create<spirv::StoreOp>(selectOp.getLoc(), ptrValue,
                                     selectOp.getResult(), storeOpAttributes);
 
-    // `spv.selection` is not needed anymore.
+    // `spv.mlir.selection` is not needed anymore.
     rewriter.eraseOp(op);
     return success();
   }
 
 private:
   // Checks that given blocks follow the following rules:
   // 1. Each conditional block consists of two operations, the first operation
   //    is a `spv.Store` and the last operation is a `spv.Branch`.

mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp

bool isLegalToInline(Operation *call, Operation *callable,
                        bool wouldBeCloned) const final {
     return true;
   }
 
   /// Returns true if the given region 'src' can be inlined into the region
   /// 'dest' that is attached to an operation registered to the current dialect.
   bool isLegalToInline(Region *dest, Region *src, bool wouldBeCloned,
                        BlockAndValueMapping &) const final {
-    // Return true here when inlining into spv.func, spv.selection, and
+    // Return true here when inlining into spv.func, spv.mlir.selection, and
     // spv.mlir.loop operations.
     auto *op = dest->getParentOp();
     return isa<spirv::FuncOp, spirv::SelectionOp, spirv::LoopOp>(op);
   }
 
   /// Returns true if the given operation 'op', that is registered to this
   /// dialect, can be inlined into the region 'dest' that is attached to an
   /// operation registered to the current dialect.

mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp

 //===----------------------------------------------------------------------===//
 // spv.mlir.merge
 //===----------------------------------------------------------------------===//
 
 static LogicalResult verify(spirv::MergeOp mergeOp) {
   auto *parentOp = mergeOp->getParentOp();
   if (!parentOp || !isa<spirv::SelectionOp, spirv::LoopOp>(parentOp))
     return mergeOp.emitOpError(
-        "expected parent op to be 'spv.selection' or 'spv.mlir.loop'");
+        "expected parent op to be 'spv.mlir.selection' or 'spv.mlir.loop'");
 
   Block &parentLastBlock = mergeOp->getParentRegion()->back();
   if (mergeOp.getOperation() != parentLastBlock.getTerminator())
     return mergeOp.emitOpError("can only be used in the last block of "
-                               "'spv.selection' or 'spv.mlir.loop'");
+                               "'spv.mlir.selection' or 'spv.mlir.loop'");
   return success();
 }
 
 //===----------------------------------------------------------------------===//
 // spv.module
 //===----------------------------------------------------------------------===//
 
 void spirv::ModuleOp::build(OpBuilder &builder, OperationState &state,
if (resultVectorTy.getNumElements() != conditionTy.getNumElements()) {
       return op.emitOpError("result should have the same number of elements as "
                             "the condition when condition is of vector type");
     }
   }
   return success();
 }
 
 //===----------------------------------------------------------------------===//
-// spv.selection
+// spv.mlir.selection
 //===----------------------------------------------------------------------===//
 
 static ParseResult parseSelectionOp(OpAsmParser &parser,
                                     OperationState &state) {
   if (parseControlAttribute<spirv::SelectionControl>(parser, state))
     return failure();
   return parser.parseRegion(*state.addRegion(), /*arguments=*/{},
                             /*argTypes=*/{});

mlir/lib/Target/SPIRV/Deserialization/Deserializer.h

 
 //===----------------------------------------------------------------------===//
 // Utility Definitions
 //===----------------------------------------------------------------------===//
 
 /// A struct for containing a header block's merge and continue targets.
 ///
 /// This struct is used to track original structured control flow info from
-/// SPIR-V blob. This info will be used to create spv.selection/spv.mlir.loop
-/// later.
+/// SPIR-V blob. This info will be used to create
+/// spv.mlir.selection/spv.mlir.loop later.
 struct BlockMergeInfo {
   Block *mergeBlock;
-  Block *continueBlock; // nullptr for spv.selection
+  Block *continueBlock; // nullptr for spv.mlir.selection
   Location loc;
   uint32_t control;
 
   BlockMergeInfo(Location location, uint32_t control)
       : mergeBlock(nullptr), continueBlock(nullptr), loc(location),
         control(control) {}
   BlockMergeInfo(Location location, uint32_t control, Block *m,
                  Block *c = nullptr)
private:
   // Control flow
   //===--------------------------------------------------------------------===//
 
   /// Returns the block for the given label <id>.
   Block *getBlock(uint32_t id) const { return blockMap.lookup(id); }
 
   // In SPIR-V, structured control flow is explicitly declared using merge
   // instructions (OpSelectionMerge and OpLoopMerge). In the SPIR-V dialect,
-  // we use spv.selection and spv.mlir.loop to group structured control flow.
-  // The deserializer need to turn structured control flow marked with merge
-  // instructions into using spv.selection/spv.mlir.loop ops.
+  // we use spv.mlir.selection and spv.mlir.loop to group structured control
+  // flow. The deserializer need to turn structured control flow marked with
+  // merge instructions into using spv.mlir.selection/spv.mlir.loop ops.
   //
   // Because structured control flow can nest and the basic block order have
   // flexibility, we cannot isolate a structured selection/loop without
   // deserializing all the blocks. So we use the following approach:
   //
   // 1. Deserialize all basic blocks in a function and create MLIR blocks for
   //    them into the function's region. In the meanwhile, keep a map between
   //    selection/loop header blocks to their corresponding merge (and continue)
   //    target blocks.
   // 2. For each selection/loop header block, recursively get all basic blocks
   //    reachable (except the merge block) and put them in a newly created
-  //    spv.selection/spv.mlir.loop's region. Structured control flow guarantees
-  //    that we enter and exit in structured ways and the construct is nestable.
-  // 3. Put the new spv.selection/spv.mlir.loop op at the beginning of the old
-  // merge
+  //    spv.mlir.selection/spv.mlir.loop's region. Structured control flow
+  //    guarantees that we enter and exit in structured ways and the construct
+  //    is nestable.
+  // 3. Put the new spv.mlir.selection/spv.mlir.loop op at the beginning of the
+  // old merge
   //    block and redirect all branches to the old header block to the old
-  //    merge block (which contains the spv.selection/spv.mlir.loop op now).
+  //    merge block (which contains the spv.mlir.selection/spv.mlir.loop op
+  //    now).
 
   /// For OpPhi instructions, we use block arguments to represent them. OpPhi
   /// encodes a list of (value, predecessor) pairs. At the time of handling the
   /// block containing an OpPhi instruction, the predecessor block might not be
   /// processed yet, also the value sent by it. So we need to defer handling
   /// the block argument from the predecessors. We use the following approach:
   ///
   /// 1. For each OpPhi instruction, add a block argument to the current block
private:
   /// Processes a SPIR-V OpPhi instruction with the given `operands`.
   LogicalResult processPhi(ArrayRef<uint32_t> operands);
 
   /// Creates block arguments on predecessors previously recorded when handling
   /// OpPhi instructions.
   LogicalResult wireUpBlockArgument();
 
   /// Extracts blocks belonging to a structured selection/loop into a
-  /// spv.selection/spv.mlir.loop op. This method iterates until all blocks
+  /// spv.mlir.selection/spv.mlir.loop op. This method iterates until all blocks
   /// declared as selection/loop headers are handled.
   LogicalResult structurizeControlFlow();
 
   //===--------------------------------------------------------------------===//
   // Instruction
   //===--------------------------------------------------------------------===//
 
   /// Get the Value associated with a result <id>.

mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp

 LogicalResult
 spirv::Deserializer::processFunctionEnd(ArrayRef<uint32_t> operands) {
   // Process OpFunctionEnd.
   if (!operands.empty()) {
     return emitError(unknownLoc, "unexpected operands for OpFunctionEnd");
   }
 
   // Wire up block arguments from OpPhi instructions.
-  // Put all structured control flow in spv.selection/spv.mlir.loop ops.
+  // Put all structured control flow in spv.mlir.selection/spv.mlir.loop ops.
   if (failed(wireUpBlockArgument()) || failed(structurizeControlFlow())) {
     return failure();
   }
 
   curBlock = nullptr;
   curFunction = llvm::None;
 
   return success();

 
 Block *spirv::Deserializer::getOrCreateBlock(uint32_t id) {
   if (auto *block = getBlock(id)) {
     LLVM_DEBUG(llvm::dbgs() << "[block] got exiting block for id = " << id
                             << " @ " << block << "\n");
     return block;
   }
 
-  // We don't know where this block will be placed finally (in a spv.selection
-  // or spv.mlir.loop or function). Create it into the function for now and sort
-  // out the proper place later.
+  // We don't know where this block will be placed finally (in a
+  // spv.mlir.selection or spv.mlir.loop or function). Create it into the
+  // function for now and sort out the proper place later.
   auto *block = curFunction->addBlock();
   LLVM_DEBUG(llvm::dbgs() << "[block] created block for id = " << id << " @ "
                           << block << "\n");
   return blockMap[id] = block;
 }
 
 LogicalResult spirv::Deserializer::processBranch(ArrayRef<uint32_t> operands) {
   if (!curBlock) {
LLVM_DEBUG(llvm::dbgs() << "[phi] predecessor @ " << predecessor
                             << " with arg id = " << value << '\n');
   }
 
   return success();
 }
 
 namespace {
 /// A class for putting all blocks in a structured selection/loop in a
-/// spv.selection/spv.mlir.loop op.
+/// spv.mlir.selection/spv.mlir.loop op.
 class ControlFlowStructurizer {
 public:
   /// Structurizes the loop at the given `headerBlock`.
   ///
   /// This method will create an spv.mlir.loop op in the `mergeBlock` and move
   /// all blocks in the structured loop into the spv.mlir.loop's region. All
   /// branches to the `headerBlock` will be redirected to the `mergeBlock`. This
   /// method will also update `mergeInfo` by remapping all blocks inside to the

 
 private:
   ControlFlowStructurizer(Location loc, uint32_t control,
                           spirv::BlockMergeInfoMap &mergeInfo, Block *header,
                           Block *merge, Block *cont)
       : location(loc), control(control), blockMergeInfo(mergeInfo),
         headerBlock(header), mergeBlock(merge), continueBlock(cont) {}
 
-  /// Creates a new spv.selection op at the beginning of the `mergeBlock`.
+  /// Creates a new spv.mlir.selection op at the beginning of the `mergeBlock`.
   spirv::SelectionOp createSelectionOp(uint32_t selectionControl);
 
   /// Creates a new spv.mlir.loop op at the beginning of the `mergeBlock`.
   spirv::LoopOp createLoopOp(uint32_t loopControl);
 
   /// Collects all blocks reachable from `headerBlock` except `mergeBlock`.
   void collectBlocksInConstruct();
 
   LogicalResult structurizeImpl();
 
   Location location;
   uint32_t control;
 
   spirv::BlockMergeInfoMap &blockMergeInfo;
 
   Block *headerBlock;
   Block *mergeBlock;
-  Block *continueBlock; // nullptr for spv.selection
+  Block *continueBlock; // nullptr for spv.mlir.selection
 
   llvm::SetVector<Block *> constructBlocks;
 };
 } // namespace
 
 spirv::SelectionOp
 ControlFlowStructurizer::createSelectionOp(uint32_t selectionControl) {
   // Create a builder and set the insertion point to the beginning of the

mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp

auto emitSelectionMerge = [&]() {
     lastProcessedWasMergeInst = true;
     (void)encodeInstructionInto(
         functionBody, spirv::Opcode::OpSelectionMerge,
         {mergeID, static_cast<uint32_t>(selectionOp.selection_control())});
   };
   // For structured selection, we cannot have blocks in the selection construct
   // branching to the selection header block. Entering the selection (and
   // reaching the selection header) must be from the block containing the
-  // spv.selection op. If there are ops ahead of the spv.selection op in the
-  // block, we can "merge" them into the selection header. So here we don't need
-  // to emit a separate block; just continue with the existing block.
+  // spv.mlir.selection op. If there are ops ahead of the spv.mlir.selection op
+  // in the block, we can "merge" them into the selection header. So here we
+  // don't need to emit a separate block; just continue with the existing block.
   if (failed(processBlock(headerBlock, /*omitLabel=*/true, emitSelectionMerge)))
     return failure();
 
   // Process all blocks with a depth-first visitor starting from the header
   // block. The selection header block and merge block are skipped by this
   // visitor.
   if (failed(visitInPrettyBlockOrder(
           headerBlock, [&](Block *block) { return processBlock(block); },

mlir/lib/Target/SPIRV/Serialization/Serializer.cpp

LogicalResult Serializer::emitPhiForBlockArguments(Block *block) {
   // to this block.
   SmallVector<std::pair<Block *, Operation::operand_iterator>, 4> predecessors;
   for (Block *predecessor : block->getPredecessors()) {
     auto *terminator = predecessor->getTerminator();
     // The predecessor here is the immediate one according to MLIR's IR
     // structure. It does not directly map to the incoming parent block for the
     // OpPhi instructions at SPIR-V binary level. This is because structured
     // control flow ops are serialized to multiple SPIR-V blocks. If there is a
-    // spv.selection/spv.mlir.loop op in the MLIR predecessor block, the branch
-    // op jumping to the OpPhi's block then resides in the previous structured
-    // control flow op's merge block.
+    // spv.mlir.selection/spv.mlir.loop op in the MLIR predecessor block, the
+    // branch op jumping to the OpPhi's block then resides in the previous
+    // structured control flow op's merge block.
     predecessor = getPhiIncomingBlock(predecessor);
     if (auto branchOp = dyn_cast<spirv::BranchOp>(terminator)) {
       predecessors.emplace_back(predecessor, branchOp.operand_begin());
     } else {
       return terminator->emitError("unimplemented terminator for Phi creation");
     }
   }
 

mlir/test/Conversion/LinalgToSPIRV/linalg-to-spirv.mlir

 
 // CHECK:        %[[INPTR:.+]] = spv.AccessChain %[[INPUT]][%[[ZERO]], %[[X]]]
 // CHECK:        %[[VAL:.+]] = spv.Load "StorageBuffer" %[[INPTR]] : i32
 // CHECK:        %[[ADD:.+]] = spv.GroupNonUniformIAdd "Subgroup" "Reduce" %[[VAL]] : i32
 
 // CHECK:        %[[OUTPTR:.+]] = spv.AccessChain %[[OUTPUT]][%[[ZERO]], %[[ZERO]]]
 // CHECK:        %[[ELECT:.+]] = spv.GroupNonUniformElect Subgroup : i1
 
-// CHECK:        spv.selection {
+// CHECK:        spv.mlir.selection {
 // CHECK:          spv.BranchConditional %[[ELECT]], ^bb1, ^bb2
 // CHECK:        ^bb1:
 // CHECK:          spv.AtomicIAdd "Device" "AcquireRelease" %[[OUTPTR]], %[[ADD]]
 // CHECK:          spv.Branch ^bb2
 // CHECK:        ^bb2:
 // CHECK:          spv.mlir.merge
 // CHECK:        }
 // CHECK:        spv.Return

mlir/test/Conversion/SCFToSPIRV/if.mlir

 // RUN: mlir-opt -convert-scf-to-spirv %s -o - | FileCheck %s
 
 module attributes {
   spv.target_env = #spv.target_env<
     #spv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, {}>
 } {
 
 // CHECK-LABEL: @kernel_simple_selection
 func @kernel_simple_selection(%arg2 : memref<10xf32>, %arg3 : i1) {
   %value = constant 0.0 : f32
   %i = constant 0 : index
 
-  // CHECK:       spv.selection {
+  // CHECK:       spv.mlir.selection {
   // CHECK-NEXT:    spv.BranchConditional {{%.*}}, [[TRUE:\^.*]], [[MERGE:\^.*]]
   // CHECK-NEXT:  [[TRUE]]:
   // CHECK:         spv.Branch [[MERGE]]
   // CHECK-NEXT:  [[MERGE]]:
   // CHECK-NEXT:    spv.mlir.merge
   // CHECK-NEXT:  }
   // CHECK-NEXT:  spv.Return
 
   scf.if %arg3 {
     store %value, %arg2[%i] : memref<10xf32>
   }
   return
 }
 
 // CHECK-LABEL: @kernel_nested_selection
 func @kernel_nested_selection(%arg3 : memref<10xf32>, %arg4 : memref<10xf32>, %arg5 : i1, %arg6 : i1) {
   %i = constant 0 : index
   %j = constant 9 : index
 
-  // CHECK:       spv.selection {
+  // CHECK:       spv.mlir.selection {
   // CHECK-NEXT:    spv.BranchConditional {{%.*}}, [[TRUE_TOP:\^.*]], [[FALSE_TOP:\^.*]]
   // CHECK-NEXT:  [[TRUE_TOP]]:
-  // CHECK-NEXT:    spv.selection {
+  // CHECK-NEXT:    spv.mlir.selection {
   // CHECK-NEXT:      spv.BranchConditional {{%.*}}, [[TRUE_NESTED_TRUE_PATH:\^.*]], [[FALSE_NESTED_TRUE_PATH:\^.*]]
   // CHECK-NEXT:    [[TRUE_NESTED_TRUE_PATH]]:
   // CHECK:           spv.Branch [[MERGE_NESTED_TRUE_PATH:\^.*]]
   // CHECK-NEXT:    [[FALSE_NESTED_TRUE_PATH]]:
   // CHECK:           spv.Branch [[MERGE_NESTED_TRUE_PATH]]
   // CHECK-NEXT:    [[MERGE_NESTED_TRUE_PATH]]:
   // CHECK-NEXT:      spv.mlir.merge
   // CHECK-NEXT:    }
   // CHECK-NEXT:    spv.Branch [[MERGE_TOP:\^.*]]
   // CHECK-NEXT:  [[FALSE_TOP]]:
-  // CHECK-NEXT:    spv.selection {
+  // CHECK-NEXT:    spv.mlir.selection {
   // CHECK-NEXT:      spv.BranchConditional {{%.*}}, [[TRUE_NESTED_FALSE_PATH:\^.*]], [[FALSE_NESTED_FALSE_PATH:\^.*]]
   // CHECK-NEXT:    [[TRUE_NESTED_FALSE_PATH]]:
   // CHECK:           spv.Branch [[MERGE_NESTED_FALSE_PATH:\^.*]]
   // CHECK-NEXT:    [[FALSE_NESTED_FALSE_PATH]]:
   // CHECK:           spv.Branch [[MERGE_NESTED_FALSE_PATH]]
   // CHECK:         [[MERGE_NESTED_FALSE_PATH]]:
   // CHECK-NEXT:      spv.mlir.merge
   // CHECK-NEXT:    }
func @kernel_nested_selection(%arg3 : memref<10xf32>, %arg4 : memref<10xf32>, %arg5 : i1, %arg6 : i1) {
   }
   return
 }
 
 // CHECK-LABEL: @simple_if_yield
 func @simple_if_yield(%arg2 : memref<10xf32>, %arg3 : i1) {
   // CHECK: %[[VAR1:.*]] = spv.Variable : !spv.ptr<f32, Function>
   // CHECK: %[[VAR2:.*]] = spv.Variable : !spv.ptr<f32, Function>
-  // CHECK:       spv.selection {
+  // CHECK:       spv.mlir.selection {
   // CHECK-NEXT:    spv.BranchConditional {{%.*}}, [[TRUE:\^.*]], [[FALSE:\^.*]]
   // CHECK-NEXT:  [[TRUE]]:
   // CHECK:         %[[RET1TRUE:.*]] = spv.Constant 0.000000e+00 : f32
   // CHECK:         %[[RET2TRUE:.*]] = spv.Constant 1.000000e+00 : f32
   // CHECK-DAG:     spv.Store "Function" %[[VAR1]], %[[RET1TRUE]] : f32
   // CHECK-DAG:     spv.Store "Function" %[[VAR2]], %[[RET2TRUE]] : f32
   // CHECK:         spv.Branch ^[[MERGE:.*]]
   // CHECK-NEXT:  [[FALSE]]:

 }
 
 // TODO: The transformation should only be legal if VariablePointer capability
 // is supported. This test is still useful to make sure we can handle scf op
 // result with type change.
 func @simple_if_yield_type_change(%arg2 : memref<10xf32>, %arg3 : memref<10xf32>, %arg4 : i1) {
   // CHECK-LABEL: @simple_if_yield_type_change
   // CHECK:       %[[VAR:.*]] = spv.Variable : !spv.ptr<!spv.ptr<!spv.struct<(!spv.array<10 x f32, stride=4> [0])>, StorageBuffer>, Function>
-  // CHECK:       spv.selection {
+  // CHECK:       spv.mlir.selection {
   // CHECK-NEXT:    spv.BranchConditional {{%.*}}, [[TRUE:\^.*]], [[FALSE:\^.*]]
   // CHECK-NEXT:  [[TRUE]]:
   // CHECK:         spv.Store "Function" %[[VAR]], {{%.*}} : !spv.ptr<!spv.struct<(!spv.array<10 x f32, stride=4> [0])>, StorageBuffer>
   // CHECK:         spv.Branch ^[[MERGE:.*]]
   // CHECK-NEXT:  [[FALSE]]:
   // CHECK:         spv.Store "Function" %[[VAR]], {{%.*}} : !spv.ptr<!spv.struct<(!spv.array<10 x f32, stride=4> [0])>, StorageBuffer>
   // CHECK:         spv.Branch ^[[MERGE]]
   // CHECK-NEXT:  ^[[MERGE]]:

mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir

spv.func @infinite_loop(%count : i32) -> () "None" {
     }
     spv.Return
   }
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
-// spv.selection
+// spv.mlir.selection
 //===----------------------------------------------------------------------===//
 
 spv.module Logical GLSL450 {
   spv.func @selection_empty() -> () "None" {
     // CHECK: llvm.return
-    spv.selection {
+    spv.mlir.selection {
     }
     spv.Return
   }
 
   spv.func @selection_with_merge_block_only() -> () "None" {
     %cond = spv.Constant true
     // CHECK: llvm.return
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^merge, ^merge
     ^merge:
       spv.mlir.merge
     }
     spv.Return
   }
 
   spv.func @selection_with_true_block_only() -> () "None" {
     // CHECK: %[[COND:.*]] = llvm.mlir.constant(true) : i1
     %cond = spv.Constant true
     // CHECK: llvm.cond_br %[[COND]], ^bb1, ^bb2
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^true, ^merge
     // CHECK: ^bb1:
     ^true:
     // CHECK: llvm.br ^bb2
       spv.Branch ^merge
     // CHECK: ^bb2:
     ^merge:
       // CHECK: llvm.br ^bb3
       spv.mlir.merge
     }
     // CHECK: ^bb3:
     // CHECK-NEXT: llvm.return
     spv.Return
   }
 
   spv.func @selection_with_both_true_and_false_block() -> () "None" {
     // CHECK: %[[COND:.*]] = llvm.mlir.constant(true) : i1
     %cond = spv.Constant true
     // CHECK: llvm.cond_br %[[COND]], ^bb1, ^bb2
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^true, ^false
     // CHECK: ^bb1:
     ^true:
     // CHECK: llvm.br ^bb3
       spv.Branch ^merge
     // CHECK: ^bb2:
     ^false:
     // CHECK: llvm.br ^bb3
       spv.Branch ^merge
     // CHECK: ^bb3:
     ^merge:
       // CHECK: llvm.br ^bb4
       spv.mlir.merge
     }
     // CHECK: ^bb4:
     // CHECK-NEXT: llvm.return
     spv.Return
   }
 
   spv.func @selection_with_early_return(%arg0: i1) -> i32 "None" {
     // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
     %0 = spv.Constant 0 : i32
     // CHECK: llvm.cond_br %{{.*}}, ^bb1(%[[ZERO]] : i32), ^bb2
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %arg0, ^true(%0 : i32), ^merge
     // CHECK: ^bb1(%[[ARG:.*]]: i32):
     ^true(%arg1: i32):
       // CHECK: llvm.return %[[ARG]] : i32
       spv.ReturnValue %arg1 : i32
     // CHECK: ^bb2:
     ^merge:
       // CHECK: llvm.br ^bb3
       spv.mlir.merge
     }
     // CHECK: ^bb3:
     %one = spv.Constant 1 : i32
     spv.ReturnValue %one : i32
   }
 }

mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir

 
 // -----
 
 //===----------------------------------------------------------------------===//
 // spv.mlir.merge
 //===----------------------------------------------------------------------===//
 
 func @merge() -> () {
-  // expected-error @+1 {{expected parent op to be 'spv.selection' or 'spv.mlir.loop'}}
+  // expected-error @+1 {{expected parent op to be 'spv.mlir.selection' or 'spv.mlir.loop'}}
   spv.mlir.merge
 }
 
 // -----
 
 func @only_allowed_in_last_block(%cond : i1) -> () {
   %zero = spv.Constant 0: i32
   %one = spv.Constant 1: i32
   %var = spv.Variable init(%zero) : !spv.ptr<i32, Function>
 
-  spv.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^merge
 
   ^then:
     spv.Store "Function" %var, %one : i32
-    // expected-error @+1 {{can only be used in the last block of 'spv.selection' or 'spv.mlir.loop'}}
+    // expected-error @+1 {{can only be used in the last block of 'spv.mlir.selection' or 'spv.mlir.loop'}}
     spv.mlir.merge
 
   ^merge:
     spv.mlir.merge
   }
 
   spv.Return
 }
 
 // -----
 
 func @only_allowed_in_last_block() -> () {
   %true = spv.Constant true
   spv.mlir.loop {
     spv.Branch ^header
   ^header:
     spv.BranchConditional %true, ^body, ^merge
   ^body:
-    // expected-error @+1 {{can only be used in the last block of 'spv.selection' or 'spv.mlir.loop'}}
+    // expected-error @+1 {{can only be used in the last block of 'spv.mlir.selection' or 'spv.mlir.loop'}}
     spv.mlir.merge
   ^continue:
     spv.Branch ^header
   ^merge:
     spv.mlir.merge
   }
   return
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // spv.Return
 //===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: func @in_selection
 func @in_selection(%cond : i1) -> () {
-  spv.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^merge
   ^then:
     // CHECK: spv.Return
     spv.Return
   ^merge:
     spv.mlir.merge
   }
   spv.Return
spv.func @work() -> (i32) "None" {
     spv.Return
   }
 }
 
 // -----
 
 spv.module Logical GLSL450 {
   spv.func @in_nested_region(%cond: i1) -> (i32) "None" {
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^then, ^merge
     ^then:
       // expected-error @+1 {{cannot be used in functions returning value}}
       spv.Return
     ^merge:
       spv.mlir.merge
     }
 

 func @ret_val() -> (i32) {
   %0 = spv.Constant 42 : i32
   // CHECK: spv.ReturnValue %{{.*}} : i32
   spv.ReturnValue %0 : i32
 }
 
 // CHECK-LABEL: func @in_selection
 func @in_selection(%cond : i1) -> (i32) {
-  spv.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^merge
   ^then:
     %zero = spv.Constant 0 : i32
     // CHECK: spv.ReturnValue
     spv.ReturnValue %zero : i32
   ^merge:
     spv.mlir.merge
   }
spv.func @value_type_mismatch() -> (f32) "None" {
     spv.ReturnValue %0 : i32
   }
 }
 
 // -----
 
 spv.module Logical GLSL450 {
   spv.func @in_nested_region(%cond: i1) -> () "None" {
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^then, ^merge
     ^then:
       %cst = spv.Constant 0: i32
       // expected-error @+1 {{op returns 1 value but enclosing function requires 0 results}}
       spv.ReturnValue %cst: i32
     ^merge:
       spv.mlir.merge
     }
 
     spv.Return
   }
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
-// spv.selection
+// spv.mlir.selection
 //===----------------------------------------------------------------------===//
 
 func @selection(%cond: i1) -> () {
   %zero = spv.Constant 0: i32
   %one = spv.Constant 1: i32
   %var = spv.Variable init(%zero) : !spv.ptr<i32, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     // CHECK-NEXT: spv.BranchConditional %{{.*}}, ^bb1, ^bb2
     spv.BranchConditional %cond, ^then, ^merge
 
   // CHECK: ^bb1
   ^then:
     spv.Store "Function" %var, %one : i32
     // CHECK: spv.Branch ^bb2
     spv.Branch ^merge

 // -----
 
 func @selection(%cond: i1) -> () {
   %zero = spv.Constant 0: i32
   %one = spv.Constant 1: i32
   %two = spv.Constant 2: i32
   %var = spv.Variable init(%zero) : !spv.ptr<i32, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     // CHECK-NEXT: spv.BranchConditional %{{.*}}, ^bb1, ^bb2
     spv.BranchConditional %cond, ^then, ^else
 
   // CHECK: ^bb1
   ^then:
     spv.Store "Function" %var, %one : i32
     // CHECK: spv.Branch ^bb3
     spv.Branch ^merge
func @selection(%cond: i1) -> () {
 
   spv.Return
 }
 
 // -----
 
 // CHECK-LABEL: @empty_region
 func @empty_region() -> () {
-  // CHECK: spv.selection
-  spv.selection {
+  // CHECK: spv.mlir.selection
+  spv.mlir.selection {
   }
   return
 }
 
 // -----
 
 // CHECK-LABEL: @selection_with_control
 func @selection_with_control() -> () {
-  // CHECK: spv.selection control(Flatten)
-  spv.selection control(Flatten) {
+  // CHECK: spv.mlir.selection control(Flatten)
+  spv.mlir.selection control(Flatten) {
   }
   return
 }
 
 // -----
 
 func @wrong_merge_block() -> () {
   // expected-error @+1 {{last block must be the merge block with only one 'spv.mlir.merge' op}}
-  spv.selection {
+  spv.mlir.selection {
     spv.Return
   }
   return
 }
 
 // -----
 
 func @missing_entry_block() -> () {
   // expected-error @+1 {{must have a selection header block}}
-  spv.selection {
+  spv.mlir.selection {
     spv.mlir.merge
   }
   return
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//

mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir

func @convert_logical_or_true_false_vector(%arg: vector<3xi1>) -> (vector<3xi1>, vector<3xi1>) {
   %1 = spv.LogicalOr %arg, %false: vector<3xi1>
   // CHECK: return %[[TRUE]], %[[ARG]]
   return %0, %1: vector<3xi1>, vector<3xi1>
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
-// spv.selection
+// spv.mlir.selection
 //===----------------------------------------------------------------------===//
 
 func @canonicalize_selection_op_scalar_type(%cond: i1) -> () {
   %0 = spv.Constant 0: i32
   // CHECK: %[[TRUE_VALUE:.*]] = spv.Constant 1 : i32
   %1 = spv.Constant 1: i32
   // CHECK: %[[FALSE_VALUE:.*]] = spv.Constant 2 : i32
   %2 = spv.Constant 2: i32
   // CHECK: %[[DST_VAR:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<i32, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<i32, Function>
 
   // CHECK: %[[SRC_VALUE:.*]] = spv.Select {{%.*}}, %[[TRUE_VALUE]], %[[FALSE_VALUE]] : i1, i32
   // CHECK-NEXT: spv.Store "Function" %[[DST_VAR]], %[[SRC_VALUE]] ["Aligned", 4] : i32
   // CHECK-NEXT: spv.Return
-  spv.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^else:
     spv.Store "Function" %3, %2 ["Aligned", 4]: i32
     spv.Branch ^merge
 
   ^then:
     spv.Store "Function" %3, %1 ["Aligned", 4]: i32
func @canonicalize_selection_op_vector_type(%cond: i1) -> () {
   // CHECK: %[[FALSE_VALUE:.*]] = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   %2 = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   // CHECK: %[[DST_VAR:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
 
   // CHECK: %[[SRC_VALUE:.*]] = spv.Select {{%.*}}, %[[TRUE_VALUE]], %[[FALSE_VALUE]] : i1, vector<3xi32>
   // CHECK-NEXT: spv.Store "Function" %[[DST_VAR]], %[[SRC_VALUE]] ["Aligned", 8] : vector<3xi32>
   // CHECK-NEXT: spv.Return
-  spv.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     spv.Store "Function" %3, %1 ["Aligned", 8]:  vector<3xi32>
     spv.Branch ^merge
 
   ^else:
     spv.Store "Function" %3, %2 ["Aligned", 8] : vector<3xi32>
func @cannot_canonicalize_selection_op_0(%cond: i1) -> () {
   %1 = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_1:.*]] = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   %2 = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   // CHECK: %[[DST_VAR_0:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
   // CHECK: %[[DST_VAR_1:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %4 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     // CHECK: spv.BranchConditional
     // CHECK-SAME: ^bb1(%[[DST_VAR_0]], %[[SRC_VALUE_0]]
     // CHECK-SAME: ^bb1(%[[DST_VAR_1]], %[[SRC_VALUE_1]]
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     // CHECK: ^bb1(%[[ARG0:.*]]: !spv.ptr<vector<3xi32>, Function>, %[[ARG1:.*]]: vector<3xi32>):
     // CHECK: spv.Store "Function" %[[ARG0]], %[[ARG1]] ["Aligned", 8] : vector<3xi32>
func @cannot_canonicalize_selection_op_1(%cond: i1) -> () {
   %1 = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_1:.*]] = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   %2 = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   // CHECK: %[[DST_VAR_0:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
   // CHECK: %[[DST_VAR_1:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %4 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     // CHECK: spv.Store "Function" %[[DST_VAR_0]], %[[SRC_VALUE_0]] ["Aligned", 8] : vector<3xi32>
     spv.Store "Function" %3, %1 ["Aligned", 8] : vector<3xi32>
     // CHECK: spv.Store "Function" %[[DST_VAR_1]], %[[SRC_VALUE_0]] ["Aligned", 8] : vector<3xi32>
     spv.Store "Function" %4, %1 ["Aligned", 8]:  vector<3xi32>
     spv.Branch ^merge
func @cannot_canonicalize_selection_op_2(%cond: i1) -> () {
   %0 = spv.Constant dense<[0, 1, 2]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_0:.*]] = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   %1 = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_1:.*]] = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   %2 = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   // CHECK: %[[DST_VAR:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     // CHECK: spv.Store "Function" %[[DST_VAR]], %[[SRC_VALUE_0]] ["Aligned", 8] : vector<3xi32>
     spv.Store "Function" %3, %1 ["Aligned", 8]:  vector<3xi32>
     spv.Branch ^merge
 
   ^else:
func @cannot_canonicalize_selection_op_3(%cond: i1) -> () {
   %0 = spv.Constant dense<[0, 1, 2]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_0:.*]] = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   %1 = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_1:.*]] = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   %2 = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   // CHECK: %[[DST_VAR:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     // CHECK: spv.Store "Function" %[[DST_VAR]], %[[SRC_VALUE_0]] ["Aligned", 8] : vector<3xi32>
     spv.Store "Function" %3, %1 ["Aligned", 8]:  vector<3xi32>
     spv.Return
 
   ^else:
func @cannot_canonicalize_selection_op_4(%cond: i1) -> () {
   %0 = spv.Constant dense<[0, 1, 2]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_0:.*]] = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   %1 = spv.Constant dense<[1, 2, 3]> : vector<3xi32>
   // CHECK: %[[SRC_VALUE_1:.*]] = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   %2 = spv.Constant dense<[2, 3, 4]> : vector<3xi32>
   // CHECK: %[[DST_VAR:.*]] = spv.Variable init({{%.*}}) : !spv.ptr<vector<3xi32>, Function>
   %3 = spv.Variable init(%0) : !spv.ptr<vector<3xi32>, Function>
 
-  // CHECK: spv.selection {
-  spv.selection {
+  // CHECK: spv.mlir.selection {
+  spv.mlir.selection {
     spv.BranchConditional %cond, ^then, ^else
 
   ^then:
     // CHECK: spv.Store "Function" %[[DST_VAR]], %[[SRC_VALUE_0]] ["Aligned", 4] : vector<3xi32>
     spv.Store "Function" %3, %1 ["Aligned", 4]:  vector<3xi32>
     spv.Branch ^merge
 
   ^else:

mlir/test/Dialect/SPIRV/Transforms/inlining.mlir

 }
 
 // TODO: calling_multi_block_retval_func
 
 // -----
 
 spv.module Logical GLSL450 {
   spv.func @callee(%cond : i1) -> () "None" {
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^then, ^merge
     ^then:
       spv.Return
     ^merge:
       spv.mlir.merge
     }
     spv.Return
   }
 
   // CHECK-LABEL: @calling_selection_ret_func
   spv.func @calling_selection_ret_func() "None" {
     %0 = spv.Constant true
     // CHECK: spv.FunctionCall
     spv.FunctionCall @callee(%0) : (i1) -> ()
     spv.Return
   }
 }
 
 // -----
 
 spv.module Logical GLSL450 {
   spv.func @callee(%cond : i1) -> () "None" {
-    spv.selection {
+    spv.mlir.selection {
       spv.BranchConditional %cond, ^then, ^merge
     ^then:
       spv.Branch ^merge
     ^merge:
       spv.mlir.merge
     }
     spv.Return
   }
 
   // CHECK-LABEL: @calling_selection_no_ret_func
   spv.func @calling_selection_no_ret_func() "None" {
     // CHECK-NEXT: %[[TRUE:.*]] = spv.Constant true
     %0 = spv.Constant true
-    // CHECK-NEXT: spv.selection
+    // CHECK-NEXT: spv.mlir.selection
     // CHECK-NEXT:   spv.BranchConditional %[[TRUE]], ^bb1, ^bb2
     // CHECK-NEXT: ^bb1:
     // CHECK-NEXT:   spv.Branch ^bb2
     // CHECK-NEXT: ^bb2:
     // CHECK-NEXT:   spv.mlir.merge
     spv.FunctionCall @callee(%0) : (i1) -> ()
     spv.Return
   }
spv.func @inline_into_selection_region() "None" {
     // CHECK-DAG: [[ADDRESS_ARG1:%.*]] = spv.mlir.addressof @arg_1
     // CHECK-DAG: [[LOADPTR:%.*]] = spv.AccessChain [[ADDRESS_ARG0]]
     // CHECK: [[VAL:%.*]] = spv.Load "StorageBuffer" [[LOADPTR]]
     %2 = spv.mlir.addressof @arg_0 : !spv.ptr<!spv.struct<(i32 [0])>, StorageBuffer>
     %3 = spv.mlir.addressof @arg_1 : !spv.ptr<!spv.struct<(i32 [0])>, StorageBuffer>
     %4 = spv.AccessChain %2[%1] : !spv.ptr<!spv.struct<(i32 [0])>, StorageBuffer>, i32
     %5 = spv.Load "StorageBuffer" %4 : i32
     %6 = spv.SGreaterThan %5, %1 : i32
-    // CHECK: spv.selection
-    spv.selection {
+    // CHECK: spv.mlir.selection
+    spv.mlir.selection {
       spv.BranchConditional %6, ^bb1, ^bb2
     ^bb1: // pred: ^bb0
       // CHECK: [[STOREPTR:%.*]] = spv.AccessChain [[ADDRESS_ARG1]]
       %7 = spv.AccessChain %3[%1] : !spv.ptr<!spv.struct<(i32 [0])>, StorageBuffer>, i32
       // CHECK-NOT: spv.FunctionCall
       // CHECK: spv.AtomicIAdd "Device" "AcquireRelease" [[STOREPTR]], [[VAL]]
       // CHECK: spv.Branch
       spv.FunctionCall @atomic_add(%5, %7) : (i32, !spv.ptr<i32, StorageBuffer>) -> ()

mlir/test/Target/SPIRV/debug.mlir

spv.func @loop(%count : i32) -> () "None" {
     spv.Return
   }
 
   spv.func @selection(%cond: i1) -> () "None" {
     %zero = spv.Constant 0: i32
     %one = spv.Constant 1: i32
     %two = spv.Constant 2: i32
     %var = spv.Variable init(%zero) : !spv.ptr<i32, Function>
-    spv.selection {
+    spv.mlir.selection {
       // CHECK: loc({{".*debug.mlir"}}:128:5)
       spv.BranchConditional %cond [5, 10], ^then, ^else
     ^then:
       spv.Store "Function" %var, %one : i32
       // CHECK: loc({{".*debug.mlir"}}:134:7)
       spv.Branch ^merge
     ^else:
       spv.Store "Function" %var, %two : i32

mlir/test/Target/SPIRV/phi.mlir

 // -----
 
 // Test multiple predecessors
 
 spv.module Logical GLSL450 requires #spv.vce<v1.0, [Shader], []> {
   spv.func @foo() -> () "None" {
     %var = spv.Variable : !spv.ptr<i32, Function>
 
-// CHECK:      spv.selection
-    spv.selection {
+// CHECK:      spv.mlir.selection
+    spv.mlir.selection {
       %true = spv.Constant true
 // CHECK:        spv.BranchConditional %{{.*}}, ^bb1, ^bb2
       spv.BranchConditional %true, ^true, ^false
 
 // CHECK-NEXT: ^bb1:
     ^true:
 // CHECK-NEXT:   %[[ZERO:.*]] = spv.Constant 0
       %zero = spv.Constant 0 : i32

mlir/test/Target/SPIRV/selection.mlir

 // RUN: mlir-translate -test-spirv-roundtrip -split-input-file %s | FileCheck %s
 
 // Selection with both then and else branches
 
 spv.module Logical GLSL450 requires #spv.vce<v1.0, [Shader], []> {
   spv.func @selection(%cond: i1) -> () "None" {
 // CHECK:        spv.Branch ^bb1
 // CHECK-NEXT: ^bb1:
     %zero = spv.Constant 0: i32
     %one = spv.Constant 1: i32
     %two = spv.Constant 2: i32
     %var = spv.Variable init(%zero) : !spv.ptr<i32, Function>
 
-// CHECK-NEXT:   spv.selection control(Flatten)
+// CHECK-NEXT:   spv.mlir.selection control(Flatten)
 // CHECK-NEXT:     spv.Constant 0
 // CHECK-NEXT:     spv.Variable
-    spv.selection control(Flatten) {
+    spv.mlir.selection control(Flatten) {
 // CHECK-NEXT: spv.BranchConditional %{{.*}} [5, 10], ^bb1, ^bb2
       spv.BranchConditional %cond [5, 10], ^then, ^else
 
 // CHECK-NEXT:   ^bb1:
     ^then:
 // CHECK-NEXT:     spv.Constant 1
 // CHECK-NEXT:     spv.Store
       spv.Store "Function" %var, %one : i32

 // Selection with only then branch
 // Selection in function entry block
 
 spv.module Logical GLSL450 requires #spv.vce<v1.0, [Shader], []> {
 // CHECK:      spv.func @selection(%[[ARG:.*]]: i1
   spv.func @selection(%cond: i1) -> (i32) "None" {
 // CHECK:        spv.Branch ^bb1
 // CHECK-NEXT: ^bb1:
-// CHECK-NEXT:   spv.selection
-    spv.selection {
+// CHECK-NEXT:   spv.mlir.selection
+    spv.mlir.selection {
 // CHECK-NEXT: spv.BranchConditional %[[ARG]], ^bb1, ^bb2
       spv.BranchConditional %cond, ^then, ^merge
 
 // CHECK:        ^bb1:
     ^then:
       %zero = spv.Constant 0 : i32
       spv.ReturnValue  %zero : i32