[PowerPC] Enable redundant TOC save removal on AIX

[nemanjai]

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

229–252

Please add a comment as to why moving the TOC save to the prologue isn't to be done on AIX.

486

On ELFv2, we obviously didn't bother with 32-bit mode because it doesn't really exist. However, on AIX we should probably handle 32-bit mode as well and do this for PPC::STW as well. Then of course, we'll need to update PPCInstrInfo::isTOCSaveMI().

[qiucf]

• Add comment about TOC save in prologue
• Support 32-bit AIX

[hubert.reinterpretcast]

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

229

I think this is not actually not a fundamental limitation of the ABI itself? Can we make the comment more clear that "TOC save in prologue" is merely a strategy that hasn't been implemented for the AIX ABI code in LLVM?

[qiucf]

Update comment with a FIXME.

[qiucf]

Gentle ping...

[shchenz]

LGTM with one minor comment and one idea about further improvement. Thanks for improving this.

llvm/test/CodeGen/PowerPC/remove-redundant-toc-saves.ll

2

Maybe it's better to use AIX64 as prefix comparing with below AIX32?

65

This should be out of this patch's scope, but we should have the opportunity to common TOCSave in block if.then and if.else to their common dominator block entry. Then we should only have one TOCSave in the final assembly.

[qiucf]

llvm/test/CodeGen/PowerPC/remove-redundant-toc-saves.ll

65

Thanks for pointing this out. Yes, that's a point for future improvement.

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

 // This function returns true if the input MachineInstr is a TOC save
 // instruction.
 bool PPCInstrInfo::isTOCSaveMI(const MachineInstr &MI) const {
   if (!MI.getOperand(1).isImm() || !MI.getOperand(2).isReg())
     return false;
   unsigned TOCSaveOffset = Subtarget.getFrameLowering()->getTOCSaveOffset();
   unsigned StackOffset = MI.getOperand(1).getImm();
   Register StackReg = MI.getOperand(2).getReg();
-  if (StackReg == PPC::X1 && StackOffset == TOCSaveOffset)
+  Register SPReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1;
+  if (StackReg == SPReg && StackOffset == TOCSaveOffset)
     return true;
 
   return false;
 }
 
 // We limit the max depth to track incoming values of PHIs or binary ops
 // (e.g. AND) to avoid excessive cost.
 const unsigned MAX_DEPTH = 1;

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

 // Each time a new TOC save is encountered, it checks if any of the existing
 // ones are dominated by the new one. If so, it marks the existing one as
 // redundant by setting it's entry in the map as false. It then adds the new
 // instruction to the map with either true or false depending on if any
 // existing instructions dominated the new one.
 void PPCMIPeephole::UpdateTOCSaves(
   std::map<MachineInstr *, bool> &TOCSaves, MachineInstr *MI) {
   assert(TII->isTOCSaveMI(*MI) && "Expecting a TOC save instruction here");
-  assert(MF->getSubtarget<PPCSubtarget>().isELFv2ABI() &&
-         "TOC-save removal only supported on ELFv2");
+  // FIXME: Saving TOC in prologue hasn't been implemented well in AIX ABI part,
+  // here only support it under ELFv2.
+  if (MF->getSubtarget<PPCSubtarget>().isELFv2ABI()) {
     PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();
 
     MachineBasicBlock *Entry = &MF->front();
     uint64_t CurrBlockFreq = MBFI->getBlockFreq(MI->getParent()).getFrequency();
 
     // If the block in which the TOC save resides is in a block that
     // post-dominates Entry, or a block that is hotter than entry (keep in mind
     // that early MachineLICM has already run so the TOC save won't be hoisted)
     // we can just do the save in the prologue.
     if (CurrBlockFreq > EntryFreq || MPDT->dominates(MI->getParent(), Entry))
       FI->setMustSaveTOC(true);
 
-  // If we are saving the TOC in the prologue, all the TOC saves can be removed
-  // from the code.
+    // If we are saving the TOC in the prologue, all the TOC saves can be
+    // removed from the code.
     if (FI->mustSaveTOC()) {
       for (auto &TOCSave : TOCSaves)
         TOCSave.second = false;
       // Add new instruction to map.
       TOCSaves[MI] = false;
       return;
     }
+  }
 
   bool Keep = true;
   for (auto It = TOCSaves.begin(); It != TOCSaves.end(); It++ ) {
     MachineInstr *CurrInst = It->first;
     // If new instruction dominates an existing one, mark existing one as
     // redundant.
     if (It->second && MDT->dominates(MI, CurrInst))
       It->second = false;
for (MachineInstr &MI : MBB) {
         for (MachineInstr& UseMI : MRI->use_instructions(MIDestReg))
           Simplified |= TII->onlyFoldImmediate(UseMI, MI, MIDestReg);
         if (MRI->use_nodbg_empty(MIDestReg)) {
           ++NumLoadImmZeroFoldedAndRemoved;
           ToErase = &MI;
         }
         break;
       }
+      case PPC::STW:
       case PPC::STD: {
         MachineFrameInfo &MFI = MF->getFrameInfo();
         if (MFI.hasVarSizedObjects() ||
-            !MF->getSubtarget<PPCSubtarget>().isELFv2ABI())
+            (!MF->getSubtarget<PPCSubtarget>().isELFv2ABI() &&
+             !MF->getSubtarget<PPCSubtarget>().isAIXABI()))
           break;
         // When encountering a TOC save instruction, call UpdateTOCSaves
         // to add it to the TOCSaves map and mark any existing TOC saves
         // it dominates as redundant.
         if (TII->isTOCSaveMI(MI))
           UpdateTOCSaves(TOCSaves, &MI);
         break;
       }

llvm/test/CodeGen/PowerPC/remove-redundant-toc-saves.ll

 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefix=AIX64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefix=AIX32
+
 define signext i32 @test1(i32 signext %i, i32 (i32)* nocapture %Func, i32 (i32)* nocapture %Func2) {
 entry:
 ; CHECK-LABEL: test1:
 ; CHECK:    std 2, 24(1)
 ; CHECK-NOT:    std 2, 24(1)
+
+; AIX64-LABEL: test1:
+; AIX64: std 2, 40(1)
+; AIX64-NOT: std 2, 40(1)
+
+; AIX32-LABEL: test1:
+; AIX32: stw 2, 20(1)
+; AIX32-NOT: std 2, 20(1)
   %call = tail call signext i32 %Func(i32 signext %i)
   %call1 = tail call signext i32 %Func2(i32 signext %i)
   %add2 = add nsw i32 %call1, %call
   ret i32 %add2
 }
 
 define signext i32 @test2(i32 signext %i, i32 signext %j, i32 (i32)* nocapture %Func, i32 (i32)* nocapture %Func2) {
 entry:
 ; CHECK-LABEL: test2:
 ; CHECK:    std 2, 24(1)
 ; CHECK-NOT:    std 2, 24(1)
+
+; AIX64-LABEL: test2:
+; AIX64: std 2, 40(1)
+; AIX64-NOT: std 2, 40(1)
+
+; AIX32-LABEL: test2:
+; AIX32: stw 2, 20(1)
+; AIX32-NOT: std 2, 20(1)
   %call = tail call signext i32 %Func(i32 signext %i)
   %tobool = icmp eq i32 %j, 0
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   %call1 = tail call signext i32 %Func(i32 signext %i)
   %add2 = add nsw i32 %call1, %call
   %call3 = tail call signext i32 %Func2(i32 signext %i)
   %add4 = add nsw i32 %add2, %call3
   br label %if.end
 
 if.end:                                           ; preds = %entry, %if.then
   %Sum.0 = phi i32 [ %add4, %if.then ], [ %call, %entry ]
   %call5 = tail call signext i32 %Func(i32 signext %i)
   %add6 = add nsw i32 %call5, %Sum.0
   ret i32 %add6
 }
 
 ; Check for multiple TOC saves with if then else where neither dominates the other.
 define signext i32 @test3(i32 signext %i, i32 (i32)* nocapture %Func, i32 (i32)* nocapture %Func2) {
 ; CHECK-LABEL: test3:
 ; CHECK:    std 2, 24(1)
 ; CHECK-NOT:    std 2, 24(1)
+
+; AIX64-LABEL: test3:
+; AIX64-COUNT-3: std 2, 40(1)
+
+; AIX32-LABEL: test3:
+; AIX32-COUNT-3: stw 2, 20(1)
 entry:
   %tobool = icmp eq i32 %i, 0
   br i1 %tobool, label %if.else, label %if.then
 
 if.then:                                          ; preds = %entry
   %call = tail call signext i32 %Func(i32 signext %i)
   br label %if.end
 
 if.else:                                          ; preds = %entry
   %call1 = tail call signext i32 %Func2(i32 signext 0)
   br label %if.end
 
 if.end:                                           ; preds = %if.else, %if.then
   %Sum.0 = phi i32 [ %call, %if.then ], [ %call1, %if.else ]
   %call3 = tail call signext i32 %Func(i32 signext %i)
   %add4 = add nsw i32 %call3, %Sum.0
   ret i32 %add4
 }
 
 define signext i32 @test4(i32 signext %i, i32 (i32)* nocapture %Func, i32 (i32)* nocapture %Func2) {
 ; CHECK-LABEL: test4:
 ; CHECK:    std 2, 24(1)
 ; CHECK-NOT:    std 2, 24(1)
 
+; AIX64-LABEL: test4:
+; AIX64: std 2, 40(1)
+; AIX64-NOT: std 2, 40(1)
+
+; AIX32-LABEL: test4:
+; AIX32: stw 2, 20(1)
+; AIX32-NOT: std 2, 20(1)
 entry:
   %call = tail call signext i32 %Func(i32 signext %i)
   %tobool = icmp eq i32 %i, 0
   br i1 %tobool, label %if.else, label %if.then
 
 if.then:                                          ; preds = %entry
   %call1 = tail call signext i32 %Func(i32 signext %i)
   br label %if.end

 }
 
 ; Check for multiple TOC saves with if then where neither is redundant.
 define signext i32 @test5(i32 signext %i, i32 (i32)* nocapture %Func, i32 (i32)* nocapture readnone %Func2) {
 entry:
 ; CHECK-LABEL: test5:
 ; CHECK:    std 2, 24(1)
 
+; AIX64-LABEL: test5:
+; AIX64: std 2, 40(1)
+
+; AIX32-LABEL: test5:
+; AIX32: stw 2, 20(1)
   %tobool = icmp eq i32 %i, 0
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   %call = tail call signext i32 %Func(i32 signext %i)
   br label %if.end
 
 if.end:                                           ; preds = %entry, %if.then
   %Sum.0 = phi i32 [ %call, %if.then ], [ 0, %entry ]
   %call1 = tail call signext i32 %Func(i32 signext %i)
   %add2 = add nsw i32 %call1, %Sum.0
   ret i32 %add2
 }
 
 ; Check for multiple TOC saves if there are dynamic allocations on the stack.
 define signext i32 @test6(i32 signext %i, i32 (i32)* nocapture %Func, i32 (i32)* nocapture %Func2) {
 entry:
 ; CHECK-LABEL: test6:
 ; CHECK:    std 2, 24(1)
 ; CHECK:    std 2, 24(1)
 
+; AIX64-LABEL: test6:
+; AIX64: std 2, 40(1)
+; AIX64: std 2, 40(1)
+
+; AIX32-LABEL: test6:
+; AIX32: stw 2, 20(1)
+; AIX32: stw 2, 20(1)
   %conv = sext i32 %i to i64
   %0 = alloca i8, i64 %conv, align 16
   %1 = bitcast i8* %0 to i32*
   %call = tail call signext i32 %Func(i32 signext %i)
   call void @useAlloca(i32* nonnull %1, i32 signext %call)
   %call1 = call signext i32 %Func2(i32 signext %i)
   %add2 = add nsw i32 %call1, %call
   ret i32 %add2
 }
 
 declare void @useAlloca(i32*, i32 signext)