[SystemZ] Separate LoZ ELF specifics in tablegen

[uweigand]

LGTM, thanks!

llvm/lib/Target/SystemZ/SystemZCallingConv.td

 // Match if this specific argument was widened from a short vector type.
 class CCIfShortVector<CCAction A>
     : CCIf<"static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)", A>;
 
 
 //===----------------------------------------------------------------------===//
 // z/Linux return value calling convention
 //===----------------------------------------------------------------------===//
-def RetCC_SystemZ : CallingConv<[
+def RetCC_SystemZ_ELF : CallingConv<[
   // Promote i32 to i64 if it has an explicit extension type.
   CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
 
   // A SwiftError is returned in R9.
   CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
 
   // ABI-compliant code returns 64-bit integers in R2.  Make the other
   // call-clobbered argument registers available for code that doesn't
def CC_SystemZ_GHC : CallingConv<[
 
   // Fail otherwise
   CCCustom<"CC_SystemZ_GHC_Error">
 ]>;
 
 //===----------------------------------------------------------------------===//
 // z/Linux argument calling conventions
 //===----------------------------------------------------------------------===//
-def CC_SystemZ : CallingConv<[
+def CC_SystemZ_ELF : CallingConv<[
   CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_SystemZ_GHC>>,
 
   // Promote i32 to i64 if it has an explicit extension type.
   // The convention is that true integer arguments that are smaller
   // than 64 bits should be marked as extended, but structures that
   // are smaller than 64 bits shouldn't.
   CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
 
def CC_SystemZ_ELF : CallingConv<[
 
   // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
   CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
 ]>;
 
 //===----------------------------------------------------------------------===//
 // z/Linux callee-saved registers
 //===----------------------------------------------------------------------===//
-def CSR_SystemZ : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
+def CSR_SystemZ_ELF : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
                                        (sequence "F%dD", 8, 15))>;
 
 // R9 is used to return SwiftError; remove it from CSR.
-def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ, R9D)>;
+def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ_ELF, R9D)>;
 
 // "All registers" as used by the AnyReg calling convention.
 // Note that registers 0 and 1 are still defined as intra-call scratch
 // registers that may be clobbered e.g. by PLT stubs.
 def CSR_SystemZ_AllRegs : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
                                                (sequence "F%dD", 0, 15))>;
 def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
                                                       (sequence "V%d", 0, 31))>;
 
 def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
 
+//===----------------------------------------------------------------------===//
+// s390x return value calling convention
+//===----------------------------------------------------------------------===//
+
+def RetCC_SystemZ : CallingConv<[
+
+  // ELF Linux SystemZ
+  CCIfSubtarget<"isTargetELF()", CCDelegateTo<RetCC_SystemZ_ELF>>
+]>;
+
+
+//===----------------------------------------------------------------------===//
+// s390x argument calling conventions
+//===----------------------------------------------------------------------===//
+def CC_SystemZ : CallingConv<[
+
+  // ELF Linux SystemZ
+  CCIfSubtarget<"isTargetELF()", CCDelegateTo<CC_SystemZ_ELF>>
+]>;

llvm/lib/Target/SystemZ/SystemZInstrInfo.td

 //===-- SystemZInstrInfo.td - General SystemZ instructions ----*- tblgen-*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
+def IsTargetELF           : Predicate<"Subtarget->isTargetELF()">;
+
 //===----------------------------------------------------------------------===//
 // Stack allocation
 //===----------------------------------------------------------------------===//
 
 // The callseq_start node requires the hasSideEffects flag, even though these
 // instructions are noops on SystemZ.
 let hasNoSchedulingInfo = 1, hasSideEffects = 1 in {
   def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),

 let isCall = 1, Defs = [CC] in {
   def BRAS  : CallRI <"bras", 0xA75>;
   def BRASL : CallRIL<"brasl", 0xC05>;
   def BAS   : CallRX <"bas", 0x4D>;
   def BASR  : CallRR <"basr", 0x0D>;
 }
 
 // Regular calls.
+// z/Linux ELF
+let Predicates = [IsTargetELF] in {
   let isCall = 1, Defs = [R14D, CC], Uses = [FPC] in {
     def CallBRASL : Alias<6, (outs), (ins pcrel32:$I2, variable_ops),
                           [(z_call pcrel32:$I2)]>;
     def CallBASR  : Alias<2, (outs), (ins ADDR64:$R2, variable_ops),
                           [(z_call ADDR64:$R2)]>;
   }
 
   // TLS calls.  These will be lowered into a call to __tls_get_offset,
   // with an extra relocation specifying the TLS symbol.
   let isCall = 1, Defs = [R14D, CC] in {
     def TLS_GDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
                            [(z_tls_gdcall tglobaltlsaddr:$I2)]>;
     def TLS_LDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
                            [(z_tls_ldcall tglobaltlsaddr:$I2)]>;
   }
+}
 
 // Sibling calls.
 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
   def CallJG : Alias<6, (outs), (ins pcrel32:$I2),
                      [(z_sibcall pcrel32:$I2)]>;
   def CallBR : Alias<2, (outs), (ins ADDR64:$R2),
                      [(z_sibcall ADDR64:$R2)]>;
 }

llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp

if (MF->getFunction().getCallingConv() == CallingConv::GHC)
     return CSR_SystemZ_NoRegs_SaveList;
   if (MF->getFunction().getCallingConv() == CallingConv::AnyReg)
     return Subtarget.hasVector()? CSR_SystemZ_AllRegs_Vector_SaveList
                                 : CSR_SystemZ_AllRegs_SaveList;
   if (MF->getSubtarget().getTargetLowering()->supportSwiftError() &&
       MF->getFunction().getAttributes().hasAttrSomewhere(
           Attribute::SwiftError))
     return CSR_SystemZ_SwiftError_SaveList;
-  return CSR_SystemZ_SaveList;
+  return CSR_SystemZ_ELF_SaveList;
 }
 
 const uint32_t *
 SystemZRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
                                           CallingConv::ID CC) const {
   const SystemZSubtarget &Subtarget = MF.getSubtarget<SystemZSubtarget>();
   if (CC == CallingConv::GHC)
     return CSR_SystemZ_NoRegs_RegMask;
   if (CC == CallingConv::AnyReg)
     return Subtarget.hasVector()? CSR_SystemZ_AllRegs_Vector_RegMask
                                 : CSR_SystemZ_AllRegs_RegMask;
   if (MF.getSubtarget().getTargetLowering()->supportSwiftError() &&
       MF.getFunction().getAttributes().hasAttrSomewhere(
           Attribute::SwiftError))
     return CSR_SystemZ_SwiftError_RegMask;
-  return CSR_SystemZ_RegMask;
+  return CSR_SystemZ_ELF_RegMask;
 }
 
 BitVector
 SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
   const SystemZFrameLowering *TFI = getFrameLowering(MF);
 
   if (TFI->hasFP(MF)) {

llvm/test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir

bb.0:
     %43 = LHIMux 0
     %44 = LARL %const.0
     %45 = VL64 %44, 0, $noreg :: (load 8 from constant-pool)
   
   bb.1:
     ADJCALLSTACKDOWN 0, 0
     %12 = LZDR
     $f0d = COPY %12
-    CallBRASL &fmod, killed $f0d, undef $f2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $f0d
+    CallBRASL &fmod, killed $f0d, undef $f2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $f0d
     ADJCALLSTACKUP 0, 0
     KILL killed $f0d
   
   bb.2:
     %17 = VLGVH %11, $noreg, 0
     %19 = LHR %17.subreg_l32
     undef %20.subreg_l64 = LGHI 0
     %20 = DSGFR %20, %19

llvm/test/CodeGen/SystemZ/clear-liverange-spillreg.mir

bb.56:
     J %bb.16
   
   bb.13:
     successors: %bb.14(0x7fffffff), %bb.15(0x00000001)
   
     ADJCALLSTACKDOWN 0, 0
     %49 = LGFR %120.subreg_l32
     $r2d = COPY %49
-    CallBRASL @Get_Direct_Cost8x8, killed $r2d, undef $r3d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
+    CallBRASL @Get_Direct_Cost8x8, killed $r2d, undef $r3d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
     ADJCALLSTACKUP 0, 0
     %51 = COPY killed $r2d
     MVHHI %7, 0, 0 :: (store 2)
     %12 = ARK %51.subreg_l32, %125, implicit-def dead $cc
     CFIMux %51.subreg_l32, 2147483647, implicit-def $cc
     %12 = LOCRMux %12, %126, 14, 8, implicit killed $cc
     CFIMux %125, 2147483647, implicit-def $cc
     %12 = LOCRMux %12, %126, 14, 8, implicit killed $cc
     CHIMux undef %56, 0, implicit-def $cc
     BRC 14, 6, %bb.15, implicit killed $cc
     J %bb.14
   
   bb.14:
     %124 = AHIMux %124, 1, implicit-def dead $cc
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @store_coding_state, undef $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    CallBRASL @store_coding_state, undef $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     %125 = COPY %12
     J %bb.16
   
   bb.15:
   
   bb.16:
     successors: %bb.12(0x7c000000), %bb.17(0x04000000)
bb.19:
     ADJCALLSTACKDOWN 0, 0
     %101 = LGFR %120.subreg_l32
     %102 = LGFR %18
     $r2d = COPY %101
     $r3d = COPY %102
     $r4d = LGHI 0
     $r5d = COPY %98
     $r6d = COPY %99
-    CallBRASL @SetRefAndMotionVectors, killed $r2d, killed $r3d, killed $r4d, killed $r5d, killed $r6d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    CallBRASL @SetRefAndMotionVectors, killed $r2d, killed $r3d, killed $r4d, killed $r5d, killed $r6d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @reset_coding_state, undef $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    CallBRASL @reset_coding_state, undef $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     %120 = LA %120, 1, $noreg
     CGHI %120, 4, implicit-def $cc
     BRC 14, 6, %bb.11, implicit killed $cc
     J %bb.20
   
   bb.20:
     successors: %bb.22(0x00000001), %bb.21(0x7fffffff)
bb.21:
     J %bb.22
   
   bb.22:
   
   bb.23:
     successors: %bb.26(0x00000001), %bb.24(0x7fffffff)
   
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @Get_Direct_CostMB, undef $f0d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
+    CallBRASL @Get_Direct_CostMB, undef $f0d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
     ADJCALLSTACKUP 0, 0
     ADJCALLSTACKDOWN 0, 0
     $r2d = LGHI 0
-    CallBRASL @SetModesAndRefframeForBlocks, killed $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    CallBRASL @SetModesAndRefframeForBlocks, killed $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     CHIMux undef %111, 13, implicit-def $cc
     BRC 14, 8, %bb.26, implicit killed $cc
     J %bb.24
   
   bb.24:
     successors: %bb.25(0x00000001), %bb.27(0x7fffffff)
   

llvm/test/CodeGen/SystemZ/cond-move-04.mir

body:             |
   bb.1 (%ir-block.2):
     CHIMux %3, 0, implicit-def $cc
     %0 = LOCRMux undef %0, %5, 14, 6, implicit $cc
     %0 = LOCRMux %0, %2, 14, 6, implicit killed $cc
     ADJCALLSTACKDOWN 0, 0
     %7 = LGFR %0
     $r3d = LGHI 0
     $r4d = COPY %7
-    CallBRASL @foo, undef $r2d, killed $r3d, killed $r4d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
+    CallBRASL @foo, undef $r2d, killed $r3d, killed $r4d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
     ADJCALLSTACKUP 0, 0
     J %bb.1
 
 ...

llvm/test/CodeGen/SystemZ/cond-move-08.mir

bb.3.bb30:
     successors: %bb.4(0x7fffffff), %bb.5(0x00000001)
 
     CFIMux %27, -999999, implicit-def $cc
     BRC 14, 4, %bb.5, implicit killed $cc
     J %bb.4
 
   bb.4.bb33:
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @fun, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    CallBRASL @fun, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     STRL %4, @globvar :: (store 4 into @globvar)
     CLFIMux undef %23:grx32bit, 1, implicit-def $cc
     %25:grx32bit = LHIMux 0
     %25:grx32bit = LOCHIMux %25, 1, 14, 2, implicit killed $cc
     J %bb.1
 
   bb.5.bb35:

llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints-02.mir

bb.1:
     %6:grx32bit = LLCMux undef %7:addr64bit, 0, $noreg :: (load 1 from `i8* undef`)
     CHIMux %6, 1, implicit-def $cc
     %11:gr32bit = SELRMux %8, %9:grx32bit, 14, 6, implicit killed $cc
     CHIMux %6, 2, implicit-def $cc
     %0:gr32bit = SELRMux %11, %5, 14, 8, implicit killed $cc
     ADJCALLSTACKDOWN 0, 0
     %10:gr64bit = LGFR %0
     $r2d = COPY %10
-    CallBRASL @foo, killed $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
+    CallBRASL @foo, killed $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
     ADJCALLSTACKUP 0, 0
     J %bb.1
 
 ...

llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints.mir

frameInfo:
   hasCalls:        true
 body:             |
   bb.0.bb:
     liveins: $r2d, $r3d
   
     %32:gr64bit = COPY $r3d
     %0:gr64bit = COPY $r2d
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @sre_malloc, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
+    CallBRASL @sre_malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
     %1:addr64bit = COPY $r2d
     ADJCALLSTACKUP 0, 0
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @sre_malloc, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
+    CallBRASL @sre_malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
     %2:addr64bit = COPY $r2d
     ADJCALLSTACKUP 0, 0
     %3:gr32bit = AHIMuxK %0.subreg_l32, -1, implicit-def dead $cc
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @malloc, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    CallBRASL @malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     %55:gr32bit = AHIMuxK %0.subreg_l32, 3, implicit-def dead $cc
     %56:addr64bit = LGHI 0
     %57:gr64bit = COPY %0
   
   bb.1.bb8:
     %62:grx32bit = LHIMux 0
     %59:grx32bit = LHIMux 1

llvm/test/CodeGen/SystemZ/int-cmp-56.mir

bb.0:
     %3:gr64bit = LG %0, 32, $noreg
     %4:gr64bit = LG %0, 48, $noreg
     %5:gr64bit = LG %0, 64, $noreg
     %6:gr64bit = LG %0, 80, $noreg
     %7:gr64bit = LG %0, 96, $noreg
     %8:gr64bit = LG %0, 112, $noreg
     %9:gr64bit = LG %0, 128, $noreg
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
+    CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
     %10:gr64bit = COPY $r2d
     ADJCALLSTACKUP 0, 0
     CGR %10, %1, implicit-def $cc
     %12:gr64bit = COPY %10
     %12:gr64bit = LOCGHI %12, 0, 14, 10, implicit killed $cc
     CGR %10, %2, implicit-def $cc
     %12:gr64bit = LOCGHI %12, 1, 14, 10, implicit killed $cc
     CGR %10, %3, implicit-def $cc
bb.0:
     %3:gr64bit = LG %0, 32, $noreg
     %4:gr64bit = LG %0, 48, $noreg
     %5:gr64bit = LG %0, 64, $noreg
     %6:gr64bit = LG %0, 80, $noreg
     %7:gr64bit = LG %0, 96, $noreg
     %8:gr64bit = LG %0, 112, $noreg
     %9:gr64bit = LG %0, 128, $noreg
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
+    CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2d
     %10:gr64bit = COPY $r2d
     ADJCALLSTACKUP 0, 0
     CGR %10, %1, implicit-def $cc
     %12:gr64bit = COPY %10
     %12:gr64bit = LOCGHI %12, 0, 14, 10, implicit killed $cc
     CGR %10, %2, implicit-def $cc
     %12:gr64bit = LOCGHI %12, 1, 14, 10, implicit killed $cc
     CGR %10, %3, implicit-def $cc
bb.0:
     %3:gr32bit = LMux %0, 16, $noreg
     %4:gr32bit = LMux %0, 24, $noreg
     %5:gr32bit = LMux %0, 32, $noreg
     %6:gr32bit = LMux %0, 40, $noreg
     %7:gr32bit = LMux %0, 48, $noreg
     %8:gr32bit = LMux %0, 56, $noreg
     %9:gr32bit = LMux %0, 64, $noreg
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
+    CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
     %10:gr32bit = COPY $r2l
     ADJCALLSTACKUP 0, 0
     CR %10, %1, implicit-def $cc
     %12:gr32bit = COPY %10
     %12:gr32bit = LOCHIMux %12, 0, 14, 10, implicit killed $cc
     CR %10, %2, implicit-def $cc
     %12:gr32bit = LOCHIMux %12, 1, 14, 10, implicit killed $cc
     CR %10, %3, implicit-def $cc
bb.0:
     %3:gr32bit = LMux %0, 16, $noreg
     %4:gr32bit = LMux %0, 24, $noreg
     %5:gr32bit = LMux %0, 32, $noreg
     %6:gr32bit = LMux %0, 40, $noreg
     %7:gr32bit = LMux %0, 48, $noreg
     %8:gr32bit = LMux %0, 56, $noreg
     %9:gr32bit = LMux %0, 64, $noreg
     ADJCALLSTACKDOWN 0, 0
-    CallBRASL @foo, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
+    CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
     %10:gr32bit = COPY $r2l
     ADJCALLSTACKUP 0, 0
     CR %10, %1, implicit-def $cc
     %12:gr32bit = COPY %10
     %12:gr32bit = LOCHIMux %12, 0, 14, 10, implicit killed $cc
     CR %10, %2, implicit-def $cc
     %12:gr32bit = LOCHIMux %12, 1, 14, 10, implicit killed $cc
     CR %10, %3, implicit-def $cc

llvm/test/CodeGen/SystemZ/multiselect-02.mir

bb.0.entry:
     %11:gr32bit = COPY %9.subreg_l32
     %12:gr64bit = LGHI 2
     %13:gr64bit = LGHI 8
     %14:gr64bit = Select64 killed %13, killed %12, 14, 8, implicit $cc
     CR %4, %11, implicit-def $cc
     %15:gr32bit = Select32 %11, %4, 14, 4, implicit $cc
     ADJCALLSTACKDOWN 0, 0
     $r2d = COPY %14
-    CallBRASL @bar, $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
+    CallBRASL @bar, $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
     ADJCALLSTACKUP 0, 0
     $r2l = COPY %15
     Return implicit $r2l
 
 ...

llvm/test/CodeGen/SystemZ/regcoal-subranges-update.mir

body:             |
   ; CHECK: bb.1:
   ; CHECK:   successors: %bb.1(0x80000000)
   ; CHECK:   ADJCALLSTACKDOWN 0, 0
   ; CHECK:   [[LGFR:%[0-9]+]]:gr64bit = LGFR [[LGHI]].subreg_l32
   ; CHECK:   $r2d = LGHI 123
   ; CHECK:   $r3d = LGHI 0
   ; CHECK:   $r4d = LGHI 0
   ; CHECK:   $r5d = COPY [[LGFR]]
-  ; CHECK:   KILL killed $r2d, killed $r3d, killed $r4d, $r5d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+  ; CHECK:   KILL killed $r2d, killed $r3d, killed $r4d, $r5d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
   ; CHECK:   ADJCALLSTACKUP 0, 0
   ; CHECK:   [[LGHI]]:addr64bit = nuw nsw LA [[LGHI]], 1, $noreg
   ; CHECK:   J %bb.1
   bb.0:
     successors: %bb.1(0x80000000)
 
     %2:gr64bit = LGHI 0
     %5:gr64bit = LGHI 123
     %7:addr64bit = COPY %2
 
   bb.1:
     successors: %bb.1(0x80000000)
 
     %0:addr64bit = COPY killed %7
     ADJCALLSTACKDOWN 0, 0
     %3:gr32bit = COPY %0.subreg_l32
     %4:gr64bit = LGFR killed %3
     $r2d = COPY %5
     $r3d = COPY %2
     $r4d = COPY %2
     $r5d = COPY killed %4
-    KILL killed $r2d, killed $r3d, killed $r4d, killed $r5d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc
+    KILL killed $r2d, killed $r3d, killed $r4d, killed $r5d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
     ADJCALLSTACKUP 0, 0
     %1:gr64bit = nuw nsw LA killed %0, 1, $noreg
     %7:addr64bit = COPY killed %1
     J %bb.1
 
 ...

llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir

bb.0.entry:
     CFI_INSTRUCTION offset $r11d, -72
     CFI_INSTRUCTION offset $r14d, -48
     CFI_INSTRUCTION offset $r15d, -40
     $r15d = AGHI $r15d, -160, implicit-def dead $cc
     CFI_INSTRUCTION def_cfa_offset 320
     $r11d = LGR $r15d
     CFI_INSTRUCTION def_cfa_register $r11d
     renamable $f0s = LZER
-    CallBRASL @callee, $f0s, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, debug-location !16
+    CallBRASL @callee, $f0s, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, debug-location !16
     $r2d = LGHI 0, debug-location !17
     $r11d, $r15d = LMG $r11d, 248, implicit-def $r14d, debug-location !17
     Return implicit killed $r2d, debug-location !17
 
 ...