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[RISCV] Copy isUnneededShiftMask from X86.
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Authored by craig.topper on Jan 25 2021, 10:41 PM.

Details

Summary

In d2927f786e877410d90c1e6f0e0c7d99524529c5, I added patterns
to remove (and X, 31) from sllw/srlw/sraw shift amounts.

There is code in SelectionDAGISel.cpp that knows to use
computeKnownBits to fill in bits of the mask that were removed
by SimplifyDemandedBits based on bits being known zero.

The non-W shift patterns use immbottomxlenset which allows the
mask to have more than log2(xlen) trailing ones, but doesn't
have a call computeKnownBits to fill in bits of the mask that may
have been cleared by SimplifyDemandedBits.

This patch copies code from X86 to handle more than log2(xlen)
bits and have uses computeKnownBits to fill in missing bits before
counting.

Diff Detail

Event Timeline

craig.topper created this revision.Jan 25 2021, 10:41 PM
craig.topper requested review of this revision.Jan 25 2021, 10:41 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 25 2021, 10:41 PM
Herald added a subscriber: MaskRay. · View Herald Transcript

This looks good but it would be nice to have targeted regression tests.

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
738–739

Maybe add an assertion that operand 1 has the appropriate type?

Add dedicated test cases. Add rv64 command line to existing redundant shift mask test.

This revision is now accepted and ready to land.Jan 27 2021, 4:41 PM
This revision was landed with ongoing or failed builds.Jan 27 2021, 9:02 PM
This revision was automatically updated to reflect the committed changes.
asb added a comment.Jan 28 2021, 5:06 AM

This was a really nice improvement - thanks Craig!