[PowerPC] Fix the check for the instruction using FRSP/XSRSP output register

[NeHuang]

Summary

When performing peephole optimization to simplify the code, after removing passed FPSP/XSRSP instruction we will set any uses of that FRSP/XSRSP to the source of the FRSP/XSRSP.

We are finding the machine instruction using virtual register holding FRSP/XSRSP results by searching all following instructions. We are encountering an issue that the first use of the virtual register is a debug MI causing two issues

• virtual register in the debug MI removed unexpectedly
• virtual register used in non-debug MI not replaced with the source of FRSP/XSRSP. which stays in a undef status.

This patch fix the issue by only searching non-debug machine instruction using virtual register holding FRSP/XSRSP results

[nemanjai]

Test case is missing. Please add it.

[NeHuang]

Thanks @nemanjai. Test case added.

[nemanjai]

llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll

1 ↗

(On Diff #317105)

Why this triple? It won't crash with that triple even without this fix.
It should be -mtriple=powerpc64le-unknown-linux-gnu

[NeHuang]

Address review comment in the test case.

[nemanjai]

LGTM with a couple more minor nits about the test case.

llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll

56 ↗

(On Diff #317412)

The extraneous attributes can be removed. You only need nounwind for #0 and you don't need #1 at all.

64 ↗

(On Diff #317412)

The directory may lead someone to conclude that the test case comes from FFMPEG based on the directory you happen to have the file. However this is not the case, please remove the directory name to avoid confusion.

[NeHuang]

Address comments in the test case.

[NeHuang]

Patch committed on Jan 19, 2021
Commit hash: 909d6c86eae32ef350ac35ba8564ed728544ac63

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

for (MachineInstr &MI : MBB) {
           // the FRSP/XSRSP.
           auto removeFRSPIfPossible = [&](MachineInstr *RoundInstr) {
             unsigned Opc = RoundInstr->getOpcode();
             if ((Opc == PPC::FRSP || Opc == PPC::XSRSP) &&
                 MRI->hasOneNonDBGUse(RoundInstr->getOperand(0).getReg())) {
               Simplified = true;
               Register ConvReg1 = RoundInstr->getOperand(1).getReg();
               Register FRSPDefines = RoundInstr->getOperand(0).getReg();
-              MachineInstr &Use = *(MRI->use_instr_begin(FRSPDefines));
+              MachineInstr &Use = *(MRI->use_instr_nodbg_begin(FRSPDefines));
               for (int i = 0, e = Use.getNumOperands(); i < e; ++i)
                 if (Use.getOperand(i).isReg() &&
                     Use.getOperand(i).getReg() == FRSPDefines)
                   Use.getOperand(i).setReg(ConvReg1);
               LLVM_DEBUG(dbgs() << "Removing redundant FRSP/XSRSP:\n");
               LLVM_DEBUG(RoundInstr->dump());
               LLVM_DEBUG(dbgs() << "As it feeds instruction:\n");
               LLVM_DEBUG(MI.dump());