When performing peephole optimization to simplify the code, after removing passed FPSP/XSRSP instruction we will set any uses of that FRSP/XSRSP to the source of the FRSP/XSRSP.
We are finding the machine instruction using virtual register holding FRSP/XSRSP results by searching all following instructions. We are encountering an issue that the first use of the virtual register is a debug MI causing two issues
- virtual register in the debug MI removed unexpectedly
- virtual register used in non-debug MI not replaced with the source of FRSP/XSRSP. which stays in a undef status.
This patch fix the issue by only searching non-debug machine instruction using virtual register holding FRSP/XSRSP results